This repository has been archived by the owner on Mar 9, 2021. It is now read-only.
-
Notifications
You must be signed in to change notification settings - Fork 35
/
PIN_7I77_72.vhd
196 lines (187 loc) · 10.6 KB
/
PIN_7I77_72.vhd
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
library IEEE;
use IEEE.std_logic_1164.all; -- defines std_logic types
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Copyright (C) 2007, Peter C. Wallace, Mesa Electronics
-- http://www.mesanet.com
--
-- This program is is licensed under a disjunctive dual license giving you
-- the choice of one of the two following sets of free software/open source
-- licensing terms:
--
-- * GNU General Public License (GPL), version 2.0 or later
-- * 3-clause BSD License
--
--
-- The GNU GPL License:
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
--
--
-- The 3-clause BSD License:
--
-- Redistribution and use in source and binary forms, with or without
-- modification, are permitted provided that the following conditions
-- are met:
--
-- * Redistributions of source code must retain the above copyright
-- notice, this list of conditions and the following disclaimer.
--
-- * Redistributions in binary form must reproduce the above
-- copyright notice, this list of conditions and the following
-- disclaimer in the documentation and/or other materials
-- provided with the distribution.
--
-- * Neither the name of Mesa Electronics nor the names of its
-- contributors may be used to endorse or promote products
-- derived from this software without specific prior written
-- permission.
--
--
-- Disclaimer:
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-- COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-- POSSIBILITY OF SUCH DAMAGE.
--
use work.IDROMConst.all;
package PIN_7I77_72 is
constant ModuleID : ModuleIDType :=(
(WatchDogTag, x"00", ClockLowTag, x"01", WatchDogTimeAddr&PadT, WatchDogNumRegs, x"00", WatchDogMPBitMask),
(IOPortTag, x"00", ClockLowTag, x"03", PortAddr&PadT, IOPortNumRegs, x"00", IOPortMPBitMask),
(MuxedQcountTag, MQCRev, ClockLowTag, x"06", MuxedQcounterAddr&PadT, MuxedQCounterNumRegs,x"00", MuxedQCounterMPBitMask),
(MuxedQCountSelTag, x"00", ClockLowTag, x"01", NullAddr&PadT, x"00", x"00", x"00000000"),
(SSerialTag, x"00", ClockLowTag, x"01", SSerialCommandAddr&PadT, SSerialNumRegs, x"10", SSerialMPBitMask),
(LEDTag, x"00", ClockLowTag, x"01", LEDAddr&PadT, LEDNumRegs, x"00", LEDMPBitMask),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000")
);
constant PinDesc : PinDescType :=(
-- Base func sec unit sec func sec pin
IOPortTag & x"00" & SSerialTag & SSerialTXEN2Pin, -- I/O 00
IOPortTag & x"00" & SSerialTag & SSerialTX2Pin, -- I/O 01
IOPortTag & x"00" & SSerialTag & SSerialRX2Pin, -- I/O 02
IOPortTag & x"00" & SSerialTag & SSerialTX1Pin, -- I/O 03
IOPortTag & x"00" & SSerialTag & SSerialRX1Pin, -- I/O 04
IOPortTag & x"00" & SSerialTag & SSerialTX0Pin, -- I/O 05
IOPortTag & x"00" & SSerialTag & SSerialRX0Pin, -- I/O 06
IOPortTag & x"00" & MuxedQCountSelTag & MuxedQCountSel0Pin, -- I/O 07
IOPortTag & x"00" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 08
IOPortTag & x"00" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 09
IOPortTag & x"00" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 10
IOPortTag & x"01" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 11
IOPortTag & x"01" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 12
IOPortTag & x"01" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 13
IOPortTag & x"02" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 14
IOPortTag & x"02" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 15
IOPortTag & x"02" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 16
IOPortTag & x"00" & NullTag & x"00", -- I/O 17
IOPortTag & x"00" & NullTag & x"00", -- I/O 18
IOPortTag & x"00" & NullTag & x"00", -- I/O 19
IOPortTag & x"00" & NullTag & x"00", -- I/O 20
IOPortTag & x"00" & NullTag & x"00", -- I/O 21
IOPortTag & x"00" & NullTag & x"00", -- I/O 22
IOPortTag & x"00" & NullTag & x"00", -- I/O 23
IOPortTag & x"00" & NullTag & x"00", -- I/O 24
IOPortTag & x"00" & NullTag & x"00", -- I/O 25
IOPortTag & x"00" & NullTag & x"00", -- I/O 26
IOPortTag & x"00" & NullTag & x"00", -- I/O 27
IOPortTag & x"00" & NullTag & x"00", -- I/O 28
IOPortTag & x"00" & NullTag & x"00", -- I/O 29
IOPortTag & x"00" & NullTag & x"00", -- I/O 30
IOPortTag & x"00" & NullTag & x"00", -- I/O 31
IOPortTag & x"00" & NullTag & x"00", -- I/O 32
IOPortTag & x"00" & NullTag & x"00", -- I/O 33
IOPortTag & x"00" & NullTag & x"00", -- I/O 34
IOPortTag & x"00" & NullTag & x"00", -- I/O 35
IOPortTag & x"00" & NullTag & x"00", -- I/O 36
IOPortTag & x"00" & NullTag & x"00", -- I/O 37
IOPortTag & x"00" & NullTag & x"00", -- I/O 38
IOPortTag & x"00" & NullTag & x"00", -- I/O 39
IOPortTag & x"00" & NullTag & x"00", -- I/O 40
IOPortTag & x"00" & NullTag & x"00", -- I/O 41
IOPortTag & x"00" & NullTag & x"00", -- I/O 42
IOPortTag & x"00" & NullTag & x"00", -- I/O 43
IOPortTag & x"00" & NullTag & x"00", -- I/O 44
IOPortTag & x"00" & NullTag & x"00", -- I/O 45
IOPortTag & x"00" & NullTag & x"00", -- I/O 46
IOPortTag & x"00" & NullTag & x"00", -- I/O 47
IOPortTag & x"00" & NullTag & x"00", -- I/O 48
IOPortTag & x"00" & NullTag & x"00", -- I/O 49
IOPortTag & x"00" & NullTag & x"00", -- I/O 50
IOPortTag & x"00" & NullTag & x"00", -- I/O 51
IOPortTag & x"00" & NullTag & x"00", -- I/O 52
IOPortTag & x"00" & NullTag & x"00", -- I/O 53
IOPortTag & x"00" & NullTag & x"00", -- I/O 54
IOPortTag & x"00" & NullTag & x"00", -- I/O 55
IOPortTag & x"00" & NullTag & x"00", -- I/O 56
IOPortTag & x"00" & NullTag & x"00", -- I/O 57
IOPortTag & x"00" & NullTag & x"00", -- I/O 58
IOPortTag & x"00" & NullTag & x"00", -- I/O 59
IOPortTag & x"00" & NullTag & x"00", -- I/O 60
IOPortTag & x"00" & NullTag & x"00", -- I/O 61
IOPortTag & x"00" & NullTag & x"00", -- I/O 62
IOPortTag & x"00" & NullTag & x"00", -- I/O 63
IOPortTag & x"00" & NullTag & x"00", -- I/O 64
IOPortTag & x"00" & NullTag & x"00", -- I/O 65
IOPortTag & x"00" & NullTag & x"00", -- I/O 66
IOPortTag & x"00" & NullTag & x"00", -- I/O 67
IOPortTag & x"00" & NullTag & x"00", -- I/O 68
IOPortTag & x"00" & NullTag & x"00", -- I/O 69
IOPortTag & x"00" & NullTag & x"00", -- I/O 70
IOPortTag & x"00" & NullTag & x"00", -- I/O 71
emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, -- added for IDROM v3
emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin);
end package PIN_7I77_72;