-
Notifications
You must be signed in to change notification settings - Fork 79
/
macb_main.c
6376 lines (5358 loc) · 154 KB
/
macb_main.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*
* Cadence MACB/GEM Ethernet Controller driver
*
* Copyright (C) 2004-2006 Atmel Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/clk.h>
#include <linux/crc32.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/circ_buf.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/gpio/consumer.h>
#include <linux/interrupt.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/dma-mapping.h>
#include <linux/platform_data/atmel.h>
#include <linux/platform_data/macb.h>
#include <linux/platform_device.h>
#include <linux/phy.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_gpio.h>
#include <linux/of_mdio.h>
#include <linux/of_net.h>
#include <linux/ip.h>
#include <linux/udp.h>
#include <linux/tcp.h>
#if defined(CONFIG_LAN937X_SWITCH)
#define CONFIG_KSZ_SWITCH
#if defined(CONFIG_LAN937X_SWITCH_EMBEDDED)
#define CONFIG_KSZ_SWITCH_EMBEDDED
#endif
#if defined(CONFIG_SMI_LAN937X)
#define CONFIG_KSZ_SMI
#endif
#if defined(CONFIG_LAN937X_MRP)
#define CONFIG_KSZ_MRP
#endif
#if defined(CONFIG_LAN937X_NO_MDIO_BUS)
#define CONFIG_KSZ_NO_MDIO_BUS
#endif
#endif
#if defined(CONFIG_KSZ_SWITCH)
#define HAVE_KSZ_SWITCH
#endif
#if defined(CONFIG_IBA_KSZ9897) || defined(CONFIG_IBA_LAN937X)
#define CONFIG_KSZ_IBA_ONLY
#endif
#ifdef HAVE_KSZ_SWITCH
#include <linux/if_vlan.h>
#if 1
/* Need this for TCP transmit performance. */
#define FAKE_SG
#endif
#if 0
/* No hardware checksumming means no fix for feature. */
#define NO_HW_CSUM
#endif
#if 1
/* Decide to have this fix or not. */
#define NO_HW_CSUM_FIX
#endif
#endif
#if defined(CONFIG_KSZ_SWITCH_EMBEDDED)
#include <linux/of_irq.h>
#include <linux/spi/spi.h>
#include <linux/crc32.h>
#include <linux/ip.h>
#include <net/ip.h>
#include <net/ipv6.h>
/* Need to predefine get_sysfs_data. */
#ifndef get_sysfs_data
struct ksz_port;
static void get_sysfs_data_(struct net_device *dev,
struct semaphore **proc_sem, struct ksz_port **port);
#define get_sysfs_data get_sysfs_data_
#endif
static void copy_old_skb(struct sk_buff *old, struct sk_buff *skb);
#define DO_NOT_USE_COPY_SKB
#if defined(CONFIG_IBA_KSZ9897)
#include "../micrel/iba-ksz9897.c"
#elif defined(CONFIG_HAVE_KSZ9897)
#include "../micrel/spi-ksz9897.c"
#elif defined(CONFIG_HAVE_KSZ8795)
#include "../micrel/spi-ksz8795.c"
#elif defined(CONFIG_SMI_KSZ8895)
#include "../micrel/smi-ksz8895.c"
#elif defined(CONFIG_HAVE_KSZ8895)
#include "../micrel/spi-ksz8895.c"
#elif defined(CONFIG_SMI_KSZ8863)
#include "../micrel/smi-ksz8863.c"
#elif defined(CONFIG_HAVE_KSZ8863)
#include "../micrel/spi-ksz8863.c"
#elif defined(CONFIG_IBA_LAN937X)
#include "../microchip/iba-lan937x.c"
#elif defined(CONFIG_SMI_LAN937X)
#include "../microchip/smi-lan937x.c"
#elif defined(CONFIG_HAVE_LAN937X)
#include "../microchip/spi-lan937x.c"
#endif
#elif defined(CONFIG_HAVE_KSZ9897)
#include "../micrel/ksz_cfg_9897.h"
#elif defined(CONFIG_HAVE_KSZ8795)
#include "../micrel/ksz_cfg_8795.h"
#elif defined(CONFIG_HAVE_KSZ8895)
#include "../micrel/ksz_cfg_8895.h"
#elif defined(CONFIG_HAVE_KSZ8863)
#include "../micrel/ksz_cfg_8863.h"
#elif defined(CONFIG_HAVE_KSZ8463)
#include "../micrel/ksz_cfg_8463.h"
#elif defined(CONFIG_HAVE_LAN937X)
#include "../microchip/lan937x_cfg.h"
#endif
#if defined(HAVE_KSZ_SWITCH) && !defined(CONFIG_KSZ_SWITCH_EMBEDDED)
#ifdef CONFIG_HAVE_LAN937X
#include "../microchip/lan937x_dev.h"
#else
#include "../micrel/ksz_spi_net.h"
#endif
#endif
#include "macb.h"
#ifdef HAVE_KSZ_SWITCH
#if !defined(get_sysfs_data) || defined(CONFIG_KSZ_SWITCH_EMBEDDED)
static void get_sysfs_data_(struct net_device *dev,
struct semaphore **proc_sem, struct ksz_port **port)
{
struct macb *priv = netdev_priv(dev);
struct sw_priv *hw_priv;
hw_priv = priv->parent;
*port = &priv->port;
*proc_sem = &hw_priv->proc_sem;
} /* get_sysfs_data */
#endif
#ifndef get_sysfs_data
#define get_sysfs_data get_sysfs_data_
#endif
#if !defined(CONFIG_KSZ_SWITCH_EMBEDDED)
#define USE_SPEED_LINK
#define USE_MIB
#if defined(CONFIG_HAVE_KSZ9897)
#include "../micrel/ksz_sw_sysfs_9897.c"
#elif defined(CONFIG_HAVE_KSZ8795)
#include "../micrel/ksz_sw_sysfs_8795.c"
#elif defined(CONFIG_HAVE_KSZ8895)
#include "../micrel/ksz_sw_sysfs_8895.c"
#elif defined(CONFIG_HAVE_KSZ8863)
#include "../micrel/ksz_sw_sysfs.c"
#elif defined(CONFIG_HAVE_KSZ8463)
#include "../micrel/ksz_sw_sysfs.c"
#elif defined(CONFIG_HAVE_LAN937X)
#include "../microchip/lan937x_sw_sysfs.c"
#endif
#ifdef CONFIG_1588_PTP
#ifdef CONFIG_HAVE_LAN937X
#include "../microchip/lan937x_ptp_sysfs.c"
#else
#include "../micrel/ksz_ptp_sysfs.c"
#endif
#endif
#ifdef CONFIG_KSZ_DLR
#include "../micrel/ksz_dlr_sysfs.c"
#endif
#endif
static inline int sw_is_switch(struct ksz_sw *sw)
{
return sw != NULL;
}
static void copy_old_skb(struct sk_buff *old, struct sk_buff *skb)
{
if (old->ip_summed) {
int offset = old->head - old->data;
skb->head = skb->data + offset;
}
skb->dev = old->dev;
skb->sk = old->sk;
skb->protocol = old->protocol;
skb->ip_summed = old->ip_summed;
skb->csum = old->csum;
skb_shinfo(skb)->tx_flags = skb_shinfo(old)->tx_flags;
skb_set_network_header(skb, ETH_HLEN);
dev_kfree_skb_any(old);
} /* copy_old_skb */
#endif
#ifdef CONFIG_KSZ_SWITCH
static int macb_add_vid(struct net_device *dev, __be16 proto, u16 vid)
{
struct macb *bp = netdev_priv(dev);
struct ksz_sw *sw = bp->port.sw;
if (sw_is_switch(sw))
sw->net_ops->add_vid(sw, vid);
return 0;
}
static int macb_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
{
struct macb *bp = netdev_priv(dev);
struct ksz_sw *sw = bp->port.sw;
if (sw_is_switch(sw))
sw->net_ops->kill_vid(sw, vid);
return 0;
}
static int sw_device_seen;
#if !defined(CONFIG_KSZ_IBA_ONLY)
static struct ksz_sw *check_avail_switch(struct net_device *netdev, int id)
{
int phy_mode;
char phy_id[MII_BUS_ID_SIZE];
char bus_id[MII_BUS_ID_SIZE];
struct ksz_sw *sw = NULL;
struct phy_device *phydev = NULL;
/* Check whether MII switch exists. */
phy_mode = PHY_INTERFACE_MODE_MII;
snprintf(bus_id, MII_BUS_ID_SIZE, "sw.%d", id);
snprintf(phy_id, MII_BUS_ID_SIZE, PHY_ID_FMT, bus_id, 0);
phydev = phy_attach(netdev, phy_id, phy_mode);
if (!IS_ERR(phydev)) {
struct phy_priv *phydata = phydev->priv;
sw = phydata->port->sw;
/*
* In case multiple devices mode is used and this phydev is not
* attached again.
*/
if (sw)
phydev->interface = sw->interface;
phy_detach(phydev);
}
return sw;
} /* check_avail_switch */
static int macb_sw_chk(struct macb *bp)
{
struct ksz_sw *sw;
sw = bp->port.sw;
if (!sw) {
sw = check_avail_switch(bp->dev, sw_device_seen);
if (!sw_is_switch(sw))
return -ENXIO;
}
bp->port.sw = sw;
return 0;
}
#endif
#if defined(CONFIG_KSZ_IBA_ONLY) || defined(CONFIG_KSZ_SMI)
static int get_sw_irq(struct macb *bp)
{
struct device *dev;
int spi_bus;
int spi_select;
char name[20];
spi_select = 0;
for (spi_bus = 0; spi_bus < 2; spi_bus++) {
sprintf(name, "spi%d.%d\n", spi_bus, spi_select);
dev = bus_find_device_by_name(&spi_bus_type, NULL, name);
if (dev && dev->of_node) {
int irq = of_irq_get(dev->of_node, 0);
return irq;
}
}
return -1;
} /* get_sw_irq */
#endif
#endif
#define MACB_RX_BUFFER_SIZE 128
#define RX_BUFFER_MULTIPLE 64 /* bytes */
#define DEFAULT_RX_RING_SIZE 512 /* must be power of 2 */
#define MIN_RX_RING_SIZE 64
#define MAX_RX_RING_SIZE 8192
#define RX_RING_BYTES(bp) (macb_dma_desc_get_size(bp) \
* (bp)->rx_ring_size)
#define DEFAULT_TX_RING_SIZE 512 /* must be power of 2 */
#define MIN_TX_RING_SIZE 64
#define MAX_TX_RING_SIZE 4096
#define TX_RING_BYTES(bp) (macb_dma_desc_get_size(bp) \
* (bp)->tx_ring_size)
/* level of occupied TX descriptors under which we wake up TX process */
#define MACB_TX_WAKEUP_THRESH(bp) (3 * (bp)->tx_ring_size / 4)
#define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \
| MACB_BIT(ISR_ROVR))
#define MACB_TX_ERR_FLAGS (MACB_BIT(ISR_TUND) \
| MACB_BIT(ISR_RLE) \
| MACB_BIT(TXERR))
#define MACB_TX_INT_FLAGS (MACB_TX_ERR_FLAGS | MACB_BIT(TCOMP) \
| MACB_BIT(TXUBR))
/* Max length of transmit frame must be a multiple of 8 bytes */
#define MACB_TX_LEN_ALIGN 8
#define MACB_MAX_TX_LEN ((unsigned int)((1 << MACB_TX_FRMLEN_SIZE) - 1) & ~((unsigned int)(MACB_TX_LEN_ALIGN - 1)))
#define GEM_MAX_TX_LEN ((unsigned int)((1 << GEM_TX_FRMLEN_SIZE) - 1) & ~((unsigned int)(MACB_TX_LEN_ALIGN - 1)))
#define GEM_MTU_MIN_SIZE ETH_MIN_MTU
#define MACB_NETIF_LSO NETIF_F_TSO
#define MACB_WOL_HAS_MAGIC_PACKET (0x1 << 0)
#define MACB_WOL_ENABLED (0x1 << 1)
/* Graceful stop timeouts in us. We should allow up to
* 1 frame time (10 Mbits/s, full-duplex, ignoring collisions)
*/
#define MACB_HALT_TIMEOUT 1230
/* DMA buffer descriptor might be different size
* depends on hardware configuration:
*
* 1. dma address width 32 bits:
* word 1: 32 bit address of Data Buffer
* word 2: control
*
* 2. dma address width 64 bits:
* word 1: 32 bit address of Data Buffer
* word 2: control
* word 3: upper 32 bit address of Data Buffer
* word 4: unused
*
* 3. dma address width 32 bits with hardware timestamping:
* word 1: 32 bit address of Data Buffer
* word 2: control
* word 3: timestamp word 1
* word 4: timestamp word 2
*
* 4. dma address width 64 bits with hardware timestamping:
* word 1: 32 bit address of Data Buffer
* word 2: control
* word 3: upper 32 bit address of Data Buffer
* word 4: unused
* word 5: timestamp word 1
* word 6: timestamp word 2
*/
static unsigned int macb_dma_desc_get_size(struct macb *bp)
{
#ifdef MACB_EXT_DESC
unsigned int desc_size;
switch (bp->hw_dma_cap) {
case HW_DMA_CAP_64B:
desc_size = sizeof(struct macb_dma_desc)
+ sizeof(struct macb_dma_desc_64);
break;
case HW_DMA_CAP_PTP:
desc_size = sizeof(struct macb_dma_desc)
+ sizeof(struct macb_dma_desc_ptp);
break;
case HW_DMA_CAP_64B_PTP:
desc_size = sizeof(struct macb_dma_desc)
+ sizeof(struct macb_dma_desc_64)
+ sizeof(struct macb_dma_desc_ptp);
break;
default:
desc_size = sizeof(struct macb_dma_desc);
}
return desc_size;
#endif
return sizeof(struct macb_dma_desc);
}
static unsigned int macb_adj_dma_desc_idx(struct macb *bp, unsigned int desc_idx)
{
#ifdef MACB_EXT_DESC
switch (bp->hw_dma_cap) {
case HW_DMA_CAP_64B:
case HW_DMA_CAP_PTP:
desc_idx <<= 1;
break;
case HW_DMA_CAP_64B_PTP:
desc_idx *= 3;
break;
default:
break;
}
#endif
return desc_idx;
}
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
static struct macb_dma_desc_64 *macb_64b_desc(struct macb *bp, struct macb_dma_desc *desc)
{
if (bp->hw_dma_cap & HW_DMA_CAP_64B)
return (struct macb_dma_desc_64 *)((void *)desc + sizeof(struct macb_dma_desc));
return NULL;
}
#endif
/* Ring buffer accessors */
static unsigned int macb_tx_ring_wrap(struct macb *bp, unsigned int index)
{
return index & (bp->tx_ring_size - 1);
}
static struct macb_dma_desc *macb_tx_desc(struct macb_queue *queue,
unsigned int index)
{
index = macb_tx_ring_wrap(queue->bp, index);
index = macb_adj_dma_desc_idx(queue->bp, index);
return &queue->tx_ring[index];
}
static struct macb_tx_skb *macb_tx_skb(struct macb_queue *queue,
unsigned int index)
{
return &queue->tx_skb[macb_tx_ring_wrap(queue->bp, index)];
}
static dma_addr_t macb_tx_dma(struct macb_queue *queue, unsigned int index)
{
dma_addr_t offset;
offset = macb_tx_ring_wrap(queue->bp, index) *
macb_dma_desc_get_size(queue->bp);
return queue->tx_ring_dma + offset;
}
static unsigned int macb_rx_ring_wrap(struct macb *bp, unsigned int index)
{
return index & (bp->rx_ring_size - 1);
}
static struct macb_dma_desc *macb_rx_desc(struct macb_queue *queue, unsigned int index)
{
index = macb_rx_ring_wrap(queue->bp, index);
index = macb_adj_dma_desc_idx(queue->bp, index);
return &queue->rx_ring[index];
}
static void *macb_rx_buffer(struct macb_queue *queue, unsigned int index)
{
return queue->rx_buffers + queue->bp->rx_buffer_size *
macb_rx_ring_wrap(queue->bp, index);
}
/* I/O accessors */
static u32 hw_readl_native(struct macb *bp, int offset)
{
return __raw_readl(bp->regs + offset);
}
static void hw_writel_native(struct macb *bp, int offset, u32 value)
{
__raw_writel(value, bp->regs + offset);
}
static u32 hw_readl(struct macb *bp, int offset)
{
return readl_relaxed(bp->regs + offset);
}
static void hw_writel(struct macb *bp, int offset, u32 value)
{
writel_relaxed(value, bp->regs + offset);
}
/* Find the CPU endianness by using the loopback bit of NCR register. When the
* CPU is in big endian we need to program swapped mode for management
* descriptor access.
*/
static bool hw_is_native_io(void __iomem *addr)
{
u32 value = MACB_BIT(LLB);
__raw_writel(value, addr + MACB_NCR);
value = __raw_readl(addr + MACB_NCR);
/* Write 0 back to disable everything */
__raw_writel(0, addr + MACB_NCR);
return value == MACB_BIT(LLB);
}
static bool hw_is_gem(void __iomem *addr, bool native_io)
{
u32 id;
if (native_io)
id = __raw_readl(addr + MACB_MID);
else
id = readl_relaxed(addr + MACB_MID);
return MACB_BFEXT(IDNUM, id) >= 0x2;
}
static void macb_set_hwaddr(struct macb *bp)
{
u32 bottom;
u16 top;
bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr));
macb_or_gem_writel(bp, SA1B, bottom);
top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4)));
macb_or_gem_writel(bp, SA1T, top);
/* Clear unused address register sets */
macb_or_gem_writel(bp, SA2B, 0);
macb_or_gem_writel(bp, SA2T, 0);
macb_or_gem_writel(bp, SA3B, 0);
macb_or_gem_writel(bp, SA3T, 0);
macb_or_gem_writel(bp, SA4B, 0);
macb_or_gem_writel(bp, SA4T, 0);
}
static void macb_get_hwaddr(struct macb *bp)
{
struct macb_platform_data *pdata;
u32 bottom;
u16 top;
u8 addr[6];
int i;
pdata = dev_get_platdata(&bp->pdev->dev);
/* Check all 4 address register for valid address */
for (i = 0; i < 4; i++) {
bottom = macb_or_gem_readl(bp, SA1B + i * 8);
top = macb_or_gem_readl(bp, SA1T + i * 8);
if (pdata && pdata->rev_eth_addr) {
addr[5] = bottom & 0xff;
addr[4] = (bottom >> 8) & 0xff;
addr[3] = (bottom >> 16) & 0xff;
addr[2] = (bottom >> 24) & 0xff;
addr[1] = top & 0xff;
addr[0] = (top & 0xff00) >> 8;
} else {
addr[0] = bottom & 0xff;
addr[1] = (bottom >> 8) & 0xff;
addr[2] = (bottom >> 16) & 0xff;
addr[3] = (bottom >> 24) & 0xff;
addr[4] = top & 0xff;
addr[5] = (top >> 8) & 0xff;
}
if (is_valid_ether_addr(addr)) {
memcpy(bp->dev->dev_addr, addr, sizeof(addr));
return;
}
}
dev_info(&bp->pdev->dev, "invalid hw address, using random\n");
eth_hw_addr_random(bp->dev);
}
static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
{
struct macb *bp = bus->priv;
int value;
macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
| MACB_BF(RW, MACB_MAN_READ)
| MACB_BF(PHYA, mii_id)
| MACB_BF(REGA, regnum)
| MACB_BF(CODE, MACB_MAN_CODE)));
/* wait for end of transfer */
while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
cpu_relax();
value = MACB_BFEXT(DATA, macb_readl(bp, MAN));
return value;
}
static int macb_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
u16 value)
{
struct macb *bp = bus->priv;
macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
| MACB_BF(RW, MACB_MAN_WRITE)
| MACB_BF(PHYA, mii_id)
| MACB_BF(REGA, regnum)
| MACB_BF(CODE, MACB_MAN_CODE)
| MACB_BF(DATA, value)));
/* wait for end of transfer */
while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
cpu_relax();
return 0;
}
#ifdef CONFIG_KSZ_SMI
static int smi_read(struct mii_bus *bus, int phy_id, int regnum)
{
return macb_mdio_read(bus, phy_id, regnum);
}
static int smi_write(struct mii_bus *bus, int phy_id, int regnum, u16 val)
{
return macb_mdio_write(bus, phy_id, regnum, val);
}
#endif
/**
* macb_set_tx_clk() - Set a clock to a new frequency
* @clk Pointer to the clock to change
* @rate New frequency in Hz
* @dev Pointer to the struct net_device
*/
static void macb_set_tx_clk(struct clk *clk, int speed, struct net_device *dev)
{
long ferr, rate, rate_rounded;
if (!clk)
return;
switch (speed) {
case SPEED_10:
rate = 2500000;
break;
case SPEED_100:
rate = 25000000;
break;
case SPEED_1000:
rate = 125000000;
break;
default:
return;
}
rate_rounded = clk_round_rate(clk, rate);
if (rate_rounded < 0)
return;
/* RGMII allows 50 ppm frequency error. Test and warn if this limit
* is not satisfied.
*/
ferr = abs(rate_rounded - rate);
ferr = DIV_ROUND_UP(ferr, rate / 100000);
if (ferr > 5)
netdev_warn(dev, "unable to generate target frequency: %ld Hz\n",
rate);
if (clk_set_rate(clk, rate_rounded))
netdev_err(dev, "adjusting tx_clk failed.\n");
}
static void macb_handle_link_change(struct net_device *dev)
{
struct macb *bp = netdev_priv(dev);
struct phy_device *phydev = dev->phydev;
unsigned long flags;
int status_change = 0;
spin_lock_irqsave(&bp->lock, flags);
if (phydev->link) {
if ((bp->speed != phydev->speed) ||
(bp->duplex != phydev->duplex)) {
u32 reg;
reg = macb_readl(bp, NCFGR);
reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
if (macb_is_gem(bp))
reg &= ~GEM_BIT(GBE);
if (phydev->duplex)
reg |= MACB_BIT(FD);
if (phydev->speed == SPEED_100)
reg |= MACB_BIT(SPD);
if (phydev->speed == SPEED_1000 &&
bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE)
reg |= GEM_BIT(GBE);
macb_or_gem_writel(bp, NCFGR, reg);
bp->speed = phydev->speed;
bp->duplex = phydev->duplex;
status_change = 1;
}
#ifdef HAVE_KSZ_SWITCH
bp->ready = netif_running(dev);
#endif
}
if (phydev->link != bp->link) {
if (!phydev->link) {
bp->speed = 0;
bp->duplex = -1;
}
bp->link = phydev->link;
status_change = 1;
}
spin_unlock_irqrestore(&bp->lock, flags);
if (status_change) {
if (phydev->link) {
/* Update the TX clock rate if and only if the link is
* up and there has been a link change.
*/
macb_set_tx_clk(bp->tx_clk, phydev->speed, dev);
/* The switch driver will update the link notification. */
#if !defined(CONFIG_KSZ_IBA_ONLY)
#ifdef HAVE_KSZ_SWITCH
if (!sw_is_switch(bp->port.sw))
#endif
netif_carrier_on(dev);
#endif
netdev_info(dev, "link up (%d/%s)\n",
phydev->speed,
phydev->duplex == DUPLEX_FULL ?
"Full" : "Half");
} else {
netif_carrier_off(dev);
netdev_info(dev, "link down\n");
}
}
}
/* based on au1000_eth. c*/
static int macb_mii_probe(struct net_device *dev)
{
struct macb *bp = netdev_priv(dev);
struct macb_platform_data *pdata;
struct phy_device *phydev;
struct device_node *np;
int phy_irq, ret, i;
pdata = dev_get_platdata(&bp->pdev->dev);
np = bp->pdev->dev.of_node;
ret = 0;
if (np) {
if (of_phy_is_fixed_link(np)) {
if (of_phy_register_fixed_link(np) < 0) {
dev_err(&bp->pdev->dev,
"broken fixed-link specification\n");
return -ENODEV;
}
bp->phy_node = of_node_get(np);
} else {
bp->phy_node = of_parse_phandle(np, "phy-handle", 0);
/* fallback to standard phy registration if no
* phy-handle was found nor any phy found during
* dt phy registration
*/
if (!bp->phy_node && !phy_find_first(bp->mii_bus)) {
for (i = 0; i < PHY_MAX_ADDR; i++) {
struct phy_device *phydev;
phydev = mdiobus_scan(bp->mii_bus, i);
if (IS_ERR(phydev) &&
PTR_ERR(phydev) != -ENODEV) {
ret = PTR_ERR(phydev);
break;
}
}
if (ret)
return -ENODEV;
}
}
}
if (bp->phy_node) {
phydev = of_phy_connect(dev, bp->phy_node,
&macb_handle_link_change, 0,
bp->phy_interface);
if (!phydev)
return -ENODEV;
} else {
phydev = phy_find_first(bp->mii_bus);
if (!phydev) {
netdev_err(dev, "no PHY found\n");
return -ENXIO;
}
if (pdata) {
if (gpio_is_valid(pdata->phy_irq_pin)) {
ret = devm_gpio_request(&bp->pdev->dev,
pdata->phy_irq_pin, "phy int");
if (!ret) {
phy_irq = gpio_to_irq(pdata->phy_irq_pin);
phydev->irq = (phy_irq < 0) ? PHY_POLL : phy_irq;
}
} else {
phydev->irq = PHY_POLL;
}
}
/* attach the mac to the phy */
ret = phy_connect_direct(dev, phydev, &macb_handle_link_change,
bp->phy_interface);
if (ret) {
netdev_err(dev, "Could not attach to PHY\n");
return ret;
}
}
/* mask with MAC supported features */
if (macb_is_gem(bp) && bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE)
phydev->supported &= PHY_GBIT_FEATURES;
else
phydev->supported &= PHY_BASIC_FEATURES;
if (bp->caps & MACB_CAPS_NO_GIGABIT_HALF)
phydev->supported &= ~SUPPORTED_1000baseT_Half;
phydev->advertising = phydev->supported;
bp->link = 0;
bp->speed = 0;
bp->duplex = -1;
return 0;
}
static int macb_mii_init(struct macb *bp)
{
struct macb_platform_data *pdata;
struct device_node *np;
int err;
/* Enable management port */
macb_writel(bp, NCR, MACB_BIT(MPE));
bp->mii_bus = mdiobus_alloc();
if (!bp->mii_bus) {
err = -ENOMEM;
goto err_out;
}
bp->mii_bus->name = "MACB_mii_bus";
bp->mii_bus->read = &macb_mdio_read;
bp->mii_bus->write = &macb_mdio_write;
snprintf(bp->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
bp->pdev->name, bp->pdev->id);
bp->mii_bus->priv = bp;
bp->mii_bus->parent = &bp->pdev->dev;
pdata = dev_get_platdata(&bp->pdev->dev);
dev_set_drvdata(&bp->dev->dev, bp->mii_bus);
np = bp->pdev->dev.of_node;
if (pdata)
bp->mii_bus->phy_mask = pdata->phy_mask;
if (np && of_phy_is_fixed_link(np)) {
if (of_phy_register_fixed_link(np) < 0) {
dev_err(&bp->pdev->dev,
"broken fixed-link specification %pOF\n", np);
goto err_out_free_mdiobus;
}
err = mdiobus_register(bp->mii_bus);
} else {
err = of_mdiobus_register(bp->mii_bus, np);
}
if (err)
goto err_out_free_fixed_link;
#ifdef CONFIG_KSZ_SMI
if (!err) {
int irq = get_sw_irq(bp);
err = smi_probe(&bp->sw_pdev, bp->mii_bus, irq);
/* Return an error so that switch driver is connected. */
if (!err)
return -ENXIO;
}
#endif
#if defined(HAVE_KSZ_SWITCH) && !defined(CONFIG_KSZ_IBA_ONLY)
/* Return an error so that switch driver is connected. */
err = macb_sw_chk(bp);
if (!err)
return -ENODEV;
#endif
err = macb_mii_probe(bp->dev);
if (err)
goto err_out_unregister_bus;
return 0;
err_out_unregister_bus:
mdiobus_unregister(bp->mii_bus);
err_out_free_fixed_link:
if (np && of_phy_is_fixed_link(np))
of_phy_deregister_fixed_link(np);
err_out_free_mdiobus:
of_node_put(bp->phy_node);
mdiobus_free(bp->mii_bus);
#ifdef HAVE_KSZ_SWITCH
bp->mii_bus = NULL;
#endif
err_out:
return err;
}
#if !defined(CONFIG_KSZ_IBA_ONLY) && !defined(CONFIG_KSZ_SMI)
#if 1
#define MACB_REGS_SIZE 0x20000
#endif
#endif
#ifdef MACB_REGS_SIZE
#if 1
#define SW_CSR_CMD 0x1B0
#define SW_CSR_CMD_CSR_BUSY 0x80000000
#define SW_CSR_CMD_R_NOT_W 0x40000000
#define SW_CSR_CMD_BYTE_EN 0x000f0000
#define SW_CSR_DATA 0x1AC
#endif
#ifdef SW_CSR_CMD
static u32 smi_reg(u32 offset, u32 *phy_id)
{
offset &= 0x3ff;
offset >>= 1;
offset &= ~1;
offset |= 0x200;
*phy_id = (offset & 0x3e0) >> 5;
offset &= 0x1f;
offset <<= 1;
return offset;
}
static u32 csr_r(struct mii_bus *bus, u32 phy_id, u32 reg)
{
int err;
u32 val;
err = bus->read(bus, phy_id, (reg / 2) + 1);
val = (u16) err;
val <<= 16;
err = bus->read(bus, phy_id, reg / 2);
val |= (u16) err;
return val;
}
static void csr_w(struct mii_bus *bus, u32 phy_id, u32 reg, u32 val)
{
int err;
err = bus->write(bus, phy_id, reg / 2, (u16) val);
err = bus->write(bus, phy_id, (reg / 2) + 1, (u16)(val >> 16));
}
static u32 ind_r(struct mii_bus *bus, u32 phy_id_cmd, u32 cmd,
u32 phy_id_data, u32 data, u32 reg)