/
Peeps.cpp
1266 lines (1136 loc) · 44.1 KB
/
Peeps.cpp
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
//-------------------------------------------------------------------------------------------------------
// Copyright (C) Microsoft. All rights reserved.
// Licensed under the MIT license. See LICENSE.txt file in the project root for full license information.
//-------------------------------------------------------------------------------------------------------
#include "Backend.h"
// Peeps::PeepFunc
// Run peeps on this function. For now, it just cleans the redundant reloads
// from the register allocator, and reg/reg movs. The code tracks which sym is
// in which registers on extended basic blocks.
void
Peeps::PeepFunc()
{
bool peepsEnabled = true;
if (PHASE_OFF(Js::PeepsPhase, this->func))
{
peepsEnabled = false;
}
#if defined(_M_IX86) || defined(_M_X64)
// Agen dependency elimination pass
// Since it can reveal load elimination opportunities for the normal peeps pass, we do it separately.
this->peepsAgen.PeepFunc();
#endif
this->peepsMD.Init(this);
// Init regMap
memset(this->regMap, 0, sizeof(this->regMap));
// Scratch field needs to be cleared.
this->func->m_symTable->ClearStackSymScratch();
bool isInHelper = false;
FOREACH_INSTR_IN_FUNC_EDITING(instr, instrNext, this->func)
{
switch (instr->GetKind())
{
case IR::InstrKindLabel:
case IR::InstrKindProfiledLabel:
{
if (!peepsEnabled)
{
break;
}
// Don't carry any regMap info across label
this->ClearRegMap();
// Remove unreferenced labels
if (instr->AsLabelInstr()->IsUnreferenced())
{
bool peeped;
instrNext = PeepUnreachableLabel(instr->AsLabelInstr(), isInHelper, &peeped);
if(peeped)
{
continue;
}
}
else
{
// Try to peep a previous branch again after dead label blocks are removed. For instance:
// jmp L2
// L3:
// // dead code
// L2:
// L3 is unreferenced, so after that block is removed, the branch-to-next can be removed. After that, if L2 is
// unreferenced and only has fallthrough, it can be removed as well.
IR::Instr *const prevInstr = instr->GetPrevRealInstr();
if(prevInstr->IsBranchInstr())
{
IR::BranchInstr *const branch = prevInstr->AsBranchInstr();
if(branch->IsUnconditional() && !branch->IsMultiBranch() && branch->GetTarget() == instr)
{
bool peeped;
IR::Instr *const branchNext = branch->m_next;
IR::Instr *const branchNextAfterPeep = PeepBranch(branch, &peeped);
if(peeped || branchNextAfterPeep != branchNext)
{
// The peep did something, restart from after the branch
instrNext = branchNextAfterPeep;
continue;
}
}
}
}
isInHelper = instr->AsLabelInstr()->isOpHelper;
if (instrNext->IsLabelInstr())
{
// CLean up double label
instrNext = this->CleanupLabel(instr->AsLabelInstr(), instrNext->AsLabelInstr());
}
#if defined(_M_IX86) || defined(_M_X64)
Assert(instrNext->IsLabelInstr() || instrNext->m_prev->IsLabelInstr());
IR::LabelInstr *const peepCondMoveLabel =
instrNext->IsLabelInstr() ? instrNext->AsLabelInstr() : instrNext->m_prev->AsLabelInstr();
instrNext = PeepCondMove(peepCondMoveLabel, instrNext, isInHelper && peepCondMoveLabel->isOpHelper);
#endif
break;
}
case IR::InstrKindBranch:
{
if (!peepsEnabled || instr->m_opcode == Js::OpCode::Leave)
{
break;
}
IR::BranchInstr *branchInstr = instr->AsBranchInstr();
IR::LabelInstr* target = branchInstr->GetTarget();
// Don't remove any branches to the generator's epilogue
if (target != nullptr && target->IsGeneratorEpilogueLabel())
{
break;
}
instrNext = Peeps::PeepBranch(branchInstr);
#if defined(_M_IX86) || defined(_M_X64)
Assert(instrNext && instrNext->m_prev);
if (instrNext->m_prev->IsBranchInstr())
{
instrNext = this->HoistSameInstructionAboveSplit(instrNext->m_prev->AsBranchInstr(), instrNext);
}
#endif
break;
}
case IR::InstrKindPragma:
if (instr->m_opcode == Js::OpCode::Nop)
{
instr->Remove();
}
break;
default:
if (LowererMD::IsAssign(instr))
{
if (!peepsEnabled)
{
break;
}
// Cleanup spill code
instrNext = this->PeepAssign(instr);
}
else if (instr->m_opcode == Js::OpCode::ArgOut_A_InlineBuiltIn
|| instr->m_opcode == Js::OpCode::StartCall
|| instr->m_opcode == Js::OpCode::LoweredStartCall)
{
// ArgOut/StartCall are normally lowered by the lowering of the associated call instr.
// If the call becomes unreachable, we could end up with an orphan ArgOut or StartCall.
// Just delete these StartCalls
instr->Remove();
}
#if defined(_M_IX86) || defined(_M_X64)
else if (instr->m_opcode == Js::OpCode::MOVSD_ZERO)
{
this->peepsMD.PeepAssign(instr);
IR::Opnd *dst = instr->GetDst();
// Look for explicit reg kills
if (dst && dst->IsRegOpnd())
{
this->ClearReg(dst->AsRegOpnd()->GetReg());
}
}
else if ( (instr->m_opcode == Js::OpCode::INC ) || (instr->m_opcode == Js::OpCode::DEC) )
{
// Check for any of the following patterns which can cause partial flag dependency
//
// Jcc or SHL or SHR or SAR or SHLD(in case of x64)
// Jcc or SHL or SHR or SAR or SHLD(in case of x64) Any Instruction
// INC or DEC INC or DEC
// -------------------------------------------------- OR -----------------------
// INC or DEC INC or DEC
// Jcc or SHL or SHR or SAR or SHLD(in case of x64) Any Instruction
// Jcc or SHL or SHR or SAR or SHLD(in case of x64)
//
// With this optimization if any of the above pattern found, substitute INC/DEC with ADD/SUB respectively.
if (!peepsEnabled)
{
break;
}
if (AutoSystemInfo::Data.IsAtomPlatform() || PHASE_FORCE(Js::AtomPhase, this->func))
{
bool pattern_found=false;
if ( !(instr->IsEntryInstr()) )
{
IR::Instr *prevInstr = instr->GetPrevRealInstr();
if ( IsJccOrShiftInstr(prevInstr) )
{
pattern_found = true;
}
else if ( !(prevInstr->IsEntryInstr()) && IsJccOrShiftInstr(prevInstr->GetPrevRealInstr()) )
{
pattern_found=true;
}
}
if ( !pattern_found && !(instr->IsExitInstr()) )
{
IR::Instr *nextInstr = instr->GetNextRealInstr();
if ( IsJccOrShiftInstr(nextInstr) )
{
pattern_found = true;
}
else if ( !(nextInstr->IsExitInstr() ) && (IsJccOrShiftInstr(nextInstr->GetNextRealInstr())) )
{
pattern_found = true;
}
}
if (pattern_found)
{
IR::IntConstOpnd* constOne = IR::IntConstOpnd::New((IntConstType) 1, instr->GetDst()->GetType(), instr->m_func);
IR::Instr * addOrSubInstr = IR::Instr::New(Js::OpCode::ADD, instr->GetDst(), instr->GetDst(), constOne, instr->m_func);
if (instr->m_opcode == Js::OpCode::DEC)
{
addOrSubInstr->m_opcode = Js::OpCode::SUB;
}
instr->InsertAfter(addOrSubInstr);
instr->Remove();
instr = addOrSubInstr;
}
}
IR::Opnd *dst = instr->GetDst();
// Look for explicit reg kills
if (dst && dst->IsRegOpnd())
{
this->ClearReg(dst->AsRegOpnd()->GetReg());
}
}
#endif
else
{
if (!peepsEnabled)
{
break;
}
#if defined(_M_IX86) || defined(_M_X64)
instr = this->PeepRedundant(instr);
#endif
IR::Opnd *dst = instr->GetDst();
// Look for explicit reg kills
if (dst && dst->IsRegOpnd())
{
this->ClearReg(dst->AsRegOpnd()->GetReg());
}
// Kill callee-saved regs across calls and other implicit regs
this->peepsMD.ProcessImplicitRegs(instr);
#if defined(_M_IX86) || defined(_M_X64)
if (instr->m_opcode == Js::OpCode::TEST && instr->GetSrc2()->IsIntConstOpnd()
&& ((instr->GetSrc2()->AsIntConstOpnd()->GetValue() & 0xFFFFFF00) == 0)
&& instr->GetSrc1()->IsRegOpnd() && (LinearScan::GetRegAttribs(instr->GetSrc1()->AsRegOpnd()->GetReg()) & RA_BYTEABLE))
{
// Only support if the branch is JEQ or JNE to ensure we don't look at the sign flag
if (instrNext->IsBranchInstr() &&
(instrNext->m_opcode == Js::OpCode::JNE || instrNext->m_opcode == Js::OpCode::JEQ))
{
instr->GetSrc1()->SetType(TyInt8);
instr->GetSrc2()->SetType(TyInt8);
}
}
if (instr->m_opcode == Js::OpCode::CVTSI2SD)
{
IR::Instr *xorps = IR::Instr::New(Js::OpCode::XORPS, instr->GetDst(), instr->GetDst(), instr->GetDst(), instr->m_func);
instr->InsertBefore(xorps);
}
#endif
}
}
} NEXT_INSTR_IN_FUNC_EDITING;
}
#if defined(_M_IX86) || defined(_M_X64)
// Peeps::IsJccOrShiftInstr()
// Check if instruction is any of the Shift or conditional jump variant
bool
Peeps::IsJccOrShiftInstr(IR::Instr *instr)
{
bool instrFound = (instr->IsBranchInstr() && instr->AsBranchInstr()->IsConditional()) ||
(instr->m_opcode == Js::OpCode::SHL) || (instr->m_opcode == Js::OpCode::SHR) || (instr->m_opcode == Js::OpCode::SAR);
#if defined(_M_X64)
instrFound = instrFound || (instr->m_opcode == Js::OpCode::SHLD);
#endif
return (instrFound);
}
#endif
// Peeps::PeepAssign
// Remove useless MOV reg, reg as well as redundant reloads
IR::Instr *
Peeps::PeepAssign(IR::Instr *assign)
{
IR::Opnd *dst = assign->GetDst();
IR::Opnd *src = assign->GetSrc1();
IR::Instr *instrNext = assign->m_next;
// MOV reg, sym
if (src->IsSymOpnd() && src->AsSymOpnd()->m_offset == 0)
{
AssertMsg(src->AsSymOpnd()->m_sym->IsStackSym(), "Only expect stackSyms at this point");
StackSym *sym = src->AsSymOpnd()->m_sym->AsStackSym();
if (sym->scratch.peeps.reg != RegNOREG)
{
// Found a redundant load
AssertMsg(this->regMap[sym->scratch.peeps.reg] == sym, "Something is wrong...");
assign->ReplaceSrc1(IR::RegOpnd::New(sym, sym->scratch.peeps.reg, src->GetType(), this->func));
src = assign->GetSrc1();
}
else
{
// Keep track of this load
AssertMsg(dst->IsRegOpnd(), "For now, we assume dst = sym means dst is a reg");
RegNum reg = dst->AsRegOpnd()->GetReg();
this->SetReg(reg, sym);
return instrNext;
}
}
if (dst->IsRegOpnd())
{
// MOV reg, reg
// Useless?
if (src->IsRegOpnd() && src->AsRegOpnd()->IsSameReg(dst))
{
assign->Remove();
if (instrNext->m_prev->IsBranchInstr())
{
return this->PeepBranch(instrNext->m_prev->AsBranchInstr());
}
else
{
return instrNext;
}
}
else
{
// We could copy the a of the src, but we don't have
// a way to track 2 regs on the sym... So let's just clear
// the info of the dst.
RegNum dstReg = dst->AsRegOpnd()->GetReg();
this->ClearReg(dstReg);
}
}
else if (dst->IsSymOpnd() && dst->AsSymOpnd()->m_offset == 0 && src->IsRegOpnd())
{
// MOV Sym, Reg
// Track this reg
RegNum reg = src->AsRegOpnd()->GetReg();
StackSym *sym = dst->AsSymOpnd()->m_sym->AsStackSym();
this->SetReg(reg, sym);
}
this->peepsMD.PeepAssign(assign);
return instrNext;
}
// Peeps::ClearRegMap
// Empty the regMap.
// Note: might be faster to have a count and exit if zero?
void
Peeps::ClearRegMap()
{
for (RegNum reg = (RegNum)(RegNOREG+1); reg != RegNumCount; reg = (RegNum)(reg+1))
{
this->ClearReg(reg);
}
}
// Peeps::SetReg
// Track that this sym is live in this reg
void
Peeps::SetReg(RegNum reg, StackSym *sym)
{
this->ClearReg(reg);
if (sym->m_isClosureSym)
{
return;
}
this->ClearReg(sym->scratch.peeps.reg);
this->regMap[reg] = sym;
sym->scratch.peeps.reg = reg;
}
// Peeps::ClearReg
void
Peeps::ClearReg(RegNum reg)
{
StackSym *sym = this->regMap[reg];
if (sym)
{
AssertMsg(sym->scratch.peeps.reg == reg, "Something is wrong here...");
sym->scratch.peeps.reg = RegNOREG;
this->regMap[reg] = NULL;
}
}
// Peeps::PeepBranch
// Remove branch-to-next
// Invert condBranch/uncondBranch/label
// Retarget branch to branch
IR::Instr *
Peeps::PeepBranch(IR::BranchInstr *branchInstr, bool *const peepedRef)
{
if(peepedRef)
{
*peepedRef = false;
}
IR::LabelInstr *targetInstr = branchInstr->GetTarget();
IR::Instr *instrNext;
if (branchInstr->IsUnconditional())
{
// Cleanup unreachable code after unconditional branch
instrNext = RemoveDeadBlock(branchInstr->m_next);
}
instrNext = branchInstr->GetNextRealInstrOrLabel();
if (instrNext != NULL && instrNext->IsLabelInstr())
{
//
// Remove branch-to-next
//
IR::Instr * instrSkip = instrNext;
while (instrSkip != targetInstr && instrSkip->IsLabelInstr())
{
// Skip adjacent labels
instrSkip = instrSkip->GetNextRealInstrOrLabel();
}
if (instrSkip->IsLabelInstr())
{
if (instrNext == instrSkip)
{
instrSkip = nullptr;
}
else
{
IR::Instr *instrTmp = instrSkip;
// Ignore assertion error for cases where we insert an "airlock" helper block
// for a Branch instruction's helper path that:
// 1) ends up being empty
// 2) comes after a helper block from another instruction
// 3) is followed by a non-helper block
//
// Propagating the "isOpHelper" flag can potentially make this block a non-helper,
// and that makes this block only reachable through helper blocks, thus failing the assert
#if DBG
if (instrNext->AsLabelInstr()->isOpHelper != instrSkip->AsLabelInstr()->isOpHelper)
{
instrNext->AsLabelInstr()->m_noHelperAssert = true;
}
#endif
instrNext->AsLabelInstr()->isOpHelper = instrSkip->AsLabelInstr()->isOpHelper;
instrSkip = instrNext;
instrNext = instrTmp;
}
}
if (targetInstr == instrNext)
{
if (!branchInstr->IsLowered())
{
if (branchInstr->HasAnyImplicitCalls())
{
Assert(!branchInstr->m_func->GetJITFunctionBody()->IsAsmJsMode());
// if (x > y) might trigger a call to valueof() or something for x and y.
// We can't just delete them.
Js::OpCode newOpcode;
switch(branchInstr->m_opcode)
{
case Js::OpCode::BrEq_A:
case Js::OpCode::BrNeq_A:
case Js::OpCode::BrNotEq_A:
case Js::OpCode::BrNotNeq_A:
newOpcode = Js::OpCode::DeadBrEqual;
break;
case Js::OpCode::BrSrEq_A:
case Js::OpCode::BrSrNeq_A:
case Js::OpCode::BrSrNotEq_A:
case Js::OpCode::BrSrNotNeq_A:
newOpcode = Js::OpCode::DeadBrSrEqual;
break;
case Js::OpCode::BrGe_A:
case Js::OpCode::BrGt_A:
case Js::OpCode::BrLe_A:
case Js::OpCode::BrLt_A:
case Js::OpCode::BrNotGe_A:
case Js::OpCode::BrNotGt_A:
case Js::OpCode::BrNotLe_A:
case Js::OpCode::BrNotLt_A:
case Js::OpCode::BrUnGe_A:
case Js::OpCode::BrUnGt_A:
case Js::OpCode::BrUnLe_A:
case Js::OpCode::BrUnLt_A:
newOpcode = Js::OpCode::DeadBrRelational;
break;
case Js::OpCode::BrOnHasProperty:
case Js::OpCode::BrOnNoProperty:
newOpcode = Js::OpCode::DeadBrOnHasProperty;
break;
default:
Assert(UNREACHED);
newOpcode = Js::OpCode::Nop;
}
IR::Instr *newInstr = IR::Instr::New(newOpcode, branchInstr->m_func);
newInstr->SetSrc1(branchInstr->GetSrc1());
newInstr->SetSrc2(branchInstr->GetSrc2());
branchInstr->InsertBefore(newInstr);
newInstr->SetByteCodeOffset(branchInstr);
}
else if (branchInstr->GetSrc1() && !branchInstr->GetSrc2())
{
// We only have cases with one src
Assert(branchInstr->GetSrc1()->IsRegOpnd());
IR::RegOpnd *regSrc = branchInstr->GetSrc1()->AsRegOpnd();
StackSym *symSrc = regSrc->GetStackSym();
if (symSrc->HasByteCodeRegSlot() && !regSrc->GetIsJITOptimizedReg())
{
// No side-effects to worry about, but need to insert bytecodeUse.
IR::ByteCodeUsesInstr *byteCodeUsesInstr = IR::ByteCodeUsesInstr::New(branchInstr);
byteCodeUsesInstr->Set(regSrc);
branchInstr->InsertBefore(byteCodeUsesInstr);
}
}
}
// Note: if branch is conditional, we have a dead test/cmp left behind...
if(peepedRef)
{
*peepedRef = true;
}
branchInstr->Remove();
if (targetInstr->IsUnreferenced())
{
// We may have exposed an unreachable label by deleting the branch
instrNext = Peeps::PeepUnreachableLabel(targetInstr, false);
}
else
{
instrNext = targetInstr;
}
IR::Instr *instrPrev = instrNext->GetPrevRealInstrOrLabel();
if (instrPrev->IsBranchInstr())
{
// The branch removal could have exposed a branch to next opportunity.
return Peeps::PeepBranch(instrPrev->AsBranchInstr());
}
if (instrSkip)
{
return instrSkip;
}
else
{
return instrNext;
}
}
}
else if (branchInstr->IsConditional())
{
AnalysisAssert(instrNext);
if (instrNext->IsBranchInstr()
&& instrNext->AsBranchInstr()->IsUnconditional()
&& targetInstr == instrNext->AsBranchInstr()->GetNextRealInstrOrLabel()
&& !instrNext->AsBranchInstr()->IsMultiBranch())
{
//
// Invert condBranch/uncondBranch/label:
//
// JCC L1 JinvCC L3
// JMP L3 =>
// L1:
IR::BranchInstr *uncondBranch = instrNext->AsBranchInstr();
if (branchInstr->IsLowered())
{
LowererMD::InvertBranch(branchInstr);
}
else
{
branchInstr->Invert();
}
targetInstr = uncondBranch->GetTarget();
branchInstr->SetTarget(targetInstr);
if (targetInstr->IsUnreferenced())
{
Peeps::PeepUnreachableLabel(targetInstr, false);
}
uncondBranch->Remove();
return PeepBranch(branchInstr, peepedRef);
}
}
if(branchInstr->IsMultiBranch())
{
IR::MultiBranchInstr * multiBranchInstr = branchInstr->AsMultiBrInstr();
multiBranchInstr->UpdateMultiBrLabels([=](IR::LabelInstr * targetInstr) -> IR::LabelInstr *
{
IR::LabelInstr * labelInstr = RetargetBrToBr(branchInstr, targetInstr);
return labelInstr;
});
}
else
{
RetargetBrToBr(branchInstr, targetInstr);
}
return branchInstr->m_next;
}
#if defined(_M_IX86) || defined(_M_X64)
//
// For conditional branch JE $LTarget, if both target and fallthrough branch has the same
// instruction B, hoist it up and tail dup target branch:
//
// A <unconditional branch>
// JE $LTarget $LTarget:
// B B
// ... JMP $L2
//
//====> hoist B up: move B up from fallthrough branch, remove B in target branch, retarget to $L2
// $LTarget to $L2
//
// A <unconditional branch>
// B $LTarget:
// JE $L2 JMP $L2
// ...
//
//====> now $LTarget becomes to be an empty BB, which can be removed if it's an unreferenced label
//
// A
// B
// JE $L2
// ...
//
//====> Note B will be hoist above compare instruction A if there are no dependency between A and B
//
// B
// A (cmp instr)
// JE $L2
// ...
//
IR::Instr *
Peeps::HoistSameInstructionAboveSplit(IR::BranchInstr *branchInstr, IR::Instr *instrNext)
{
Assert(branchInstr);
if (!branchInstr->IsConditional() || branchInstr->IsMultiBranch() || !branchInstr->IsLowered())
{
return instrNext; // this optimization only applies to single conditional branch
}
IR::LabelInstr *targetLabel = branchInstr->GetTarget();
Assert(targetLabel);
// give up if there are other branch entries to the target label
if (targetLabel->labelRefs.Count() > 1)
{
return instrNext;
}
// Give up if previous instruction before target label has fallthrough, cannot hoist up
IR::Instr *targetPrev = targetLabel->GetPrevRealInstrOrLabel();
Assert(targetPrev);
if (targetPrev->HasFallThrough())
{
return instrNext;
}
IR::Instr *instrSetCondition = NULL;
IR::Instr *branchPrev = branchInstr->GetPrevRealInstrOrLabel();
while (branchPrev && !branchPrev->StartsBasicBlock())
{
if (!instrSetCondition && EncoderMD::SetsConditionCode(branchPrev))
{ // located compare instruction for the branch
instrSetCondition = branchPrev;
}
branchPrev = branchPrev->GetPrevRealInstrOrLabel(); // keep looking previous instr in BB
}
if (branchPrev && branchPrev->IsLabelInstr() && branchPrev->AsLabelInstr()->isOpHelper)
{ // don't apply the optimization when branch is in helper section
return instrNext;
}
if (!instrSetCondition)
{ // give up if we cannot find the compare instruction in the BB, should be very rare
return instrNext;
}
Assert(instrSetCondition);
bool hoistAboveSetConditionInstr = false;
if (instrSetCondition == branchInstr->GetPrevRealInstrOrLabel())
{ // if compare instruction is right before branch instruction, we can hoist above cmp instr
hoistAboveSetConditionInstr = true;
} // otherwise we hoist the identical instructions above conditional branch split only
IR::Instr *instr = branchInstr->GetNextRealInstrOrLabel();
IR::Instr *targetInstr = targetLabel->GetNextRealInstrOrLabel();
IR::Instr *branchNextInstr = NULL;
IR::Instr *targetNextInstr = NULL;
IR::Instr *instrHasHoisted = NULL;
Assert(instr && targetInstr);
while (!instr->EndsBasicBlock() && !instr->IsLabelInstr() && instr->IsEqual(targetInstr) &&
!EncoderMD::UsesConditionCode(instr) && !EncoderMD::SetsConditionCode(instr) &&
!this->peepsAgen.DependentInstrs(instrSetCondition, instr) &&
// cannot hoist InlineeStart from branch targets even for the same inlinee function.
// it is used by encoder to generate InlineeFrameRecord for each inlinee
instr->m_opcode != Js::OpCode::InlineeStart)
{
branchNextInstr = instr->GetNextRealInstrOrLabel();
targetNextInstr = targetInstr->GetNextRealInstrOrLabel();
instr->Unlink(); // hoist up instr in fallthrough branch
if (hoistAboveSetConditionInstr)
{
instrSetCondition->InsertBefore(instr); // hoist above compare instruction
}
else
{
branchInstr->InsertBefore(instr); // hoist above branch split
}
targetInstr->Remove(); // remove the same instruction in target branch
if (!instrHasHoisted)
instrHasHoisted = instr; // points to the first hoisted instruction
instr = branchNextInstr;
targetInstr = targetNextInstr;
Assert(instr && targetInstr);
}
if (instrHasHoisted)
{ // instructions have been hoisted, now check tail branch to see if it can be duplicated
if (targetInstr->IsBranchInstr())
{
IR::BranchInstr *tailBranch = targetInstr->AsBranchInstr();
if (tailBranch->IsUnconditional() && !tailBranch->IsMultiBranch())
{ // target can be replaced since tail branch is a single unconditional jmp
branchInstr->ReplaceTarget(targetLabel, tailBranch->GetTarget());
}
// now targeLabel is an empty Basic Block, remove it if it's not referenced
if (targetLabel->IsUnreferenced())
{
Peeps::PeepUnreachableLabel(targetLabel, targetLabel->isOpHelper);
}
}
return instrHasHoisted;
}
return instrNext;
}
#endif
IR::LabelInstr *
Peeps::RetargetBrToBr(IR::BranchInstr *branchInstr, IR::LabelInstr * targetInstr)
{
AnalysisAssert(targetInstr);
IR::Instr *targetInstrNext = targetInstr->GetNextRealInstr();
AnalysisAssertMsg(targetInstrNext, "GetNextRealInstr() failed to get next target");
// Removing branch to branch breaks some lexical assumptions about loop in sccliveness/linearscan/second chance.
if (!branchInstr->IsLowered())
{
return targetInstr;
}
//
// Retarget branch-to-branch
//
#if DBG
uint counter = 0;
#endif
IR::LabelInstr *lastLoopTop = NULL;
while (true)
{
// There's very few cases where we can safely follow a branch chain with intervening instrs.
// One of them, which comes up occasionally, is where there is a copy of a single-def symbol
// to another single-def symbol which is only used for the branch instruction (i.e. one dead
// after the branch). Another is where a single-def symbol is declared of a constant (e.g. a
// symbol created to store "True"
// Unfortuantely, to properly do this, we'd need to do it somewhere else (i.e. not in peeps)
// and make use of the additional information that we'd have there. Having the flow graph or
// just any more information about variable liveness is necessary to determine that the load
// instructions between jumps can be safely skipped.
// The general case where this would be useful, on a higher level, is where a long statement
// containing many branches returns a value; the branching here can put the result into some
// different stacksym at each level, meaning that there'd be a load between each branch. The
// result is that we don't currently optimize it.
IR::BranchInstr *branchAtTarget = nullptr;
if (targetInstrNext->IsBranchInstr())
{
branchAtTarget = targetInstrNext->AsBranchInstr();
}
else
{
// We don't have the information here to decide whether or not to continue the branch chain.
break;
}
// This used to just be a targetInstrNext->AsBranchInstr()->IsUnconditional(), but, in order
// to optimize further, it became necessary to handle more than just unconditional jumps. In
// order to keep the code relatively clean, the "is it an inherently-taken jump chain" check
// code now follows here:
if (!targetInstrNext->AsBranchInstr()->IsUnconditional())
{
bool safetofollow = false;
if(targetInstrNext->m_opcode == branchInstr->m_opcode)
{
// If it's the same branch instruction, with the same arguments, the branch decision should,
// similarly, be the same. There's a bit more that can be done with this (e.g. for inverted,
// but otherwise similar instructions like brTrue and brFalse, the destination could go down
// the other path), but this is something that should probably be done more generally, so we
// can optimize branch chains that have other interesting bechaviors.
if (
(
(branchInstr->GetSrc1() && targetInstrNext->GetSrc1() && branchInstr->GetSrc1()->IsEqual(targetInstrNext->GetSrc1())) ||
!(branchInstr->GetSrc1() || targetInstrNext->GetSrc1())
) && (
(branchInstr->GetSrc2() && targetInstrNext->GetSrc2() && branchInstr->GetSrc2()->IsEqual(targetInstrNext->GetSrc2())) ||
!(branchInstr->GetSrc2() || targetInstrNext->GetSrc2())
)
)
{
safetofollow = true;
}
}
if (!safetofollow)
{
// We can't say safely that this branch is something that we can implicitly take, so instead
// cut off the branch chain optimization here.
break;
}
}
// We don't want to skip the loop entry, unless we're right before the encoder
if (targetInstr->m_isLoopTop && !branchAtTarget->IsLowered())
{
break;
}
if (targetInstr->m_isLoopTop)
{
if (targetInstr == lastLoopTop)
{
// We are back to a loopTop already visited.
// Looks like an infinite loop somewhere...
break;
}
lastLoopTop = targetInstr;
}
#if DBG
if (!branchInstr->IsMultiBranch() && branchInstr->GetTarget()->m_noHelperAssert && !branchAtTarget->IsMultiBranch())
{
branchAtTarget->GetTarget()->m_noHelperAssert = true;
}
AssertMsg(++counter < 10000, "We should not be looping this many times!");
#endif
IR::LabelInstr * reTargetLabel = branchAtTarget->GetTarget();
AnalysisAssert(reTargetLabel);
if (targetInstr == reTargetLabel)
{
// Infinite loop.
// JCC $L1
// L1:
// JMP $L1
break;
}
if(branchInstr->IsMultiBranch())
{
IR::MultiBranchInstr * multiBranchInstr = branchInstr->AsMultiBrInstr();
multiBranchInstr->ChangeLabelRef(targetInstr, reTargetLabel);
}
else
{
branchInstr->SetTarget(reTargetLabel);
}
if (targetInstr->IsUnreferenced())
{
Peeps::PeepUnreachableLabel(targetInstr, false);
}
targetInstr = reTargetLabel;
targetInstrNext = targetInstr->GetNextRealInstr();
}
return targetInstr;
}
IR::Instr *
Peeps::PeepUnreachableLabel(IR::LabelInstr *deadLabel, const bool isInHelper, bool *const peepedRef)
{
Assert(deadLabel);
Assert(deadLabel->IsUnreferenced());
IR::Instr *prevFallthroughInstr = deadLabel;
do
{
prevFallthroughInstr = prevFallthroughInstr->GetPrevRealInstrOrLabel();
// The previous dead label may have been kept around due to a StatementBoundary, see comment in RemoveDeadBlock.
} while(prevFallthroughInstr->IsLabelInstr() && prevFallthroughInstr->AsLabelInstr()->IsUnreferenced());
IR::Instr *instrReturn;
bool removeLabel;
// If code is now unreachable, delete block
if (!prevFallthroughInstr->HasFallThrough())
{
bool wasStatementBoundaryKeptInDeadBlock = false;
instrReturn = RemoveDeadBlock(deadLabel->m_next, &wasStatementBoundaryKeptInDeadBlock);
// Remove label only if we didn't have to keep last StatementBoundary in the dead block,
// see comment in RemoveDeadBlock.
removeLabel = !wasStatementBoundaryKeptInDeadBlock;
if(peepedRef)
{
*peepedRef = true;
}
}
else
{
instrReturn = deadLabel->m_next;
removeLabel =
deadLabel->isOpHelper == isInHelper
#if DBG
&& !deadLabel->m_noHelperAssert
#endif
;
if(peepedRef)
{
*peepedRef = removeLabel;
}
}
if (removeLabel && deadLabel->IsUnreferenced())
{
deadLabel->Remove();
}
return instrReturn;
}
IR::Instr *
Peeps::CleanupLabel(IR::LabelInstr * instr, IR::LabelInstr * instrNext)
{
IR::Instr * returnInstr;
IR::LabelInstr * labelToRemove;
IR::LabelInstr * labelToKeep;
// Just for dump, always keep loop top labels
// We also can remove label that has non branch references
if (instrNext->m_isLoopTop || instrNext->m_hasNonBranchRef)
{
if (instr->m_isLoopTop || instr->m_hasNonBranchRef)
{
// Don't remove loop top labels or labels with non branch references
return instrNext;