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dipper.dts
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dipper.dts
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/dts-v1/;
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Xiaomi Technologies, Inc. Dipper new P2 v2";
compatible = "qcom,sdm845-mtp", "qcom,sdm845", "qcom,mtp";
qcom,msm-id = <0x141 0x20000>;
interrupt-parent = <0x1>;
qcom,board-id = <0x36 0x0>;
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
efficiency = <0x400>;
cache-size = <0x8000>;
cpu-release-addr = <0x0 0x90000000>;
qcom,lmh-dcvs = <0x2>;
#cooling-cells = <0x2>;
next-level-cache = <0x3>;
sched-energy-costs = <0x4 0x5>;
linux,phandle = <0x11>;
phandle = <0x11>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
cache-level = <0x2>;
next-level-cache = <0x6>;
linux,phandle = <0x3>;
phandle = <0x3>;
l3-cache {
compatible = "arm,arch-cache";
cache-size = <0x200000>;
cache-level = <0x3>;
linux,phandle = <0x6>;
phandle = <0x6>;
};
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
linux,phandle = <0x120>;
phandle = <0x120>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
linux,phandle = <0x128>;
phandle = <0x128>;
};
l1-tlb {
qcom,dump-size = <0x6000>;
linux,phandle = <0x134>;
phandle = <0x134>;
};
};
cpu@100 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x100>;
enable-method = "psci";
efficiency = <0x400>;
cache-size = <0x8000>;
cpu-release-addr = <0x0 0x90000000>;
qcom,lmh-dcvs = <0x2>;
#cooling-cells = <0x2>;
next-level-cache = <0x7>;
sched-energy-costs = <0x4 0x5>;
linux,phandle = <0x12>;
phandle = <0x12>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
cache-level = <0x2>;
next-level-cache = <0x6>;
linux,phandle = <0x7>;
phandle = <0x7>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
linux,phandle = <0x121>;
phandle = <0x121>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
linux,phandle = <0x129>;
phandle = <0x129>;
};
l1-tlb {
qcom,dump-size = <0x6000>;
linux,phandle = <0x135>;
phandle = <0x135>;
};
};
cpu@200 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x200>;
enable-method = "psci";
efficiency = <0x400>;
cache-size = <0x8000>;
cpu-release-addr = <0x0 0x90000000>;
qcom,lmh-dcvs = <0x2>;
#cooling-cells = <0x2>;
next-level-cache = <0x8>;
sched-energy-costs = <0x4 0x5>;
linux,phandle = <0x13>;
phandle = <0x13>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
cache-level = <0x2>;
next-level-cache = <0x6>;
linux,phandle = <0x8>;
phandle = <0x8>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
linux,phandle = <0x122>;
phandle = <0x122>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
linux,phandle = <0x12a>;
phandle = <0x12a>;
};
l1-tlb {
qcom,dump-size = <0x6000>;
linux,phandle = <0x136>;
phandle = <0x136>;
};
};
cpu@300 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x300>;
enable-method = "psci";
efficiency = <0x400>;
cache-size = <0x8000>;
cpu-release-addr = <0x0 0x90000000>;
qcom,lmh-dcvs = <0x2>;
#cooling-cells = <0x2>;
next-level-cache = <0x9>;
sched-energy-costs = <0x4 0x5>;
linux,phandle = <0x14>;
phandle = <0x14>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
cache-level = <0x2>;
next-level-cache = <0x6>;
linux,phandle = <0x9>;
phandle = <0x9>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
linux,phandle = <0x123>;
phandle = <0x123>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
linux,phandle = <0x12b>;
phandle = <0x12b>;
};
l1-tlb {
qcom,dump-size = <0x6000>;
linux,phandle = <0x137>;
phandle = <0x137>;
};
};
cpu@400 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x400>;
enable-method = "psci";
efficiency = <0x6cc>;
cache-size = <0x20000>;
cpu-release-addr = <0x0 0x90000000>;
qcom,lmh-dcvs = <0xa>;
#cooling-cells = <0x2>;
next-level-cache = <0xb>;
sched-energy-costs = <0xc 0xd>;
linux,phandle = <0x15>;
phandle = <0x15>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x40000>;
cache-level = <0x2>;
next-level-cache = <0x6>;
linux,phandle = <0xb>;
phandle = <0xb>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x24000>;
linux,phandle = <0x124>;
phandle = <0x124>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x14000>;
linux,phandle = <0x12c>;
phandle = <0x12c>;
};
l1-tlb {
qcom,dump-size = <0x6800>;
linux,phandle = <0x138>;
phandle = <0x138>;
};
};
cpu@500 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x500>;
enable-method = "psci";
efficiency = <0x6cc>;
cache-size = <0x20000>;
cpu-release-addr = <0x0 0x90000000>;
qcom,lmh-dcvs = <0xa>;
#cooling-cells = <0x2>;
next-level-cache = <0xe>;
sched-energy-costs = <0xc 0xd>;
linux,phandle = <0x16>;
phandle = <0x16>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x40000>;
cache-level = <0x2>;
next-level-cache = <0x6>;
linux,phandle = <0xe>;
phandle = <0xe>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x24000>;
linux,phandle = <0x125>;
phandle = <0x125>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x14000>;
linux,phandle = <0x12d>;
phandle = <0x12d>;
};
l1-tlb {
qcom,dump-size = <0x6800>;
linux,phandle = <0x139>;
phandle = <0x139>;
};
};
cpu@600 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x600>;
enable-method = "psci";
efficiency = <0x6cc>;
cache-size = <0x20000>;
cpu-release-addr = <0x0 0x90000000>;
qcom,lmh-dcvs = <0xa>;
#cooling-cells = <0x2>;
next-level-cache = <0xf>;
sched-energy-costs = <0xc 0xd>;
linux,phandle = <0x17>;
phandle = <0x17>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x40000>;
cache-level = <0x2>;
next-level-cache = <0x6>;
linux,phandle = <0xf>;
phandle = <0xf>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x24000>;
linux,phandle = <0x126>;
phandle = <0x126>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x14000>;
linux,phandle = <0x12e>;
phandle = <0x12e>;
};
l1-tlb {
qcom,dump-size = <0x6800>;
linux,phandle = <0x13a>;
phandle = <0x13a>;
};
};
cpu@700 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x700>;
enable-method = "psci";
efficiency = <0x6cc>;
cache-size = <0x20000>;
cpu-release-addr = <0x0 0x90000000>;
qcom,lmh-dcvs = <0xa>;
#cooling-cells = <0x2>;
next-level-cache = <0x10>;
sched-energy-costs = <0xc 0xd>;
linux,phandle = <0x18>;
phandle = <0x18>;
l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x40000>;
cache-level = <0x2>;
next-level-cache = <0x6>;
linux,phandle = <0x10>;
phandle = <0x10>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x24000>;
linux,phandle = <0x127>;
phandle = <0x127>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x14000>;
linux,phandle = <0x12f>;
phandle = <0x12f>;
};
l1-tlb {
qcom,dump-size = <0x6800>;
linux,phandle = <0x13b>;
phandle = <0x13b>;
};
};
cpu-map {
cluster0 {
core0 {
cpu = <0x11>;
};
core1 {
cpu = <0x12>;
};
core2 {
cpu = <0x13>;
};
core3 {
cpu = <0x14>;
};
};
cluster1 {
core0 {
cpu = <0x15>;
};
core1 {
cpu = <0x16>;
};
core2 {
cpu = <0x17>;
};
core3 {
cpu = <0x18>;
};
};
};
};
soc {
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges = <0x0 0x0 0x0 0xffffffff>;
compatible = "simple-bus";
qcom,gdsc@0x16b004 {
compatible = "qcom,gdsc";
regulator-name = "pcie_0_gdsc";
reg = <0x16b004 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
linux,phandle = <0x2e8>;
phandle = <0x2e8>;
};
qcom,gdsc@0x18d004 {
compatible = "qcom,gdsc";
regulator-name = "pcie_1_gdsc";
reg = <0x18d004 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
linux,phandle = <0x2ed>;
phandle = <0x2ed>;
};
qcom,gdsc@0x175004 {
compatible = "qcom,gdsc";
regulator-name = "ufs_card_gdsc";
reg = <0x175004 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
};
qcom,gdsc@0x177004 {
compatible = "qcom,gdsc";
regulator-name = "ufs_phy_gdsc";
reg = <0x177004 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
linux,phandle = <0xe0>;
phandle = <0xe0>;
};
qcom,gdsc@0x10f004 {
compatible = "qcom,gdsc";
regulator-name = "usb30_prim_gdsc";
reg = <0x10f004 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
linux,phandle = <0x338>;
phandle = <0x338>;
};
qcom,gdsc@0x110004 {
compatible = "qcom,gdsc";
regulator-name = "usb30_sec_gdsc";
reg = <0x110004 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
linux,phandle = <0x33e>;
phandle = <0x33e>;
};
qcom,gdsc@0x17d030 {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc";
reg = <0x17d030 0x4>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
linux,phandle = <0x20b>;
phandle = <0x20b>;
};
qcom,gdsc@0x17d03c {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc";
reg = <0x17d03c 0x4>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
linux,phandle = <0x20c>;
phandle = <0x20c>;
};
qcom,gdsc@0x17d034 {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_aggre_noc_mmu_tbu1_gdsc";
reg = <0x17d034 0x4>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
linux,phandle = <0x206>;
phandle = <0x206>;
};
qcom,gdsc@0x17d038 {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_aggre_noc_mmu_tbu2_gdsc";
reg = <0x17d038 0x4>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
linux,phandle = <0x207>;
phandle = <0x207>;
};
qcom,gdsc@0x17d040 {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc";
reg = <0x17d040 0x4>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
linux,phandle = <0x208>;
phandle = <0x208>;
};
qcom,gdsc@0x17d048 {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc";
reg = <0x17d048 0x4>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
linux,phandle = <0x209>;
phandle = <0x209>;
};
qcom,gdsc@0x17d044 {
compatible = "qcom,gdsc";
regulator-name = "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc";
reg = <0x17d044 0x4>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
status = "ok";
linux,phandle = <0x20a>;
phandle = <0x20a>;
};
qcom,gdsc@0xad06004 {
compatible = "qcom,gdsc";
regulator-name = "bps_gdsc";
reg = <0xad06004 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
qcom,support-hw-trigger;
linux,phandle = <0x248>;
phandle = <0x248>;
};
qcom,gdsc@0xad09004 {
compatible = "qcom,gdsc";
regulator-name = "ife_0_gdsc";
reg = <0xad09004 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
linux,phandle = <0x244>;
phandle = <0x244>;
};
qcom,gdsc@0xad0a004 {
compatible = "qcom,gdsc";
regulator-name = "ife_1_gdsc";
reg = <0xad0a004 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
linux,phandle = <0x245>;
phandle = <0x245>;
};
qcom,gdsc@0xad07004 {
compatible = "qcom,gdsc";
regulator-name = "ipe_0_gdsc";
reg = <0xad07004 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
qcom,support-hw-trigger;
linux,phandle = <0x246>;
phandle = <0x246>;
};
qcom,gdsc@0xad08004 {
compatible = "qcom,gdsc";
regulator-name = "ipe_1_gdsc";
reg = <0xad08004 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
qcom,support-hw-trigger;
linux,phandle = <0x247>;
phandle = <0x247>;
};
qcom,gdsc@0xad0b134 {
compatible = "qcom,gdsc";
regulator-name = "titan_top_gdsc";
reg = <0xad0b134 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
linux,phandle = <0x21d>;
phandle = <0x21d>;
};
qcom,gdsc@0xaf03000 {
compatible = "qcom,gdsc";
regulator-name = "mdss_core_gdsc";
reg = <0xaf03000 0x4>;
qcom,poll-cfg-gdscr;
qcom,support-hw-trigger;
status = "ok";
proxy-supply = <0x19>;
qcom,proxy-consumer-enable;
qcom,en-few-wait-val = <0x6>;
qcom,en-rest-wait-val = <0x5>;
linux,phandle = <0x19>;
phandle = <0x19>;
};
syscon@0x5091540 {
compatible = "syscon";
reg = <0x5091540 0x4>;
linux,phandle = <0x1a>;
phandle = <0x1a>;
};
qcom,gdsc@0x509106c {
compatible = "qcom,gdsc";
regulator-name = "gpu_cx_gdsc";
reg = <0x509106c 0x4>;
hw-ctrl-addr = <0x1a>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <0x1f4>;
qcom,clk-dis-wait-val = <0x8>;
status = "ok";
parent-supply = <0x1b>;
vdd_parent-supply = <0x1b>;
linux,phandle = <0x205>;
phandle = <0x205>;
};
qcom,gdsc@0x509100c {
compatible = "qcom,gdsc";
regulator-name = "gpu_gx_gdsc";
reg = <0x509100c 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
clock-names = "core_root_clk";
clocks = <0x1c 0x2>;
qcom,force-enable-root-clk;
parent-supply = <0x1d>;
domain-addr = <0x1e>;
sw-reset = <0x1f>;
qcom,reset-aon-logic;
linux,phandle = <0x335>;
phandle = <0x335>;
};
qcom,gdsc@0xab00874 {
compatible = "qcom,gdsc";
regulator-name = "vcodec0_gdsc";
reg = <0xab00874 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
qcom,support-hw-trigger;
linux,phandle = <0x2e3>;
phandle = <0x2e3>;
};
qcom,gdsc@0xab008b4 {
compatible = "qcom,gdsc";
regulator-name = "vcodec1_gdsc";
reg = <0xab008b4 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
qcom,support-hw-trigger;
linux,phandle = <0x2e4>;
phandle = <0x2e4>;
};
qcom,gdsc@0xab00814 {
compatible = "qcom,gdsc";
regulator-name = "venus_gdsc";
reg = <0xab00814 0x4>;
qcom,poll-cfg-gdscr;
status = "ok";
linux,phandle = <0x11e>;
phandle = <0x11e>;
};
qcom,mdss_dsi_pll@ae94a00 {
compatible = "qcom,mdss_dsi_pll_10nm";
label = "MDSS DSI 0 PLL";
cell-index = <0x0>;
#clock-cells = <0x1>;
reg = <0xae94a00 0x1e0 0xae94400 0x800 0xaf03000 0x8>;
reg-names = "pll_base", "phy_base", "gdsc_base";
clocks = <0x20 0x0>;
clock-names = "iface_clk";
clock-rate = <0x0>;
qcom,dsi-pll-ssc-en;
qcom,dsi-pll-ssc-mode = "down-spread";
gdsc-supply = <0x19>;
linux,phandle = <0x345>;
phandle = <0x345>;
qcom,platform-supply-entries {
#address-cells = <0x1>;
#size-cells = <0x0>;
qcom,platform-supply-entry@0 {
reg = <0x0>;
qcom,supply-name = "gdsc";
qcom,supply-min-voltage = <0x0>;
qcom,supply-max-voltage = <0x0>;
qcom,supply-enable-load = <0x0>;
qcom,supply-disable-load = <0x0>;
};
};
};
qcom,mdss_dsi_pll@ae96a00 {
compatible = "qcom,mdss_dsi_pll_10nm";
label = "MDSS DSI 1 PLL";
cell-index = <0x1>;
#clock-cells = <0x1>;
reg = <0xae96a00 0x1e0 0xae96400 0x800 0xaf03000 0x8>;
reg-names = "pll_base", "phy_base", "gdsc_base";
clocks = <0x20 0x0>;
clock-names = "iface_clk";
clock-rate = <0x0>;
qcom,dsi-pll-ssc-en;
qcom,dsi-pll-ssc-mode = "down-spread";
gdsc-supply = <0x19>;
linux,phandle = <0x352>;
phandle = <0x352>;
qcom,platform-supply-entries {
#address-cells = <0x1>;
#size-cells = <0x0>;
qcom,platform-supply-entry@0 {
reg = <0x0>;
qcom,supply-name = "gdsc";
qcom,supply-min-voltage = <0x0>;
qcom,supply-max-voltage = <0x0>;
qcom,supply-enable-load = <0x0>;
qcom,supply-disable-load = <0x0>;
};
};
};
qcom,mdss_dp_pll@c011000 {
compatible = "qcom,mdss_dp_pll_10nm";
label = "MDSS DP PLL";
cell-index = <0x0>;
#clock-cells = <0x1>;
reg = <0x88ea000 0x200 0x88eaa00 0x200 0x88ea200 0x200 0x88ea600 0x200 0xaf03000 0x8>;
reg-names = "pll_base", "phy_base", "ln_tx0_base", "ln_tx1_base", "gdsc_base";
gdsc-supply = <0x19>;
clocks = <0x20 0x0 0x21 0x0 0x22 0x9f 0x22 0xa9 0x22 0xa3>;
clock-names = "iface_clk", "ref_clk_src", "ref_clk", "cfg_ahb_clk", "pipe_clk";
clock-rate = <0x0>;
linux,phandle = <0x37>;
phandle = <0x37>;
qcom,platform-supply-entries {
#address-cells = <0x1>;
#size-cells = <0x0>;
qcom,platform-supply-entry@0 {
reg = <0x0>;
qcom,supply-name = "gdsc";
qcom,supply-min-voltage = <0x0>;
qcom,supply-max-voltage = <0x0>;
qcom,supply-enable-load = <0x0>;
qcom,supply-disable-load = <0x0>;
};
};
};
qcom,smp2pgpio-rdbg-2-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "rdbg";
qcom,remote-pid = <0x2>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x23>;
phandle = <0x23>;
};
qcom,smp2pgpio_client_rdbg_2_in {
compatible = "qcom,smp2pgpio_client_rdbg_2_in";
gpios = <0x23 0x0 0x0>;
};
qcom,smp2pgpio-rdbg-2-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "rdbg";
qcom,remote-pid = <0x2>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x24>;
phandle = <0x24>;
};
qcom,smp2pgpio_client_rdbg_2_out {
compatible = "qcom,smp2pgpio_client_rdbg_2_out";
gpios = <0x24 0x0 0x0>;
};
qcom,smp2pgpio-rdbg-1-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "rdbg";
qcom,remote-pid = <0x1>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x25>;
phandle = <0x25>;
};
qcom,smp2pgpio_client_rdbg_1_in {
compatible = "qcom,smp2pgpio_client_rdbg_1_in";
gpios = <0x25 0x0 0x0>;
};
qcom,smp2pgpio-rdbg-1-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "rdbg";
qcom,remote-pid = <0x1>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x26>;
phandle = <0x26>;
};
qcom,smp2pgpio_client_rdbg_1_out {
compatible = "qcom,smp2pgpio_client_rdbg_1_out";
gpios = <0x26 0x0 0x0>;
};
qcom,smp2pgpio-rdbg-5-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "rdbg";
qcom,remote-pid = <0x5>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x27>;
phandle = <0x27>;
};
qcom,smp2pgpio_client_rdbg_5_in {
compatible = "qcom,smp2pgpio_client_rdbg_5_in";
gpios = <0x27 0x0 0x0>;
};
qcom,smp2pgpio-rdbg-5-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "rdbg";
qcom,remote-pid = <0x5>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x28>;
phandle = <0x28>;
};
qcom,smp2pgpio_client_rdbg_5_out {
compatible = "qcom,smp2pgpio_client_rdbg_5_out";
gpios = <0x28 0x0 0x0>;
};
qcom,mdss_mdp@ae00000 {
compatible = "qcom,sde-kms";
reg = <0xae00000 0x81d40 0xaeb0000 0x2008 0xaeac000 0xf0>;
reg-names = "mdp_phys", "vbif_phys", "regdma_phys";
clocks = <0x22 0x1b 0x22 0x1c 0x20 0x0 0x20 0x1 0x20 0x17 0x20 0x24>;
clock-names = "gcc_iface", "gcc_bus", "iface_clk", "bus_clk", "core_clk", "vsync_clk";
clock-rate = <0x0 0x0 0x0 0x0 0x11e1a300 0x124f800 0x0>;
clock-max-rate = <0x0 0x0 0x0 0x0 0x19a14780 0x124f800 0x0>;
sde-vdd-supply = <0x19>;
interrupt-parent = <0x1>;
interrupts = <0x0 0x53 0x0>;
interrupt-controller;
#interrupt-cells = <0x1>;
iommus = <0x29 0x880 0x8 0x29 0xc80 0x8>;
#address-cells = <0x1>;
#size-cells = <0x0>;
#power-domain-cells = <0x0>;
qcom,sde-off = <0x1000>;
qcom,sde-len = <0x45c>;
qcom,sde-ctl-off = <0x2000 0x2200 0x2400 0x2600 0x2800>;
qcom,sde-ctl-size = <0xe4>;
qcom,sde-ctl-display-pref = "primary", "primary", "none", "none", "none";
qcom,sde-mixer-off = <0x45000 0x46000 0x47000 0x0 0x0 0x4a000>;
qcom,sde-mixer-size = <0x320>;
qcom,sde-mixer-display-pref = "primary", "primary", "none", "none", "none", "none";
qcom,sde-dspp-top-off = <0x1300>;
qcom,sde-dspp-top-size = <0xc>;
qcom,sde-dspp-off = <0x55000 0x57000 0x59000 0x5b000>;
qcom,sde-dspp-size = <0x17e0>;
qcom,sde-dest-scaler-top-off = <0x61000>;
qcom,sde-dest-scaler-top-size = <0xc>;
qcom,sde-dest-scaler-off = <0x800 0x1000>;
qcom,sde-dest-scaler-size = <0x800>;
qcom,sde-wb-off = <0x66000>;
qcom,sde-wb-size = <0x2c8>;
qcom,sde-wb-xin-id = <0x6>;
qcom,sde-wb-id = <0x2>;
qcom,sde-wb-clk-ctrl = <0x3b8 0x18>;
qcom,sde-intf-off = <0x6b000 0x6b800 0x6c000 0x6c800>;
qcom,sde-intf-size = <0x280>;
qcom,sde-intf-type = "dp", "dsi", "dsi", "dp";
qcom,sde-pp-off = <0x71000 0x71800 0x72000 0x72800 0x73000>;
qcom,sde-pp-slave = <0x0 0x0 0x0 0x0 0x1>;
qcom,sde-pp-size = <0xd4>;
qcom,sde-te2-off = <0x2000 0x2000 0x0 0x0 0x0>;
qcom,sde-cdm-off = <0x7a200>;
qcom,sde-cdm-size = <0x224>;
qcom,sde-dsc-off = <0x81000 0x81400 0x81800 0x81c00>;
qcom,sde-dsc-size = <0x140>;
qcom,sde-dither-off = <0x30e0 0x30e0 0x30e0 0x30e0 0x0>;
qcom,sde-dither-version = <0x10000>;
qcom,sde-dither-size = <0x20>;
qcom,sde-sspp-type = "vig", "vig", "vig", "vig", "dma", "dma", "dma", "dma";
qcom,sde-sspp-off = <0x5000 0x7000 0x9000 0xb000 0x25000 0x27000 0x29000 0x2b000>;
qcom,sde-sspp-src-size = <0x1c8>;
qcom,sde-sspp-xin-id = <0x0 0x4 0x8 0xc 0x1 0x5 0x9 0xd>;
qcom,sde-sspp-excl-rect = <0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1>;
qcom,sde-sspp-smart-dma-priority = <0x5 0x6 0x7 0x8 0x1 0x2 0x3 0x4>;
qcom,sde-smart-dma-rev = "smart_dma_v2";
qcom,sde-mixer-pair-mask = <0x2 0x1 0x6 0x0 0x0 0x3>;
qcom,sde-mixer-blend-op-off = <0x20 0x38 0x50 0x68 0x80 0x98 0xb0 0xc8 0xe0 0xf8 0x110>;
qcom,sde-sspp-clk-ctrl = <0x2ac 0x0 0x2b4 0x0 0x2bc 0x0 0x2c4 0x0 0x2ac 0x8 0x2b4 0x8 0x2bc 0x8 0x2c4 0x8>;
qcom,sde-sspp-csc-off = <0x1a00>;
qcom,sde-csc-type = "csc-10bit";
qcom,sde-qseed-type = "qseedv3";
qcom,sde-sspp-qseed-off = <0xa00>;
qcom,sde-mixer-linewidth = <0xa00>;
qcom,sde-sspp-linewidth = <0xa00>;
qcom,sde-wb-linewidth = <0x1000>;
qcom,sde-mixer-blendstages = <0xb>;
qcom,sde-highest-bank-bit = <0x2>;
qcom,sde-ubwc-version = <0x200>;
qcom,sde-smart-panel-align-mode = <0xc>;
qcom,sde-panic-per-pipe;
qcom,sde-has-cdp;
qcom,sde-has-src-split;
qcom,sde-has-dim-layer;
qcom,sde-has-idle-pc;
qcom,sde-has-dest-scaler;
qcom,sde-max-dest-scaler-input-linewidth = <0x800>;
qcom,sde-max-dest-scaler-output-linewidth = <0xa00>;
qcom,sde-max-bw-low-kbps = <0x927c00>;
qcom,sde-max-bw-high-kbps = <0x927c00>;
qcom,sde-min-core-ib-kbps = <0x493e00>;
qcom,sde-min-llcc-ib-kbps = <0xc3500>;
qcom,sde-min-dram-ib-kbps = <0xc3500>;
qcom,sde-dram-channels = <0x2>;
qcom,sde-num-nrt-paths = <0x0>;
qcom,sde-dspp-ad-version = <0x40000>;