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请教关于dcache中ld、sc指令处理的问题。 #1333
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第一个问题: lrscCycles 是为了支持 RISC-V spec 定义的 关于 lrscBackoff, 这是历史遗留的冗余代码. rocket 中使用这一机制来保证在出现大量 LR 时, probe 能有机会执行. 香山目前没有这一机制. 第二个问题: 关于 LR / SC, 手册给出了这样的要求:
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感谢回复。 |
#1383 添加了 lrsc backoff 机制。现在香山可以在双核场景下存在大量连续的 lr 时回避活锁。 |
dcache中ld/sc指令的相关代码如下:
XiangShan/src/main/scala/xiangshan/cache/dcache/mainpipe/MainPipe.scala
Lines 378 to 399 in 705cbec
第一个问题是lrscCycles为啥是100,lrscBackoff为啥是3,当然如注释所说指令集定义是ld、sc之间最多16 instructions,但是我不太明白为什么,也不太明白怎么就由此算出了lrscCycles和lrscBackoff。
第二个问题是请问在一条ld指令之后是否会再出现一条ld指令,出现嵌套?
谢谢
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