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ctcadpt.c
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ctcadpt.c
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/* CTCADPT.C (c) Copyright James A. Pierson, 2002-2012 */
/* (c) Copyright Roger Bowler, 2000-2012 */
/* (c) Copyright Willem Konynenberg, 2000-2009 */
/* (c) Copyright Vic Cross, 2001-2009 */
/* Hercules Channel-to-Channel Emulation Support */
// vmnet (C) Copyright Willem Konynenberg, 2000-2009
// CTCT (C) Copyright Vic Cross, 2001-2009
// CTCE (C) Copyright Peter J. Jansen, 2014-2020
// Notes:
// This module contains the remaining CTC emulation modes that
// have not been moved to seperate modules. There is also logic
// to allow old style 3088 device definitions for compatibility
// and may be removed in a future release.
//
// Please read README.NETWORKING for more info.
//
#include "hstdinc.h"
#define _CTCADPT_C_
#define _HENGINE_DLL_
#include "hercules.h"
#include "devtype.h"
#include "ctcadpt.h"
#include "opcode.h"
#include "devtype.h"
// --------------------------------------------------------------------
// The following macro's attempt to maximize source commonality between
// different Hercules versions, whilst adhering to different styles.
// --------------------------------------------------------------------
#define CTCE_DEVNUM(p) SSID_TO_LCSS(p->ssid), p->devnum
#define CTCX_DEVNUM(p) p->devnum
#define CCWC U16 // sCount, Residual
#ifndef PRIu64
#define PRIu64 "lld"
#endif
#define SHIFT_MEGABYTE 20
#define STRLCAT( dst, src ) strlcat( (dst), (src), sizeof(dst) )
#define UNREACHABLE_CODE(c) c;
#define CASSERT( a, b ) typedef char cassert_bypassed
// --------------------------------------------------------------------
// CTCE_FSM_CELL for the Finite State Machine (FSM) table cells.
// --------------------------------------------------------------------
typedef struct _CTCE_FSM_CELL {
BYTE new_state;
BYTE x_unit_stat;
BYTE y_unit_stat;
BYTE actions;
}
CTCE_FSM_CELL;
// --------------------------------------------------------------------
// CTCE_INFO also for use by CTCE Tracing when requested
// --------------------------------------------------------------------
typedef struct _CTCE_INFO
{
CTCE_FSM_CELL fsm; /* Current FSM table cell */
BYTE state_x_prev; /* This side previous state */
BYTE state_y_prev; /* Other side previous state */
BYTE actions; /* Triggered by CCW received */
BYTE state_new; /* The updated FSM state */
BYTE x_unit_stat; /* Resulting device unit stat */
BYTE scb; /* Last SCB returned */
BYTE sas[2]; /* Last SAS 2 SENSE bytes ret.*/
BYTE busy_waits; /* Number of times waited for */
/* a Busy condition to end */
BYTE de_ready; /* Device-End status */
/* indicating ready to be */
/* presented, yielding ... */
u_int sent : 1; /* = 1 : CTCE_Send done */
u_int attn_can : 1; /* = 1 : Atttention Cancelled */
u_int con_lost : 1; /* = 1 : contention lost */
u_int con_won : 1; /* = 1 : contention won */
u_int sel_reset : 1; /* = 1 : selective reset */
int wait_rc; /* CTCE_Send Wait RC if used */
/* from transition to */
/* "Working(D)" state. */
int de_ready_attn_rc; /* device_attention RC */
int working_attn_rc; /* device_attention RC */
}
CTCE_INFO;
// --------------------------------------------------------------------
// CTCE_Cmd_Xfr enumeration type used by CTCE_Trace
// --------------------------------------------------------------------
enum CTCE_Cmd_Xfr
{
CTCE_LCL, /* Cmd remains Local only */
CTCE_SND, /* Cmd Sent to y-side */
CTCE_RCV, /* Cmd Received from y-side */
CTCE_SND_NS, /* Cmd Send not possible */
CTCE_SND_NSR /* Cmd Send not poasible and */
/* also not receiving */
};
// --------------------------------------------------------------------
// CTCE_Sok_Use enumeration type used by CTCE_Get_Socket
// ---------------------------------------------------------------------------
enum CTCE_Sok_Use
{
CTCE_SOK_LIS, /* Socket for listen() */
CTCE_SOK_CON /* Socket for connect() */
};
// ====================================================================
// Declarations
// ====================================================================
static int CTCT_Init( DEVBLK *dev, int argc, char *argv[] );
static void CTCT_Read( DEVBLK* pDEVBLK, CCWC sCount,
BYTE* pIOBuf, BYTE* pUnitStat,
CCWC* pResidual, BYTE* pMore );
static void CTCT_Write( DEVBLK* pDEVBLK, CCWC sCount,
BYTE* pIOBuf, BYTE* pUnitStat,
CCWC* pResidual );
static void* CTCT_ListenThread( void* argp );
static void CTCE_ExecuteCCW( DEVBLK* pDEVBLK, BYTE bCode,
BYTE bFlags, BYTE bChained,
CCWC sCount, BYTE bPrevCode,
int iCCWSeq, BYTE* pIOBuf,
BYTE* pMore, BYTE* pUnitStat,
CCWC* pResidual );
static int CTCE_Init( DEVBLK *dev, int argc, char *argv[] );
static int CTCE_Start_Listen_Connect_Threads( DEVBLK *dev );
static int CTCE_Start_ConnectThread( DEVBLK *dev );
static void CTCE_Send( DEVBLK* pDEVBLK,
const CCWC sCount,
BYTE* pIOBuf,
BYTE* pUnitStat,
CCWC* pResidual,
CTCE_INFO* pCTCE_Info );
static void* CTCE_RecvThread( void* argp );
static void* CTCE_ListenThread( void* argp );
static void CTCE_Reset( DEVBLK* pDEVBLK );
static U32 CTCE_ChkSum( const BYTE* pBuf, const U16 BufLen );
static void CTCE_Trace( DEVBLK* pDEVBLK,
const enum CTCE_Cmd_Xfr eCTCE_Cmd_Xfr,
const CTCE_INFO* pCTCE_Info,
const BYTE* pUnitStat );
static void* CTCE_ConnectThread( void* argp );
static int CTCE_Get_Socket( DEVBLK* dev,
const enum CTCE_Sok_Use eCTCE_Sok_Use );
static int CTCE_Write_Init( DEVBLK* dev,
const int fd );
static int CTCE_Recovery( DEVBLK* dev );
static int CTCE_Build_RCD( DEVBLK* dev,
BYTE* buffer,
int bufsz );
void CTCE_Query( DEVBLK* pDEVBLK,
char** ppszClass,
int iBufLen,
char* pBuffer );
int CTCE_Close( DEVBLK* pDEVBLK );
static int VMNET_Init( DEVBLK *dev, int argc, char *argv[] );
static int VMNET_Write( DEVBLK *dev, BYTE *iobuf,
U16 count, BYTE *unitstat );
static int VMNET_Read( DEVBLK *dev, BYTE *iobuf,
U16 count, BYTE *unitstat );
// --------------------------------------------------------------------
// Definitions for CTC general data blocks
// --------------------------------------------------------------------
typedef struct _CTCG_PARMBLK
{
int listenfd;
struct sockaddr_in addr;
DEVBLK* dev;
}
CTCG_PARMBLK;
// --------------------------------------------------------------------
// CTCE Send-Receive Socket Prefix at the start of the DEVBLK buf
// --------------------------------------------------------------------
typedef struct _CTCE_SOKPFX
{
union
{
struct
{
BYTE CmdReg; /* CTCE command register */
BYTE FsmSta; /* CTCE FSM state */
CCWC sCount; /* CTCE sCount copy */
U16 PktSeq; /* CTCE Packet Sequence ID */
};
struct /* Overlay used on 1st R/W by */
{ /* Hercules (NOT guest OS) : */
U16 ctce_herc; /* CTCE other (y-)side info */
U16 ctce_lport; /* CTCE y-side listening port */
struct in_addr
ctce_ipaddr; /* CTCE our ipaddr for y-side */
};
};
U16 SndLen; /* CTCE Packet Sent Length */
U16 devnum; /* CTCE Sender's devnum */
U16 ssid; /* CTCE Sender's ssid */
}
CTCE_SOKPFX;
// --------------------------------------------------------------------
// CTCE Equivalent of CTCG_PARMBLK (used to pass thread arguments)
// --------------------------------------------------------------------
typedef struct _CTCE_PARMBLK
{
int fd; /* socket file descriptor */
struct sockaddr_in addr;
DEVBLK* dev;
}
CTCE_PARMBLK;
// --------------------------------------------------------------------
// CTCE Constants (generated by a small REXX script)
// --------------------------------------------------------------------
#define CTCE_PREPARE 0
#define CTCE_CONTROL 1
#define CTCE_READ 2
#define CTCE_WRITE 3
#define CTCE_SENSE_COMMAND_BYTE 4
#define CTCE_READ_BACKWARD 6
#define CTCE_WRITE_END_OF_FILE 7
#define CTCE_NO_OPERATION 8
#define CTCE_SET_EXTENDED_MODE 9
#define CTCE_SENSE_ADAPTER_STATE 10
#define CTCE_SENSE_ID 11
#define CTCE_READ_CONFIG_DATA 12
#define CTCE_SET_BASIC_MODE 15
static char *CTCE_CmdStr[16] = {
"PRE" , // 0 = 00 = Prepare
"CTL" , // 1 = 01 = Control
"RED" , // 2 = 02 = Read
"WRT" , // 3 = 03 = Write
"SCB" , // 4 = 04 = Sense Command Byte
"???" , // 5 = 05 = Not Used
"RBK" , // 6 = 06 = Read Backward
"WEF" , // 7 = 07 = Write End Of File
"NOP" , // 8 = 10 = No Operation
"SEM" , // 9 = 11 = Set Extended Mode
"SAS" , // 10 = 12 = Sense Adapter State
"SID" , // 11 = 13 = Sense ID
"RCD" , // 12 = 14 = Read Configuration Data
"INV" , // 13 = 15 = Invalid Command Code
"RST" , // 14 = 16 = Invalid Command Code Used to Report SCB 0 after a Reset
"SBM" // 15 = 17 = Set Basic Mode
};
static BYTE CTCE_command[256] = {
14, 3, 2, 8,10, 3, 2, 1,13, 3, 2, 8, 6, 3, 2, 1,
13, 3, 2, 8, 4, 3, 2, 1,13, 3, 2, 8, 6, 3, 2, 1,
13, 3, 2, 8,13, 3, 2, 1,13, 3, 2, 8, 6, 3, 2, 1,
13, 3, 2, 8, 4, 3, 2, 1,13, 3, 2, 8, 6, 3, 2, 1,
13, 3, 2,15,13, 3, 2, 1,13, 3, 2,15, 6, 3, 2, 1,
13, 3, 2,15, 4, 3, 2, 1,13, 3, 2,15, 6, 3, 2, 1,
13, 3, 2,15,13, 3, 2, 1,13, 3, 2,15, 6, 3, 2, 1,
13, 3, 2,15, 4, 3, 2, 1,13, 3, 2,15, 6, 3, 2, 1,
13, 7, 2, 8,13, 7, 2, 1,13, 7, 2, 8, 6, 7, 2, 1,
13, 7, 2, 8, 4, 7, 2, 1,13, 7, 2, 8, 6, 7, 2, 1,
13, 7, 2, 8,13, 7, 2, 1,13, 7, 2, 8, 6, 7, 2, 1,
13, 7, 2, 8, 4, 7, 2, 1,13, 7, 2, 8, 6, 7, 2, 1,
13, 7, 2, 9,12, 7, 2, 1,13, 7, 2,13, 6, 7, 2, 1,
13, 7, 2,13, 4, 7, 2, 1,13, 7, 2,13, 6, 7, 2, 1,
13, 7, 2, 0,11, 7, 2, 1,13, 7, 2,13, 6, 7, 2, 1,
13, 7, 2,13, 4, 7, 2, 1,13, 7, 2,13, 6, 7, 2, 1
};
/* In base (non-extended) mode the WEOF (WEF) */
/* command does not exist but classifies as */
/* a regular WRITE command. The WEOF-to-WRT */
/* mapping is performed with this macro: */
/* fine CTCE_CMD(c) (pDEVBLK->ctcxmode == 1 ? (CTCE_command[c]) : \ */
#define CTCE_CMD( c ) ( pDEVBLK->ctcxmode || pDEVBLK->ctce_remote_xmode ? (CTCE_command[c]) : \
((CTCE_command[c])==7 ? 3 : (CTCE_command[c])))
#define IS_CTCE_CCW_PRE(c) ((CTCE_command[c]==0))
#define IS_CTCE_CCW_CTL(c) ((CTCE_command[c]==1))
#define IS_CTCE_CCW_RED(c) ((CTCE_command[c]==2))
#define IS_CTCE_CCW_WRT(c) ((CTCE_CMD( c) ==3))
#define IS_CTCE_CCW_SCB(c) ((CTCE_command[c]==4))
#define IS_CTCE_CCW_RBK(c) ((CTCE_command[c]==6))
#define IS_CTCE_CCW_WEF(c) ((CTCE_CMD( c )==7))
#define IS_CTCE_CCW_NOP(c) ((CTCE_command[c]==8))
#define IS_CTCE_CCW_SEM(c) ((CTCE_command[c]==9))
#define IS_CTCE_CCW_SBM(c) ((CTCE_command[c]==15))
#define IS_CTCE_CCW_SAS(c) ((CTCE_command[c]==10))
#define IS_CTCE_CCW_SID(c) ((CTCE_command[c]==11))
#define IS_CTCE_CCW_RCD(c) ((CTCE_command[c]==12))
#define IS_CTCE_CCW_DEP(c) ((CTCE_CMD( c )<7)) /* Any Dependent Command */
#define IS_CTCE_CCW_RDA(c) (((CTCE_command[c]&0xFB)==2)) /* Read or Read Backward */
#define IS_CTCE_CCW_WRA(c) (((CTCE_command[c]&0xFB)==3)) /* Write or Write EOF */
/* CTCE devices can be Reset (RST), not with */
/* a CCW command, but via the device handler */
/* CTCE_Halt, which gets called following a */
/* HSCH or CSCH instruction. It is encoded */
/* via a synthetic CCW command "bCode_reset" */
/* which is 0x00 as an RST needs to result in */
/* a zero y command register setting. */
/* A zero CCW input to CTCE_ExecuteCCW gets */
/* converted to a CCW of 8 which is invalid. */
/* Only when received from the other (y-)side */
/* will a zero CCW be accepted, as an RST. */
#define IS_CTCE_RST(c) ((CTCE_command[c]==14))
#define bCode_reset (0x00)
#define bCode_invalid (0x08)
/* Macros for classifying CTC states follow. */
/* These are numbered 0 thru 7 as per the */
/* column numbers 0-3 and 4-7 in the table */
/* in section 2.13 in SA22-7203-00 by IBM, */
/* which is (alomost) the same as the table */
/* in section 3.15 in SA22-7901-01 by IBM. */
/* */
/* But in base (non-extended) mode, the table */
/* in section 2.13 in SA77-7901-01 applies, */
/* omitting column 5 for the Not-Ready state: */
/* base (non-extended) mode considers this */
/* the same as Available. We perform this */
/* Base-Not-Ready mapping into Available with */
/* this macro: */
/* fine CTCE_STATE(c) (pDEVBLK->ctcxmode == 1 ? ((c)&0x07) : \ */
#define CTCE_STATE( c ) ( pDEVBLK->ctcxmode || pDEVBLK->ctce_remote_xmode ? ((c)&0x07) : \
(((c)&0x07)==0x05 ? 0x04 : ((c)&0x07)))
#define IS_CTCE_YWP(c) (((c)&0x07)==0x00)
#define IS_CTCE_YWC(c) (((c)&0x07)==0x01)
#define IS_CTCE_YWR(c) (((c)&0x07)==0x02)
#define IS_CTCE_YWW(c) (((c)&0x07)==0x03)
#define IS_CTCE_YAV(c) ((CTCE_STATE(c))==0x04)
#define IS_CTCE_YNR(c) ((CTCE_STATE(c))==0x05)
/* These two are useful combinations : */
/* - The 0 (YWP) or 4 (YAV) states READY */
#define IS_CTCE_YAP(c) (((CTCE_STATE(c))&0x03)==0x00)
/* - Any Y working state: YWP, YWC, YWR or YWW */
#define IS_CTCE_YWK(c) (((c)&0x04)==0x00)
/* - Any of the states Cntl, Read, or Write */
#define IS_CTCE_CRW(c) ((((c)&0x04)==0x00) && (((c)&0x07)!=0x00))
/* A special one is "X available" (XAV) which */
/* includes the not ready state. */
#define IS_CTCE_XAV(c) (((c)<6))
/* Useful SET macros for the above. */
#define SET_CTCE_YAV(c) (c=(((c)&0xF8)|0x04))
#define SET_CTCE_YNR(c) (c=(((c)&0xF8)|0x05))
/* One letter CTC state abbreviations */
static char *CTCE_StaStr[8] = {"P", "C", "R", "W", "A", "N", "X", "I"};
/* The CTCE CCW command will trigger actions */
/* which are dependent on the CTCE state. */
/* These different action flags are : */
#define CTCE_WEOF (0x80)
#define CTCE_SEND (0x40)
#define CTCE_WAIT (0x20)
#define CTCE_ATTN (0x10)
#define CTCE_MATCH (0x08)
/* Corresponding macros to test for these */
#define IS_CTCE_WEOF(c) (((c)&CTCE_WEOF)==CTCE_WEOF)
#define IS_CTCE_SEND(c) (((c)&CTCE_SEND)==CTCE_SEND)
#define IS_CTCE_WAIT(c) (((c)&CTCE_WAIT)==CTCE_WAIT)
#define IS_CTCE_ATTN(c) (((c)&CTCE_ATTN)==CTCE_ATTN)
#define IS_CTCE_MATCH(c) (((c)&CTCE_MATCH)==CTCE_MATCH)
/* And the corresponding SET macros for these */
#define SET_CTCE_WEOF(c) (c|=CTCE_WEOF)
#define SET_CTCE_SEND(c) (c|=CTCE_SEND)
#define SET_CTCE_WAIT(c) (c|=CTCE_WAIT)
#define SET_CTCE_ATTN(c) (c|=CTCE_ATTN)
#define SET_CTCE_MATCH(c) (c|=CTCE_MATCH)
/* And the corresponding CLeaR macros */
#define CLR_CTCE_WEOF(c) (c&=~CTCE_WEOF)
#define CLR_CTCE_SEND(c) (c&=~CTCE_SEND)
#define CLR_CTCE_WAIT(c) (c&=~CTCE_WAIT)
#define CLR_CTCE_ATTN(c) (c&=~CTCE_ATTN)
#define CLR_CTCE_MATCH(c) (c&=~CTCE_MATCH)
/* To CLeaR all flags */
#define CLR_CTCE_ALLF(c) (c&=~CTCE_WEOF)
/* Enhanced CTC processing is selected by */
/* omitting default MTU bufsize CTCE_MTU_MIN, */
/* or by specifying a larger number. The */
/* default is equal to 62552, calculated as */
/* sizeof(CTCE_SOKPFX==16) + */
/* sizeof(U16=pSokBuf->sCount==2) + */
/* 62534 (==0xF446) */
/* the latter number is the largest data */
/* sCount seen used by CTC programs to date. */
/* If that number would be too small one day, */
/* a severe error message will instruct the */
/* user to specify an increased MTU bufsize */
/* in the device configuration statement. */
#define CTCE_MTU_MIN ( (int)( 62534 + sizeof(CTCE_SOKPFX) + sizeof(U16 /* sCount */) ) )
#define CTCE_RESET_TYPE \
( ( pDEVBLK->scsw.flag2 & ( SCSW2_FC_HALT ) ) ) ? "Halt Reset" : "" \
, ( ( pDEVBLK->scsw.flag2 & ( SCSW2_FC_CLEAR ) ) ) ? "Clear Reset" : "" \
, ( ( ! ( pDEVBLK->scsw.flag2 & ( SCSW2_FC_HALT | SCSW2_FC_CLEAR ) ) ) && \
! ( IS_CTCE_CRW( pDEVBLK->ctcexState ) | IS_CTCE_CRW( pDEVBLK->ctceyState ) ) ) ? "System Reset" : "" \
, ( ( ! ( pDEVBLK->scsw.flag2 & ( SCSW2_FC_HALT | SCSW2_FC_CLEAR ) ) ) && \
( IS_CTCE_CRW( pDEVBLK->ctcexState ) | IS_CTCE_CRW( pDEVBLK->ctceyState ) ) ) ? "Selective Reset" : ""
/**********************************************************************/
/* A summary of the Channel-to-Channel command operations this CTCE */
/* device emulates can be found in IBM publications SA22-7203-00 in */
/* section 2.13, and in SA22-7091-01 sections 2.13 and 3.15. The */
/* tables show the device states of both sides, and the influence of */
/* CCW commands depending on this state. Our CTCE implemention is */
/* assisted by a Finite State Machine (FSM) table closely matching */
/* the figures in these prublications. */
/* */
/* Eeach CTCE side is in a given state at any point in time, which */
/* corresponds to the columns in the FSM table, matching columns 0 */
/* through 7 in the publications mentionned. Each CCW command has a */
/* row in the FSM table. A CCW command received will (1) trigger a */
/* transition to a new_state, (2) cause a Unit Status update, and (3) */
/* cause a number of actions to be carried out. */
/* */
/* The FSM table coding is assisted with macro's for the state each */
/* CTCE side (x=local, y=remote) can have, matching the FSM column */
/* column numbers 0-7: Prepare, Control, Read, Write, Available, */
/* Not-ready, X-working (=P/C/R/W) or Int-pending, all represented by */
/* a single letter: P, C, R, W, A, N, X, I. Additionally, the CTCE */
/* FSM table uses U for Unchanged to cover the case of no state */
/* change whatsoever, e.g. for CCW commands SAS, SID, RCD and others. */
/* Please see macro's CTCE_NEW_X_STATE & CTCE_NEW_Y_STATE down below. */
/**********************************************************************/
#define P 0
#define C 1
#define R 2
#define W 3
#define A 4
#define N 5
#define X 6
#define I 7
#define U 255
/**********************************************************************/
/* Each CTCE FSM table entry contains a macro up to 7 letters long: */
/* */
/* +---------- new_state = P, C, R, W, A or U */
/* |++-------- Unit Status bits encoded with up to two letters: */
/* ||| . UC = Unit Check */
/* ||| . C_ = CE */
/* ||| . E_ = CE + DE */
/* ||| . EU = CD + CE + UC */
/* ||| . BA = BUSY + ATTN */
/* ||| . B = BUSY */
/* |||+------- S = Send this commands also to the other (y-)side */
/* ||||+------ M = a Matching command for the other (y-)side */
/* |||||+----- W = our (x-)side must Wait for a matching command */
/* ||||||+---- A = cause Attention interrupt at the other y-side */
/* ||||||| */
#define PC_S_W { P, CSW_CE , 0, CTCE_SEND | CTCE_WAIT }
#define C__S_WA { C, 0 , 0, CTCE_SEND | CTCE_WAIT | CTCE_ATTN }
#define R__S_WA { R, 0 , 0, CTCE_SEND | CTCE_WAIT | CTCE_ATTN }
#define W__S_WA { W, 0 , 0, CTCE_SEND | CTCE_WAIT | CTCE_ATTN }
#define CC_SMW { C, CSW_CE , 0, CTCE_SEND | CTCE_MATCH | CTCE_WAIT }
#define R__SMW { R, 0 , 0, CTCE_SEND | CTCE_MATCH | CTCE_WAIT }
#define W__SMW { W, 0 , 0, CTCE_SEND | CTCE_MATCH | CTCE_WAIT }
#define AE_SM { A, CSW_CE | CSW_DE , 0, CTCE_SEND | CTCE_MATCH }
#define NEUSM { N, CSW_CE | CSW_DE | CSW_UC, 0, CTCE_SEND | CTCE_MATCH }
#define NEUS { N, CSW_CE | CSW_DE | CSW_UC, 0, CTCE_SEND }
#define AE_S { A, CSW_CE | CSW_DE , 0, CTCE_SEND }
#define AUCS { A, CSW_UC, 0, CTCE_SEND }
#define E_S { U, CSW_CE | CSW_DE , 0, CTCE_SEND }
#define E_ { U, CSW_CE | CSW_DE , 0, 0 }
#define B { U, CSW_BUSY , 0, 0 }
#define BA { U, CSW_BUSY | CSW_ATTN , 0, 0 }
#define UC { U, CSW_UC, 0, 0 }
#define UCS { U, CSW_UC, 0, CTCE_SEND }
#define N__S { N, 0 , 0, CTCE_SEND }
/**********************************************************************/
/* Now finally the CTCE FSM table: */
/**********************************************************************/
static const CTCE_FSM_CELL CTCE_Fsm[16][8] = {
/* cmd/stat P C R W A N X I */
/* PRE */ {AE_SM , E_ , E_ , E_ ,PC_S_W ,AUCS , B , B },
/* CTL */ {CC_SMW , BA , BA , BA ,C__S_WA,AUCS , B , B },
/* RED */ {R__SMW , BA , BA ,AE_SM ,R__S_WA,AUCS , B , B },
/* WRT */ {W__SMW , BA ,AE_SM , BA ,W__S_WA,AUCS , B , B },
/* SCB */ { E_ ,AE_SM , E_ , E_ , E_ ,AUCS , B , B },
/* nus */ { UC , UC , UC , UC , UC , UC , B , B },
/* RBK */ {R__SMW , BA , BA ,AE_SM ,R__S_WA,AUCS , B , B },
/* WEF */ { E_S , BA ,AE_SM , BA , E_S ,AUCS , B , B },
/* NOP */ { E_S , BA , BA , BA ,AE_S ,AUCS , B , B },
/* SEM */ { E_S , BA , BA , BA ,AE_S ,AUCS , B , B },
/* SAS */ { E_ , E_ , E_ , E_ , E_ , E_ , B , B },
/* SID */ { E_ , E_ , E_ , E_ , E_ , E_ , B , B },
/* RCD */ { E_ , E_ , E_ , E_ , E_ , E_ , B , B },
/* inv */ { UC , UC , UC , UC , UC , UC , B , B },
/* RST */ {NEUSM ,NEUSM ,NEUSM ,NEUSM ,N__S ,N__S ,NEUS ,NEUS },
/* SBM */ { E_S , BA , BA , BA ,AE_S ,AUCS , B , B }
};
#undef P
#undef C
#undef R
#undef W
#undef A
#undef N
#undef X
#undef I
#undef U
#undef PC_S_W
#undef C__S_WA
#undef R__S_WA
#undef W__S_WA
#undef CC_SMW
#undef R__SMW
#undef W__SMW
#undef AE_SM
#undef NEUSM
#undef NEU
#undef ACDS
#undef AUCS
#undef E_S
#undef E_
#undef B
#undef BA
#undef UC
#undef UCS
#undef N__S
#define CTCE_ACTIONS_PRT(s) IS_CTCE_WEOF(s) ? " WEOF" : "" \
, IS_CTCE_WAIT(s) ? " WAIT" : "" \
, IS_CTCE_MATCH(s) ? " MATCH" : "" \
, IS_CTCE_ATTN(s) ? " ATTN" : ""
#define CTCE_X_STATE_FSM_IDX \
( ( ( pDEVBLK->ctcexState & 0x04 ) == 0x00 ) ? 0x06 : CTCE_STATE( pDEVBLK->ctceyState ) )
#define CTCE_Y_STATE_FSM_IDX \
( ( ( pDEVBLK->ctceyState & 0x04 ) == 0x00 ) ? 0x06 : CTCE_STATE( pDEVBLK->ctcexState ) )
#define CTCE_NEW_X_STATE(c) \
( ( CTCE_Fsm[CTCE_CMD( c )][CTCE_X_STATE_FSM_IDX].new_state != 255 ) ? \
( CTCE_Fsm[CTCE_CMD( c )][CTCE_X_STATE_FSM_IDX].new_state ) : \
( pDEVBLK->ctcexState & 0x07 ) )
#define CTCE_NEW_Y_STATE(c) \
( ( CTCE_Fsm[CTCE_CMD( c )][CTCE_Y_STATE_FSM_IDX].new_state != 255 ) ? \
( CTCE_Fsm[CTCE_CMD( c )][CTCE_Y_STATE_FSM_IDX].new_state ) : \
( pDEVBLK->ctceyState & 0x07 ) )
#define CTCE_DISABLE_NAGLE
#define CTCE_DEFAULT_RPORT ( 3088 )
#define CTCE_DEFAULT_LISTEN_PORT ( 3088 )
/* CTCE CCW tracing shows all CTC CCW commands as well as Reset actions */
/* (which are processed as synthetic commands) on the local (x-)side, as */
/* well as received from the remote (y-)side of the CTC connection. */
/* The Hercules generic CCW tracing (t+ and t- commands) includes this. */
/* The "ctc debug { on | off | startup } <devnum>" comamnd can be used */
/* to limit the tracing to the CTC commands avoiding the channel traces. */
/* The startup option produces CTCE command traces during startup only, */
/* disabling itself after a limited number of CTC commands, or after a */
/* matching read / write command pair. Unexpected errors (re-)trigger */
/* the limited startup trace automatically in any case. */
/* This temporary CTCE CCW tracing is handy for debugging CTCE startup, */
/* or intermittent connectivity problems which may re-trigger startup. */
/* Permanent tracing is when dev->ctce_trace_cntr == CTCE_TRACE_ON, and */
/* dev->ctce_trace_cntr > 0 causes temporary tracing until the counter */
/* is decremented reaching zero. */
#define CTCE_CCWTRACE( dev ) \
( dev->ccwtrace || dev->ccwstep || \
( dev->ctce_trace_cntr == CTCE_TRACE_ON ) || \
( ( dev->ctce_trace_cntr > 0 ) && ( dev->ctce_trace_cntr-- ) ) )
#define CTCE_RESTART_CCWTRACE( dev ) ( ( dev->ctce_trace_cntr >= 0 ) && \
( dev->ctce_trace_cntr = CTCE_TRACE_STARTUP ) )
#define CTCE_ERROR_CCWTRACE( dev ) \
( dev->ctce_trace_cntr = CTCE_TRACE_STARTUP )
/* CTCE_HERC_... items are communicated in ctce_herc in the first send */
/* following a socket connect(). It contains Hercules and NOT guest OS */
/* status information. */
#define CTCE_HERC_ONLY ( 0x8000 )
#define CTCE_HERC_RECV ( 0x8001 )
/**********************************************************************/
/* This table is used by channel.c to determine if a CCW code is an */
/* immediate command or not */
/* The table is addressed in the DEVHND structure as 'DEVIMM immed' */
/* 0 : Command is NOT an immediate command */
/* 1 : Command is an immediate command */
/* Note : An immediate command is defined as a command which returns */
/* CE (channel end) during initialisation (that is, no data is */
/* actually transfered). In this case, IL is not indicated for a CCW */
/* Format 0 or for a CCW Format 1 when IL Suppression Mode is in */
/* effect */
/**********************************************************************/
static BYTE CTCE_immed_commands[256] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
0,0,0,1,0,0,0,1,0,0,0,1,0,0,0,1, /* 0x */
0,0,0,1,0,0,0,1,0,0,0,1,0,0,0,1, /* 1x */
0,0,0,1,0,0,0,1,0,0,0,1,0,0,0,1, /* 2x */
0,0,0,1,0,0,0,1,0,0,0,1,0,0,0,1, /* 3x */
0,0,0,1,0,0,0,1,0,0,0,1,0,0,0,1, /* 4x */
0,0,0,1,0,0,0,1,0,0,0,1,0,0,0,1, /* 5x */
0,0,0,1,0,0,0,1,0,0,0,1,0,0,0,1, /* 6x */
0,0,0,1,0,0,0,1,0,0,0,1,0,0,0,1, /* 7x */
0,0,0,1,0,0,0,1,0,0,0,1,0,0,0,1, /* 8x */
0,0,0,1,0,0,0,1,0,0,0,1,0,0,0,1, /* 9x */
0,0,0,1,0,0,0,1,0,0,0,1,0,0,0,1, /* Ax */
0,0,0,1,0,0,0,1,0,0,0,1,0,0,0,1, /* Bx */
0,0,0,1,0,0,0,1,0,0,0,0,0,0,0,1, /* Cx */
0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1, /* Dx */
0,0,0,1,0,0,0,1,0,0,0,0,0,0,0,1, /* Ex */
0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1 /* Fx */
};
// X0XX X011 No Operation
// MMMM M111 Control
// 1100 0011 Set Extended Mode
// 10XX X011 Set Basic Mode
// 1110 0011 Prepare
// 1XXX XX01 Write EOF (but not treated as such !)
// --------------------------------------------------------------------
// Device Handler Information Block
// --------------------------------------------------------------------
DEVHND ctcadpt_device_hndinfo =
{
&CTCX_Init, /* Device Initialisation */
&CTCX_ExecuteCCW, /* Device CCW execute */
&CTCX_Close, /* Device Close */
&CTCX_Query, /* Device Query */
NULL, /* Device Start channel pgm */
NULL, /* Device End channel pgm */
NULL, /* Device Resume channel pgm */
NULL, /* Device Suspend channel pgm */
NULL, /* Device Read */
NULL, /* Device Write */
NULL, /* Device Query used */
NULL, /* Device Reserve */
NULL, /* Device Release */
NULL, /* Device Attention */
NULL, /* Immediate CCW Codes */
NULL, /* Signal Adapter Input */
NULL, /* Signal Adapter Output */
NULL, /* Hercules suspend */
NULL /* Hercules resume */
};
DEVHND ctct_device_hndinfo =
{
&CTCT_Init, /* Device Initialization */
&CTCX_ExecuteCCW, /* Device CCW execute */
&CTCX_Close, /* Device Close */
&CTCX_Query, /* Device Query */
NULL, /* Device Start channel pgm */
NULL, /* Device End channel pgm */
NULL, /* Device Resume channel pgm */
NULL, /* Device Suspend channel pgm */
NULL, /* Device Read */
NULL, /* Device Write */
NULL, /* Device Query used */
NULL, /* Device Reserve */
NULL, /* Device Release */
NULL, /* Device Attention */
NULL, /* Immediate CCW Codes */
NULL, /* Signal Adapter Input */
NULL, /* Signal Adapter Output */
NULL, /* Hercules suspend */
NULL /* Hercules resume */
};
DEVHND ctce_device_hndinfo =
{
&CTCE_Init, /* Device Initialization */
&CTCE_ExecuteCCW, /* Device CCW execute */
&CTCE_Close, /* Device Close */
&CTCE_Query, /* Device Query */
NULL, /* Device Start channel pgm */
NULL, /* Device End channel pgm */
NULL, /* Device Resume channel pgm */
NULL, /* Device Suspend channel pgm */
NULL, /* Device Read */
NULL, /* Device Write */
NULL, /* Device Query used */
NULL, /* Device Reserve */
NULL, /* Device Release */
NULL, /* Device Attention */
CTCE_immed_commands, /* Immediate CCW Codes */
NULL, /* Signal Adapter Input */
NULL, /* Signal Adapter Output */
NULL, /* Hercules suspend */
NULL /* Hercules resume */
};
DEVHND vmnet_device_hndinfo =
{
&VMNET_Init, /* Device Initialisation */
&CTCX_ExecuteCCW, /* Device CCW execute */
&CTCX_Close, /* Device Close */
&CTCX_Query, /* Device Query */
NULL, /* Device Start channel pgm */
NULL, /* Device End channel pgm */
NULL, /* Device Resume channel pgm */
NULL, /* Device Suspend channel pgm */
NULL, /* Device Read */
NULL, /* Device Write */
NULL, /* Device Query used */
NULL, /* Device Reserve */
NULL, /* Device Release */
NULL, /* Device Attention */
NULL, /* Immediate CCW Codes */
NULL, /* Signal Adapter Input */
NULL, /* Signal Adapter Output */
NULL, /* Hercules suspend */
NULL /* Hercules resume */
};
extern DEVHND ctci_device_hndinfo;
extern DEVHND lcs_device_hndinfo;
// ====================================================================
// Primary Module Entry Points
// ====================================================================
// --------------------------------------------------------------------
// Device Initialization Handler (Generic)
// --------------------------------------------------------------------
int CTCX_Init( DEVBLK* pDEVBLK, int argc, char *argv[] )
{
pDEVBLK->devtype = 0x3088;
// The first argument is the device emulation type
if( argc < 1 )
{
logmsg( _("HHCCT001E %4.4X: Incorrect number of parameters\n"),
pDEVBLK->devnum );
return -1;
}
if((pDEVBLK->hnd = hdl_ghnd(argv[0])))
{
if(pDEVBLK->hnd->init == &CTCX_Init)
return -1;
free(pDEVBLK->typname);
pDEVBLK->typname = strdup(argv[0]);
return (pDEVBLK->hnd->init)( pDEVBLK, --argc, ++argv );
}
logmsg (_("HHCCT034E %s: Unrecognized/unsupported CTC emulation type\n"),
argv[0]);
return -1;
}
// -------------------------------------------------------------------
// Query the device definition (Generic)
// -------------------------------------------------------------------
void CTCX_Query( DEVBLK* pDEVBLK,
char** ppszClass,
int iBufLen,
char* pBuffer )
{
BEGIN_DEVICE_CLASS_QUERY( "CTCA", pDEVBLK, ppszClass, iBufLen, pBuffer );
snprintf( pBuffer, iBufLen, "%s", pDEVBLK->filename );
}
// -------------------------------------------------------------------
// Close the device (Generic)
// -------------------------------------------------------------------
int CTCX_Close( DEVBLK* pDEVBLK )
{
// Close the device file (if not already closed)
if( pDEVBLK->fd >= 0 )
{
if (socket_is_socket( pDEVBLK->fd ))
close_socket( pDEVBLK->fd );
else
close( pDEVBLK->fd );
pDEVBLK->fd = -1; // indicate we're now closed
}
return 0;
}
// -------------------------------------------------------------------
// Execute a Channel Command Word (Generic)
// -------------------------------------------------------------------
void CTCX_ExecuteCCW( DEVBLK* pDEVBLK, BYTE bCode,
BYTE bFlags, BYTE bChained,
CCWC sCount, BYTE bPrevCode,
int iCCWSeq, BYTE* pIOBuf,
BYTE* pMore, BYTE* pUnitStat,
CCWC* pResidual )
{
int iNum; // Number of bytes to move
BYTE bOpCode; // CCW opcode with modifier
// bits masked off
UNREFERENCED( bFlags );
UNREFERENCED( bChained );
UNREFERENCED( bPrevCode );
UNREFERENCED( iCCWSeq );
// Intervention required if the device file is not open
if( pDEVBLK->fd < 0 &&
!IS_CCW_SENSE( bCode ) &&
!IS_CCW_CONTROL( bCode ) )
{
pDEVBLK->sense[0] = SENSE_IR;
*pUnitStat = CSW_CE | CSW_DE | CSW_UC;
return;
}
// Mask off the modifier bits in the CCW bOpCode
if( ( bCode & 0x07 ) == 0x07 )
bOpCode = 0x07;
else if( ( bCode & 0x03 ) == 0x02 )
bOpCode = 0x02;
else if( ( bCode & 0x0F ) == 0x0C )
bOpCode = 0x0C;
else if( ( bCode & 0x03 ) == 0x01 )
bOpCode = pDEVBLK->ctcxmode ? ( bCode & 0x83 ) : 0x01;
else if( ( bCode & 0x1F ) == 0x14 )
bOpCode = 0x14;
else if( ( bCode & 0x47 ) == 0x03 )
bOpCode = 0x03;
else if( ( bCode & 0xC7 ) == 0x43 )
bOpCode = 0x43;
else
bOpCode = bCode;
// Process depending on CCW bOpCode
switch (bOpCode)
{
case 0x01: // 0MMMMM01 WRITE
//------------------------------------------------------------
// WRITE
//------------------------------------------------------------
// Return normal status if CCW count is zero
if( sCount == 0 )
{
*pUnitStat = CSW_CE | CSW_DE;
break;
}
// Write data and set unit status and residual byte count
switch( pDEVBLK->ctctype )
{
case CTC_CTCT:
CTCT_Write( pDEVBLK, sCount, pIOBuf, pUnitStat, pResidual );
break;
case CTC_VMNET:
*pResidual = sCount - VMNET_Write( pDEVBLK, pIOBuf,
sCount, pUnitStat );
break;
}
break;
case 0x81: // 1MMMMM01 WEOF
//------------------------------------------------------------
// WRITE EOF
//------------------------------------------------------------
// Return normal status
*pUnitStat = CSW_CE | CSW_DE;
break;
case 0x02: // MMMMMM10 READ
case 0x0C: // MMMM1100 RDBACK
// -----------------------------------------------------------
// READ & READ BACKWARDS
// -----------------------------------------------------------
// Read data and set unit status and residual byte count
switch( pDEVBLK->ctctype )
{
case CTC_CTCT:
CTCT_Read( pDEVBLK, sCount, pIOBuf, pUnitStat, pResidual, pMore );
break;
case CTC_VMNET:
*pResidual = sCount - VMNET_Read( pDEVBLK, pIOBuf,
sCount, pUnitStat );
break;
}
break;
case 0x07: // MMMMM111 CTL
// -----------------------------------------------------------
// CONTROL
// -----------------------------------------------------------
*pUnitStat = CSW_CE | CSW_DE;
break;
case 0x03: // M0MMM011 NOP
// -----------------------------------------------------------
// CONTROL NO-OPERATON
// -----------------------------------------------------------
*pUnitStat = CSW_CE | CSW_DE;
break;
case 0x43: // 00XXX011 SBM
// -----------------------------------------------------------
// SET BASIC MODE
// -----------------------------------------------------------
// Command reject if in basic mode
if( pDEVBLK->ctcxmode == 0 )
{
pDEVBLK->sense[0] = SENSE_CR;
*pUnitStat = CSW_CE | CSW_DE | CSW_UC;
break;
}
// Reset extended mode and return normal status
pDEVBLK->ctcxmode = 0;
*pResidual = 0;
*pUnitStat = CSW_CE | CSW_DE;
break;
case 0xC3: // 11000011 SEM
// -----------------------------------------------------------
// SET EXTENDED MODE
// -----------------------------------------------------------
pDEVBLK->ctcxmode = 1;
*pResidual = 0;
*pUnitStat = CSW_CE | CSW_DE;
break;
case 0xE3: // 11100011
// -----------------------------------------------------------
// PREPARE (PREP)
// -----------------------------------------------------------
*pUnitStat = CSW_CE | CSW_DE;
break;
case 0x14: // XXX10100 SCB
// -----------------------------------------------------------
// SENSE COMMAND BYTE