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stm32h7xx_hal_eth.c
2992 lines (2542 loc) · 101 KB
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stm32h7xx_hal_eth.c
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/**
******************************************************************************
* @file stm32h7xx_hal_eth.c
* @author MCD Application Team
* @brief ETH HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Ethernet (ETH) peripheral:
* + Initialization and deinitialization functions
* + IO operation functions
* + Peripheral Control functions
* + Peripheral State and Errors functions
*
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
The ETH HAL driver can be used as follows:
(#)Declare a ETH_HandleTypeDef handle structure, for example:
ETH_HandleTypeDef heth;
(#)Fill parameters of Init structure in heth handle
(#)Call HAL_ETH_Init() API to initialize the Ethernet peripheral (MAC, DMA, ...)
(#)Initialize the ETH low level resources through the HAL_ETH_MspInit() API:
(##) Enable the Ethernet interface clock using
(+++) __HAL_RCC_ETH1MAC_CLK_ENABLE()
(+++) __HAL_RCC_ETH1TX_CLK_ENABLE()
(+++) __HAL_RCC_ETH1RX_CLK_ENABLE()
(##) Initialize the related GPIO clocks
(##) Configure Ethernet pinout
(##) Configure Ethernet NVIC interrupt (in Interrupt mode)
(#) Ethernet data reception is asynchronous, so call the following API
to start the listening mode:
(##) HAL_ETH_Start():
This API starts the MAC and DMA transmission and reception process,
without enabling end of transfer interrupts, in this mode user
has to poll for data availability by calling HAL_ETH_IsRxDataAvailable()
(##) HAL_ETH_Start_IT():
This API starts the MAC and DMA transmission and reception process,
end of transfer interrupts are enabled in this mode,
HAL_ETH_RxCpltCallback() will be executed when an Ethernet packet is received
(#) When data is received (HAL_ETH_IsRxDataAvailable() returns 1 or Rx interrupt
occurred), user can call the following APIs to get received data:
(##) HAL_ETH_GetRxDataBuffer(): Get buffer address of received frame
(##) HAL_ETH_GetRxDataLength(): Get received frame length
(##) HAL_ETH_GetRxDataInfo(): Get received frame additional info,
please refer to ETH_RxPacketInfo typedef structure
(#) For transmission path, two APIs are available:
(##) HAL_ETH_Transmit(): Transmit an ETH frame in blocking mode
(##) HAL_ETH_Transmit_IT(): Transmit an ETH frame in interrupt mode,
HAL_ETH_TxCpltCallback() will be executed when end of transfer occur
(#) Communication with an external PHY device:
(##) HAL_ETH_ReadPHYRegister(): Read a register from an external PHY
(##) HAL_ETH_WritePHYRegister(): Write data to an external RHY register
(#) Configure the Ethernet MAC after ETH peripheral initialization
(##) HAL_ETH_GetMACConfig(): Get MAC actual configuration into ETH_MACConfigTypeDef
(##) HAL_ETH_SetMACConfig(): Set MAC configuration based on ETH_MACConfigTypeDef
(#) Configure the Ethernet DMA after ETH peripheral initialization
(##) HAL_ETH_GetDMAConfig(): Get DMA actual configuration into ETH_DMAConfigTypeDef
(##) HAL_ETH_SetDMAConfig(): Set DMA configuration based on ETH_DMAConfigTypeDef
-@- The PTP protocol offload APIs are not supported in this driver.
*** Callback registration ***
=============================================
The compilation define USE_HAL_ETH_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
Use Function @ref HAL_ETH_RegisterCallback() to register an interrupt callback.
Function @ref HAL_ETH_RegisterCallback() allows to register following callbacks:
(+) TxCpltCallback : Tx Complete Callback.
(+) RxCpltCallback : Rx Complete Callback.
(+) DMAErrorCallback : DMA Error Callback.
(+) MACErrorCallback : MAC Error Callback.
(+) PMTCallback : Power Management Callback
(+) EEECallback : EEE Callback.
(+) WakeUpCallback : Wake UP Callback
(+) MspInitCallback : MspInit Callback.
(+) MspDeInitCallback: MspDeInit Callback.
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
Use function @ref HAL_ETH_UnRegisterCallback() to reset a callback to the default
weak function.
@ref HAL_ETH_UnRegisterCallback takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) TxCpltCallback : Tx Complete Callback.
(+) RxCpltCallback : Rx Complete Callback.
(+) DMAErrorCallback : DMA Error Callback.
(+) MACErrorCallback : MAC Error Callback.
(+) PMTCallback : Power Management Callback
(+) EEECallback : EEE Callback.
(+) WakeUpCallback : Wake UP Callback
(+) MspInitCallback : MspInit Callback.
(+) MspDeInitCallback: MspDeInit Callback.
By default, after the HAL_ETH_Init and when the state is HAL_ETH_STATE_RESET
all callbacks are set to the corresponding weak functions:
examples @ref HAL_ETH_TxCpltCallback(), @ref HAL_ETH_RxCpltCallback().
Exception done for MspInit and MspDeInit functions that are
reset to the legacy weak function in the HAL_ETH_Init/ @ref HAL_ETH_DeInit only when
these callbacks are null (not registered beforehand).
if not, MspInit or MspDeInit are not null, the HAL_ETH_Init/ @ref HAL_ETH_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in HAL_ETH_STATE_READY state only.
Exception done MspInit/MspDeInit that can be registered/unregistered
in HAL_ETH_STATE_READY or HAL_ETH_STATE_RESET state,
thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_ETH_RegisterCallback() before calling @ref HAL_ETH_DeInit
or HAL_ETH_Init function.
When The compilation define USE_HAL_ETH_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registration feature is not available and all callbacks
are set to the corresponding weak functions.
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32h7xx_hal.h"
/** @addtogroup STM32H7xx_HAL_Driver
* @{
*/
/** @defgroup ETH ETH
* @brief ETH HAL module driver
* @{
*/
#ifdef HAL_ETH_MODULE_ENABLED
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/** @addtogroup ETH_Private_Constants ETH Private Constants
* @{
*/
#define ETH_MACCR_MASK ((uint32_t)0xFFFB7F7CU)
#define ETH_MACECR_MASK ((uint32_t)0x3F077FFFU)
#define ETH_MACPFR_MASK ((uint32_t)0x800007FFU)
#define ETH_MACWTR_MASK ((uint32_t)0x0000010FU)
#define ETH_MACTFCR_MASK ((uint32_t)0xFFFF00F2U)
#define ETH_MACRFCR_MASK ((uint32_t)0x00000003U)
#define ETH_MTLTQOMR_MASK ((uint32_t)0x00000072U)
#define ETH_MTLRQOMR_MASK ((uint32_t)0x0000007BU)
#define ETH_DMAMR_MASK ((uint32_t)0x00007802U)
#define ETH_DMASBMR_MASK ((uint32_t)0x0000D001U)
#define ETH_DMACCR_MASK ((uint32_t)0x00013FFFU)
#define ETH_DMACTCR_MASK ((uint32_t)0x003F1010U)
#define ETH_DMACRCR_MASK ((uint32_t)0x803F0000U)
#define ETH_MACPCSR_MASK (ETH_MACPCSR_PWRDWN | ETH_MACPCSR_RWKPKTEN | \
ETH_MACPCSR_MGKPKTEN | ETH_MACPCSR_GLBLUCAST | \
ETH_MACPCSR_RWKPFE)
/* Timeout values */
#define ETH_SWRESET_TIMEOUT ((uint32_t)500U)
#define ETH_MDIO_BUS_TIMEOUT ((uint32_t)1000U)
#define ETH_DMARXNDESCWBF_ERRORS_MASK ((uint32_t)(ETH_DMARXNDESCWBF_DE | ETH_DMARXNDESCWBF_RE | \
ETH_DMARXNDESCWBF_OE | ETH_DMARXNDESCWBF_RWT |\
ETH_DMARXNDESCWBF_GP | ETH_DMARXNDESCWBF_CE))
#define ETH_MAC_US_TICK ((uint32_t)1000000U)
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup ETH_Private_Macros ETH Private Macros
* @{
*/
/* Helper macros for TX descriptor handling */
#define INCR_TX_DESC_INDEX(inx, offset) do {\
(inx) += (offset);\
if ((inx) >= (uint32_t)ETH_TX_DESC_CNT){\
(inx) = ((inx) - (uint32_t)ETH_TX_DESC_CNT);}\
} while (0)
/* Helper macros for RX descriptor handling */
#define INCR_RX_DESC_INDEX(inx, offset) do {\
(inx) += (offset);\
if ((inx) >= (uint32_t)ETH_RX_DESC_CNT){\
(inx) = ((inx) - (uint32_t)ETH_RX_DESC_CNT);}\
} while (0)
/**
* @}
*/
/* Private function prototypes -----------------------------------------------*/
/** @defgroup ETH_Private_Functions ETH Private Functions
* @{
*/
static void ETH_MAC_MDIO_ClkConfig(ETH_HandleTypeDef *heth);
static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf);
static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, ETH_DMAConfigTypeDef *dmaconf);
static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth);
static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth);
static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth);
static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, ETH_TxPacketConfig *pTxConfig, uint32_t ItMode);
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth);
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
/**
* @}
*/
/* Exported functions ---------------------------------------------------------*/
/** @defgroup ETH_Exported_Functions ETH Exported Functions
* @{
*/
/** @defgroup ETH_Exported_Functions_Group1 Initialization and deinitialization functions
* @brief Initialization and Configuration functions
*
@verbatim
===============================================================================
##### Initialization and Configuration functions #####
===============================================================================
[..] This subsection provides a set of functions allowing to initialize and
deinitialize the ETH peripheral:
(+) User must Implement HAL_ETH_MspInit() function in which he configures
all related peripherals resources (CLOCK, GPIO and NVIC ).
(+) Call the function HAL_ETH_Init() to configure the selected device with
the selected configuration:
(++) MAC address
(++) Media interface (MII or RMII)
(++) Rx DMA Descriptors Tab
(++) Tx DMA Descriptors Tab
(++) Length of Rx Buffers
(+) Call the function HAL_ETH_DescAssignMemory() to assign data buffers
for each Rx DMA Descriptor
(+) Call the function HAL_ETH_DeInit() to restore the default configuration
of the selected ETH peripheral.
@endverbatim
* @{
*/
/**
* @brief Initialize the Ethernet peripheral registers.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
{
uint32_t tickstart;
if(heth == NULL)
{
return HAL_ERROR;
}
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
if(heth->gState == HAL_ETH_STATE_RESET)
{
/* Allocate lock resource and initialize it */
heth->Lock = HAL_UNLOCKED;
ETH_InitCallbacksToDefault(heth);
if(heth->MspInitCallback == NULL)
{
heth->MspInitCallback = HAL_ETH_MspInit;
}
/* Init the low level hardware */
heth->MspInitCallback(heth);
}
#else
/* Check the ETH peripheral state */
if(heth->gState == HAL_ETH_STATE_RESET)
{
/* Init the low level hardware : GPIO, CLOCK, NVIC. */
HAL_ETH_MspInit(heth);
}
#endif /* (USE_HAL_ETH_REGISTER_CALLBACKS) */
heth->gState = HAL_ETH_STATE_BUSY;
__HAL_RCC_SYSCFG_CLK_ENABLE();
if(heth->Init.MediaInterface == HAL_ETH_MII_MODE)
{
HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_MII);
}
else
{
HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_RMII);
}
/* Ethernet Software reset */
/* Set the SWR bit: resets all MAC subsystem internal registers and logic */
/* After reset all the registers holds their respective reset values */
SET_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR);
/* Get tick */
tickstart = HAL_GetTick();
/* Wait for software reset */
while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U)
{
if(((HAL_GetTick() - tickstart ) > ETH_SWRESET_TIMEOUT))
{
/* Set Error Code */
heth->ErrorCode = HAL_ETH_ERROR_TIMEOUT;
/* Set State as Error */
heth->gState = HAL_ETH_STATE_ERROR;
/* Return Error */
return HAL_ERROR;
}
}
/*------------------ MDIO CSR Clock Range Configuration --------------------*/
ETH_MAC_MDIO_ClkConfig(heth);
/*------------------ MAC LPI 1US Tic Counter Configuration --------------------*/
WRITE_REG(heth->Instance->MAC1USTCR, (((uint32_t)HAL_RCC_GetHCLKFreq() / ETH_MAC_US_TICK) - 1U));
/*------------------ MAC, MTL and DMA default Configuration ----------------*/
ETH_MACDMAConfig(heth);
/* SET DSL to 64 bit */
MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_DSL, ETH_DMACCR_DSL_64BIT);
/* Set Receive Buffers Length (must be a multiple of 4) */
if ((heth->Init.RxBuffLen % 0x4U) != 0x0U)
{
/* Set Error Code */
heth->ErrorCode = HAL_ETH_ERROR_PARAM;
/* Set State as Error */
heth->gState = HAL_ETH_STATE_ERROR;
/* Return Error */
return HAL_ERROR;
}
else
{
MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_RBSZ, ((heth->Init.RxBuffLen) << 1));
}
/*------------------ DMA Tx Descriptors Configuration ----------------------*/
ETH_DMATxDescListInit(heth);
/*------------------ DMA Rx Descriptors Configuration ----------------------*/
ETH_DMARxDescListInit(heth);
/*--------------------- ETHERNET MAC Address Configuration ------------------*/
/* Set MAC addr bits 32 to 47 */
heth->Instance->MACA0HR = (((uint32_t)(heth->Init.MACAddr[5]) << 8) | (uint32_t)heth->Init.MACAddr[4]);
/* Set MAC addr bits 0 to 31 */
heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
heth->ErrorCode = HAL_ETH_ERROR_NONE;
heth->gState = HAL_ETH_STATE_READY;
heth->RxState = HAL_ETH_STATE_READY;
return HAL_OK;
}
/**
* @brief DeInitializes the ETH peripheral.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_DeInit(ETH_HandleTypeDef *heth)
{
/* Set the ETH peripheral state to BUSY */
heth->gState = HAL_ETH_STATE_BUSY;
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
if(heth->MspDeInitCallback == NULL)
{
heth->MspDeInitCallback = HAL_ETH_MspDeInit;
}
/* DeInit the low level hardware */
heth->MspDeInitCallback(heth);
#else
/* De-Init the low level hardware : GPIO, CLOCK, NVIC. */
HAL_ETH_MspDeInit(heth);
#endif /* (USE_HAL_ETH_REGISTER_CALLBACKS) */
/* Set ETH HAL state to Disabled */
heth->gState= HAL_ETH_STATE_RESET;
/* Return function status */
return HAL_OK;
}
/**
* @brief Initializes the ETH MSP.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
__weak void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(heth);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_ETH_MspInit could be implemented in the user file
*/
}
/**
* @brief DeInitializes ETH MSP.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
__weak void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(heth);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_ETH_MspDeInit could be implemented in the user file
*/
}
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
/**
* @brief Register a User ETH Callback
* To be used instead of the weak predefined callback
* @param heth eth handle
* @param CallbackID ID of the callback to be registered
* This parameter can be one of the following values:
* @arg @ref HAL_ETH_TX_COMPLETE_CB_ID Tx Complete Callback ID
* @arg @ref HAL_ETH_RX_COMPLETE_CB_ID Rx Complete Callback ID
* @arg @ref HAL_ETH_DMA_ERROR_CB_ID DMA Error Callback ID
* @arg @ref HAL_ETH_MAC_ERROR_CB_ID MAC Error Callback ID
* @arg @ref HAL_ETH_PMT_CB_ID Power Management Callback ID
* @arg @ref HAL_ETH_EEE_CB_ID EEE Callback ID
* @arg @ref HAL_ETH_WAKEUP_CB_ID Wake UP Callback ID
* @arg @ref HAL_ETH_MSPINIT_CB_ID MspInit callback ID
* @arg @ref HAL_ETH_MSPDEINIT_CB_ID MspDeInit callback ID
* @param pCallback pointer to the Callback function
* @retval status
*/
HAL_StatusTypeDef HAL_ETH_RegisterCallback(ETH_HandleTypeDef *heth, HAL_ETH_CallbackIDTypeDef CallbackID, pETH_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
if(pCallback == NULL)
{
/* Update the error code */
heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK;
return HAL_ERROR;
}
/* Process locked */
__HAL_LOCK(heth);
if(heth->gState == HAL_ETH_STATE_READY)
{
switch (CallbackID)
{
case HAL_ETH_TX_COMPLETE_CB_ID :
heth->TxCpltCallback = pCallback;
break;
case HAL_ETH_RX_COMPLETE_CB_ID :
heth->RxCpltCallback = pCallback;
break;
case HAL_ETH_DMA_ERROR_CB_ID :
heth->DMAErrorCallback = pCallback;
break;
case HAL_ETH_MAC_ERROR_CB_ID :
heth->MACErrorCallback = pCallback;
break;
case HAL_ETH_PMT_CB_ID :
heth->PMTCallback = pCallback;
break;
case HAL_ETH_EEE_CB_ID :
heth->EEECallback = pCallback;
break;
case HAL_ETH_WAKEUP_CB_ID :
heth->WakeUpCallback = pCallback;
break;
case HAL_ETH_MSPINIT_CB_ID :
heth->MspInitCallback = pCallback;
break;
case HAL_ETH_MSPDEINIT_CB_ID :
heth->MspDeInitCallback = pCallback;
break;
default :
/* Update the error code */
heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else if(heth->gState == HAL_ETH_STATE_RESET)
{
switch (CallbackID)
{
case HAL_ETH_MSPINIT_CB_ID :
heth->MspInitCallback = pCallback;
break;
case HAL_ETH_MSPDEINIT_CB_ID :
heth->MspDeInitCallback = pCallback;
break;
default :
/* Update the error code */
heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else
{
/* Update the error code */
heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(heth);
return status;
}
/**
* @brief Unregister an ETH Callback
* ETH callabck is redirected to the weak predefined callback
* @param heth eth handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
* @arg @ref HAL_ETH_TX_COMPLETE_CB_ID Tx Complete Callback ID
* @arg @ref HAL_ETH_RX_COMPLETE_CB_ID Rx Complete Callback ID
* @arg @ref HAL_ETH_DMA_ERROR_CB_ID DMA Error Callback ID
* @arg @ref HAL_ETH_MAC_ERROR_CB_ID MAC Error Callback ID
* @arg @ref HAL_ETH_PMT_CB_ID Power Management Callback ID
* @arg @ref HAL_ETH_EEE_CB_ID EEE Callback ID
* @arg @ref HAL_ETH_WAKEUP_CB_ID Wake UP Callback ID
* @arg @ref HAL_ETH_MSPINIT_CB_ID MspInit callback ID
* @arg @ref HAL_ETH_MSPDEINIT_CB_ID MspDeInit callback ID
* @retval status
*/
HAL_StatusTypeDef HAL_ETH_UnRegisterCallback(ETH_HandleTypeDef *heth, HAL_ETH_CallbackIDTypeDef CallbackID)
{
HAL_StatusTypeDef status = HAL_OK;
/* Process locked */
__HAL_LOCK(heth);
if(heth->gState == HAL_ETH_STATE_READY)
{
switch (CallbackID)
{
case HAL_ETH_TX_COMPLETE_CB_ID :
heth->TxCpltCallback = HAL_ETH_TxCpltCallback;
break;
case HAL_ETH_RX_COMPLETE_CB_ID :
heth->RxCpltCallback = HAL_ETH_RxCpltCallback;
break;
case HAL_ETH_DMA_ERROR_CB_ID :
heth->DMAErrorCallback = HAL_ETH_DMAErrorCallback;
break;
case HAL_ETH_MAC_ERROR_CB_ID :
heth->MACErrorCallback = HAL_ETH_MACErrorCallback;
break;
case HAL_ETH_PMT_CB_ID :
heth->PMTCallback = HAL_ETH_PMTCallback;
break;
case HAL_ETH_EEE_CB_ID :
heth->EEECallback = HAL_ETH_EEECallback;
break;
case HAL_ETH_WAKEUP_CB_ID :
heth->WakeUpCallback = HAL_ETH_WakeUpCallback;
break;
case HAL_ETH_MSPINIT_CB_ID :
heth->MspInitCallback = HAL_ETH_MspInit;
break;
case HAL_ETH_MSPDEINIT_CB_ID :
heth->MspDeInitCallback = HAL_ETH_MspDeInit;
break;
default :
/* Update the error code */
heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else if(heth->gState == HAL_ETH_STATE_RESET)
{
switch (CallbackID)
{
case HAL_ETH_MSPINIT_CB_ID :
heth->MspInitCallback = HAL_ETH_MspInit;
break;
case HAL_ETH_MSPDEINIT_CB_ID :
heth->MspDeInitCallback = HAL_ETH_MspDeInit;
break;
default :
/* Update the error code */
heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else
{
/* Update the error code */
heth->ErrorCode |= HAL_ETH_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(heth);
return status;
}
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
/**
* @brief Assign memory buffers to a DMA Rx descriptor
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @param Index : index of the DMA Rx descriptor
* this parameter can be a value from 0x0 to (ETH_RX_DESC_CNT -1)
* @param pBuffer1: address of buffer 1
* @param pBuffer2: address of buffer 2 if available
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_DescAssignMemory(ETH_HandleTypeDef *heth, uint32_t Index, uint8_t *pBuffer1, uint8_t *pBuffer2)
{
ETH_DMADescTypeDef *dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[Index];
if((pBuffer1 == NULL) || (Index >= (uint32_t)ETH_RX_DESC_CNT))
{
/* Set Error Code */
heth->ErrorCode = HAL_ETH_ERROR_PARAM;
/* Return Error */
return HAL_ERROR;
}
/* write buffer address to RDES0 */
WRITE_REG(dmarxdesc->DESC0, (uint32_t)pBuffer1);
/* store buffer address */
WRITE_REG(dmarxdesc->BackupAddr0, (uint32_t)pBuffer1);
/* set buffer address valid bit to RDES3 */
SET_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_BUF1V);
if(pBuffer2 != NULL)
{
/* write buffer 2 address to RDES1 */
WRITE_REG(dmarxdesc->DESC2, (uint32_t)pBuffer2);
/* store buffer 2 address */
WRITE_REG(dmarxdesc->BackupAddr1, (uint32_t)pBuffer2);
/* set buffer 2 address valid bit to RDES3 */
SET_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_BUF2V);
}
/* set OWN bit to RDES3 */
SET_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN);
return HAL_OK;
}
/**
* @}
*/
/** @defgroup ETH_Exported_Functions_Group2 IO operation functions
* @brief ETH Transmit and Receive functions
*
@verbatim
==============================================================================
##### IO operation functions #####
==============================================================================
[..]
This subsection provides a set of functions allowing to manage the ETH
data transfer.
@endverbatim
* @{
*/
/**
* @brief Enables Ethernet MAC and DMA reception and transmission
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth)
{
if(heth->gState == HAL_ETH_STATE_READY)
{
heth->gState = HAL_ETH_STATE_BUSY;
/* Enable the MAC transmission */
SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
/* Enable the MAC reception */
SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
/* Set the Flush Transmit FIFO bit */
SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
/* Enable the DMA transmission */
SET_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
/* Enable the DMA reception */
SET_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
/* Clear Tx and Rx process stopped flags */
heth->Instance->DMACSR |= (ETH_DMACSR_TPS | ETH_DMACSR_RPS);
heth->gState = HAL_ETH_STATE_READY;
heth->RxState = HAL_ETH_STATE_BUSY_RX;
return HAL_OK;
}
else
{
return HAL_ERROR;
}
}
/**
* @brief Enables Ethernet MAC and DMA reception/transmission in Interrupt mode
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_Start_IT(ETH_HandleTypeDef *heth)
{
uint32_t descindex = 0, counter;
ETH_DMADescTypeDef *dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descindex];
if(heth->gState == HAL_ETH_STATE_READY)
{
heth->gState = HAL_ETH_STATE_BUSY;
/* Set IOC bit to all Rx descriptors */
for(counter= 0; counter < (uint32_t)ETH_RX_DESC_CNT; counter++)
{
SET_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC);
INCR_RX_DESC_INDEX(descindex, 1U);
dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descindex];
}
/* save IT mode to ETH Handle */
heth->RxDescList.ItMode = 1U;
/* Enable the MAC transmission */
SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
/* Enable the MAC reception */
SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
/* Set the Flush Transmit FIFO bit */
SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
/* Enable the DMA transmission */
SET_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
/* Enable the DMA reception */
SET_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
/* Clear Tx and Rx process stopped flags */
heth->Instance->DMACSR |= (ETH_DMACSR_TPS | ETH_DMACSR_RPS);
heth->gState = HAL_ETH_STATE_READY;
heth->RxState = HAL_ETH_STATE_BUSY_RX;
/* Enable ETH DMA interrupts:
- Tx complete interrupt
- Rx complete interrupt
- Fatal bus interrupt
*/
__HAL_ETH_DMA_ENABLE_IT(heth, (ETH_DMACIER_NIE | ETH_DMACIER_RIE | ETH_DMACIER_TIE |
ETH_DMACIER_FBEE | ETH_DMACIER_AIE));
return HAL_OK;
}
else
{
return HAL_ERROR;
}
}
/**
* @brief Stop Ethernet MAC and DMA reception/transmission
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth)
{
if(heth->gState != HAL_ETH_STATE_RESET)
{
/* Set the ETH peripheral state to BUSY */
heth->gState = HAL_ETH_STATE_BUSY;
/* Disable the DMA transmission */
CLEAR_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
/* Disable the DMA reception */
CLEAR_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
/* Disable the MAC reception */
CLEAR_BIT( heth->Instance->MACCR, ETH_MACCR_RE);
/* Set the Flush Transmit FIFO bit */
SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
/* Disable the MAC transmission */
CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
heth->gState = HAL_ETH_STATE_READY;
heth->RxState = HAL_ETH_STATE_READY;
/* Return function status */
return HAL_OK;
}
else
{
return HAL_ERROR;
}
}
/**
* @brief Stop Ethernet MAC and DMA reception/transmission in Interrupt mode
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_Stop_IT(ETH_HandleTypeDef *heth)
{
ETH_DMADescTypeDef *dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[0];
uint32_t index;
if(heth->gState != HAL_ETH_STATE_RESET)
{
/* Set the ETH peripheral state to BUSY */
heth->gState = HAL_ETH_STATE_BUSY;
/* Disable intrrupts:
- Tx complete interrupt
- Rx complete interrupt */
__HAL_ETH_DMA_DISABLE_IT(heth, (ETH_DMA_NORMAL_IT | ETH_DMA_RX_IT | ETH_DMA_TX_IT));
/* Disable the DMA transmission */
CLEAR_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
/* Disable the DMA reception */
CLEAR_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
/* Disable the MAC reception */
CLEAR_BIT( heth->Instance->MACCR, ETH_MACCR_RE);
/* Set the Flush Transmit FIFO bit */
SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
/* Disable the MAC transmission */
CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
/* Clear IOC bit to all Rx descriptors */
for(index = 0; index < (uint32_t)ETH_RX_DESC_CNT; index++)
{
CLEAR_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC);
}
heth->RxDescList.ItMode = 0U;
heth->gState = HAL_ETH_STATE_READY;
heth->RxState = HAL_ETH_STATE_READY;
/* Return function status */
return HAL_OK;
}
else
{
return HAL_ERROR;
}
}
/**
* @brief Sends an Ethernet Packet in polling mode.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @param pTxConfig: Hold the configuration of packet to be transmitted
* @param Timeout: timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_Transmit(ETH_HandleTypeDef *heth, ETH_TxPacketConfig *pTxConfig, uint32_t Timeout)
{
uint32_t tickstart;
const ETH_DMADescTypeDef *dmatxdesc;
if(pTxConfig == NULL)
{
heth->ErrorCode |= HAL_ETH_ERROR_PARAM;
return HAL_ERROR;
}
if(heth->gState == HAL_ETH_STATE_READY)
{
/* Config DMA Tx descriptor by Tx Packet info */
if (ETH_Prepare_Tx_Descriptors(heth, pTxConfig, 0) != HAL_ETH_ERROR_NONE)
{
/* Set the ETH error code */
heth->ErrorCode |= HAL_ETH_ERROR_BUSY;
return HAL_ERROR;
}
dmatxdesc = (ETH_DMADescTypeDef *)(&heth->TxDescList)->TxDesc[heth->TxDescList.CurTxDesc];
/* Incr current tx desc index */
INCR_TX_DESC_INDEX(heth->TxDescList.CurTxDesc, 1U);
/* Start transmission */
/* issue a poll command to Tx DMA by writing address of next immediate free descriptor */
WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t)(heth->TxDescList.TxDesc[heth->TxDescList.CurTxDesc]));
tickstart = HAL_GetTick();
/* Wait for data to be transmitted or timeout occured */
while((dmatxdesc->DESC3 & ETH_DMATXNDESCWBF_OWN) != (uint32_t)RESET)
{
if((heth->Instance->DMACSR & ETH_DMACSR_FBE) != (uint32_t)RESET)
{
heth->ErrorCode |= HAL_ETH_ERROR_DMA;
heth->DMAErrorCode = heth->Instance->DMACSR;
/* Set ETH HAL State to Ready */
heth->gState = HAL_ETH_STATE_ERROR;
/* Return function status */
return HAL_ERROR;
}
/* Check for the Timeout */
if(Timeout != HAL_MAX_DELAY)
{
if(((HAL_GetTick() - tickstart ) > Timeout) || (Timeout == 0U))
{