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cpu.vvp
executable file
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cpu.vvp
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#! /usr/bin/vvp
:ivl_version "10.1 (stable)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision - 12;
:vpi_module "system";
:vpi_module "vhdl_sys";
:vpi_module "v2005_math";
:vpi_module "va_math";
S_0x564f5c8d9bd0 .scope module, "cpu_tb" "cpu_tb" 2 4;
.timescale -9 -12;
v0x564f5c90b110_0 .net "a", 3 0, v0x564f5c9076a0_0; 1 drivers
v0x564f5c90b1d0_0 .net "b", 3 0, v0x564f5c9084a0_0; 1 drivers
v0x564f5c90b290_0 .var "clk", 0 0;
v0x564f5c90b380_0 .var "clr", 0 0;
v0x564f5c90b470_0 .var "code", 15 0;
S_0x564f5c8d64b0 .scope module, "uut" "cpu" 2 14, 3 4 0, S_0x564f5c8d9bd0;
.timescale -9 -12;
.port_info 0 /INPUT 16 "code"
.port_info 1 /INPUT 1 "clk"
.port_info 2 /INPUT 1 "clr"
.port_info 3 /OUTPUT 4 "a"
.port_info 4 /OUTPUT 4 "b"
L_0x564f5c90c730 .functor BUFZ 4, v0x564f5c9076a0_0, C4<0000>, C4<0000>, C4<0000>;
L_0x564f5c90c900 .functor BUFZ 4, v0x564f5c9084a0_0, C4<0000>, C4<0000>, C4<0000>;
v0x564f5c90a100_0 .net "a", 3 0, v0x564f5c9076a0_0; alias, 1 drivers
v0x564f5c90a1e0_0 .net "addrA", 2 0, L_0x564f5c90b740; 1 drivers
v0x564f5c90a2a0_0 .net "addrB", 2 0, L_0x564f5c90b6a0; 1 drivers
v0x564f5c90a340_0 .net "addrD", 2 0, L_0x564f5c90b7e0; 1 drivers
v0x564f5c90a450_0 .net "afs", 1 0, L_0x564f5c90bc60; 1 drivers
v0x564f5c90a5b0_0 .net "aluRes", 3 0, L_0x564f5c90d560; 1 drivers
v0x564f5c90a670_0 .net "b", 3 0, v0x564f5c9084a0_0; alias, 1 drivers
v0x564f5c90a780_0 .net "clk", 0 0, v0x564f5c90b290_0; 1 drivers
v0x564f5c90a820_0 .net "clr", 0 0, v0x564f5c90b380_0; 1 drivers
v0x564f5c90a950_0 .net "code", 15 0, v0x564f5c90b470_0; 1 drivers
v0x564f5c90a9f0_0 .net "data", 3 0, L_0x564f5c90b560; 1 drivers
v0x564f5c90aab0_0 .net "dwe", 0 0, L_0x564f5c90ba30; 1 drivers
v0x564f5c90ab50_0 .var "instDecoder", 6 0;
v0x564f5c90ac30_0 .net "muxRes", 3 0, L_0x564f5c90c2d0; 1 drivers
v0x564f5c90acf0_0 .net "opcode", 3 0, L_0x564f5c90b8b0; 1 drivers
v0x564f5c90add0_0 .net "rss", 1 0, L_0x564f5c90bb20; 1 drivers
v0x564f5c90ae90_0 .net "sub", 0 0, L_0x564f5c90bd90; 1 drivers
v0x564f5c90af30_0 .net "tmpA", 3 0, L_0x564f5c90c730; 1 drivers
v0x564f5c90afd0_0 .net "tmpB", 3 0, L_0x564f5c90c900; 1 drivers
v0x564f5c90b070_0 .net "we", 0 0, L_0x564f5c90b950; 1 drivers
E_0x564f5c8ab350 .event edge, v0x564f5c90acf0_0;
L_0x564f5c90b560 .part v0x564f5c90b470_0, 0, 4;
L_0x564f5c90b6a0 .part v0x564f5c90b470_0, 0, 3;
L_0x564f5c90b740 .part v0x564f5c90b470_0, 4, 3;
L_0x564f5c90b7e0 .part v0x564f5c90b470_0, 8, 3;
L_0x564f5c90b8b0 .part v0x564f5c90b470_0, 12, 4;
L_0x564f5c90b950 .part v0x564f5c90ab50_0, 0, 1;
L_0x564f5c90ba30 .part v0x564f5c90ab50_0, 1, 1;
L_0x564f5c90bb20 .part v0x564f5c90ab50_0, 2, 2;
L_0x564f5c90bc60 .part v0x564f5c90ab50_0, 4, 2;
L_0x564f5c90bd90 .part v0x564f5c90ab50_0, 6, 1;
S_0x564f5c8d5690 .scope module, "uud" "mux_4to1" 3 45, 4 1 0, S_0x564f5c8d64b0;
.timescale -9 -12;
.port_info 0 /INPUT 4 "a"
.port_info 1 /INPUT 4 "b"
.port_info 2 /INPUT 4 "c"
.port_info 3 /INPUT 4 "d"
.port_info 4 /INPUT 2 "sel"
.port_info 5 /OUTPUT 4 "out"
v0x564f5c8d4d70_0 .net *"_s1", 0 0, L_0x564f5c90be90; 1 drivers
v0x564f5c9043e0_0 .net *"_s3", 0 0, L_0x564f5c90bf30; 1 drivers
v0x564f5c9044c0_0 .net *"_s4", 3 0, L_0x564f5c90c060; 1 drivers
v0x564f5c904580_0 .net *"_s7", 0 0, L_0x564f5c90c100; 1 drivers
v0x564f5c904660_0 .net *"_s8", 3 0, L_0x564f5c90c1a0; 1 drivers
v0x564f5c904790_0 .net "a", 3 0, L_0x564f5c90b560; alias, 1 drivers
v0x564f5c904870_0 .net "b", 3 0, L_0x564f5c90d560; alias, 1 drivers
v0x564f5c904950_0 .net "c", 3 0, v0x564f5c9076a0_0; alias, 1 drivers
v0x564f5c904a30_0 .net "d", 3 0, v0x564f5c9076a0_0; alias, 1 drivers
v0x564f5c904af0_0 .net "out", 3 0, L_0x564f5c90c2d0; alias, 1 drivers
v0x564f5c904bb0_0 .net "sel", 1 0, L_0x564f5c90bb20; alias, 1 drivers
L_0x564f5c90be90 .part L_0x564f5c90bb20, 1, 1;
L_0x564f5c90bf30 .part L_0x564f5c90bb20, 0, 1;
L_0x564f5c90c060 .functor MUXZ 4, v0x564f5c9076a0_0, v0x564f5c9076a0_0, L_0x564f5c90bf30, C4<>;
L_0x564f5c90c100 .part L_0x564f5c90bb20, 0, 1;
L_0x564f5c90c1a0 .functor MUXZ 4, L_0x564f5c90b560, L_0x564f5c90d560, L_0x564f5c90c100, C4<>;
L_0x564f5c90c2d0 .functor MUXZ 4, L_0x564f5c90c1a0, L_0x564f5c90c060, L_0x564f5c90be90, C4<>;
S_0x564f5c904d50 .scope module, "uut" "alu" 3 51, 5 3 0, S_0x564f5c8d64b0;
.timescale -9 -12;
.port_info 0 /INPUT 1 "sub"
.port_info 1 /INPUT 2 "afs"
.port_info 2 /INPUT 4 "a"
.port_info 3 /INPUT 4 "b"
.port_info 4 /OUTPUT 4 "res"
L_0x564f5c90ca60 .functor XOR 4, L_0x564f5c90c900, L_0x564f5c90c9c0, C4<0000>, C4<0000>;
L_0x564f5c90cad0 .functor XOR 4, L_0x564f5c90c730, L_0x564f5c90c900, C4<0000>, C4<0000>;
L_0x564f5c90cbd0 .functor AND 4, L_0x564f5c90c730, L_0x564f5c90c900, C4<1111>, C4<1111>;
L_0x564f5c90ccf0 .functor OR 4, L_0x564f5c90c730, L_0x564f5c90c900, C4<0000>, C4<0000>;
v0x564f5c905bd0_0 .net *"_s10", 3 0, L_0x564f5c90cd80; 1 drivers
v0x564f5c905cd0_0 .net *"_s12", 3 0, L_0x564f5c90cee0; 1 drivers
L_0x7fdacc63e018 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v0x564f5c905db0_0 .net *"_s15", 2 0, L_0x7fdacc63e018; 1 drivers
v0x564f5c905e70_0 .net "a", 0 3, L_0x564f5c90c730; alias, 1 drivers
v0x564f5c905f50_0 .net "afs", 0 1, L_0x564f5c90bc60; alias, 1 drivers
v0x564f5c906010_0 .net "b", 0 3, L_0x564f5c90c900; alias, 1 drivers
v0x564f5c9060d0_0 .net "extendedSub", 0 3, L_0x564f5c90c9c0; 1 drivers
v0x564f5c9061b0_0 .net "mux1", 0 3, L_0x564f5c90cad0; 1 drivers
v0x564f5c9062a0_0 .net "mux2", 0 3, L_0x564f5c90cbd0; 1 drivers
v0x564f5c906400_0 .net "mux3", 0 3, L_0x564f5c90ccf0; 1 drivers
v0x564f5c9064d0_0 .net "mux4", 0 3, L_0x564f5c90cfd0; 1 drivers
v0x564f5c9065a0_0 .net "res", 0 3, L_0x564f5c90d560; alias, 1 drivers
v0x564f5c906640_0 .net "sub", 0 0, L_0x564f5c90bd90; alias, 1 drivers
v0x564f5c906700_0 .net "xorB", 0 3, L_0x564f5c90ca60; 1 drivers
L_0x564f5c90c9c0 .concat [ 1 1 1 1], L_0x564f5c90bd90, L_0x564f5c90bd90, L_0x564f5c90bd90, L_0x564f5c90bd90;
L_0x564f5c90cd80 .arith/sum 4, L_0x564f5c90c730, L_0x564f5c90ca60;
L_0x564f5c90cee0 .concat [ 1 3 0 0], L_0x564f5c90bd90, L_0x7fdacc63e018;
L_0x564f5c90cfd0 .arith/sum 4, L_0x564f5c90cd80, L_0x564f5c90cee0;
S_0x564f5c904ef0 .scope module, "m2" "mux_4to1" 5 18, 4 1 0, S_0x564f5c904d50;
.timescale -9 -12;
.port_info 0 /INPUT 4 "a"
.port_info 1 /INPUT 4 "b"
.port_info 2 /INPUT 4 "c"
.port_info 3 /INPUT 4 "d"
.port_info 4 /INPUT 2 "sel"
.port_info 5 /OUTPUT 4 "out"
v0x564f5c905160_0 .net *"_s1", 0 0, L_0x564f5c90d160; 1 drivers
v0x564f5c905260_0 .net *"_s3", 0 0, L_0x564f5c90d290; 1 drivers
v0x564f5c905340_0 .net *"_s4", 3 0, L_0x564f5c90d330; 1 drivers
v0x564f5c905400_0 .net *"_s7", 0 0, L_0x564f5c90d3d0; 1 drivers
v0x564f5c9054e0_0 .net *"_s8", 3 0, L_0x564f5c90d470; 1 drivers
v0x564f5c905610_0 .net "a", 3 0, L_0x564f5c90cad0; alias, 1 drivers
v0x564f5c9056f0_0 .net "b", 3 0, L_0x564f5c90cbd0; alias, 1 drivers
v0x564f5c9057d0_0 .net "c", 3 0, L_0x564f5c90ccf0; alias, 1 drivers
v0x564f5c9058b0_0 .net "d", 3 0, L_0x564f5c90cfd0; alias, 1 drivers
v0x564f5c905990_0 .net "out", 3 0, L_0x564f5c90d560; alias, 1 drivers
v0x564f5c905a50_0 .net "sel", 1 0, L_0x564f5c90bc60; alias, 1 drivers
L_0x564f5c90d160 .part L_0x564f5c90bc60, 1, 1;
L_0x564f5c90d290 .part L_0x564f5c90bc60, 0, 1;
L_0x564f5c90d330 .functor MUXZ 4, L_0x564f5c90ccf0, L_0x564f5c90cfd0, L_0x564f5c90d290, C4<>;
L_0x564f5c90d3d0 .part L_0x564f5c90bc60, 0, 1;
L_0x564f5c90d470 .functor MUXZ 4, L_0x564f5c90cad0, L_0x564f5c90cbd0, L_0x564f5c90d3d0, C4<>;
L_0x564f5c90d560 .functor MUXZ 4, L_0x564f5c90d470, L_0x564f5c90d330, L_0x564f5c90d160, C4<>;
S_0x564f5c906880 .scope module, "uut2" "three_port_reg_file" 3 46, 6 4 0, S_0x564f5c8d64b0;
.timescale -9 -12;
.port_info 0 /INPUT 4 "data"
.port_info 1 /INPUT 1 "load"
.port_info 2 /INPUT 1 "clk"
.port_info 3 /INPUT 1 "clr"
.port_info 4 /INPUT 3 "addrD"
.port_info 5 /INPUT 3 "addrA"
.port_info 6 /INPUT 3 "addrB"
.port_info 7 /OUTPUT 4 "a"
.port_info 8 /OUTPUT 4 "b"
L_0x564f5c8e0e60 .functor AND 8, v0x564f5c908bc0_0, L_0x564f5c90c450, C4<11111111>, C4<11111111>;
v0x564f5c908d00_0 .net *"_s0", 7 0, L_0x564f5c90c450; 1 drivers
v0x564f5c908de0_0 .net "a", 3 0, v0x564f5c9076a0_0; alias, 1 drivers
v0x564f5c908ea0_0 .net "addrA", 2 0, L_0x564f5c90b740; alias, 1 drivers
v0x564f5c908fa0_0 .net "addrB", 2 0, L_0x564f5c90b6a0; alias, 1 drivers
v0x564f5c909070_0 .net "addrD", 2 0, L_0x564f5c90b7e0; alias, 1 drivers
v0x564f5c909160_0 .net "b", 3 0, v0x564f5c9084a0_0; alias, 1 drivers
v0x564f5c909230_0 .net "clk", 0 0, v0x564f5c90b290_0; alias, 1 drivers
v0x564f5c9092d0_0 .net "clr", 0 0, v0x564f5c90b380_0; alias, 1 drivers
v0x564f5c909390_0 .net "data", 3 0, L_0x564f5c90c2d0; alias, 1 drivers
v0x564f5c909510_0 .net "decoder", 7 0, v0x564f5c908bc0_0; 1 drivers
v0x564f5c9095e0_0 .net "enable", 7 0, L_0x564f5c8e0e60; 1 drivers
v0x564f5c9096a0_0 .net "load", 0 0, L_0x564f5c90b950; alias, 1 drivers
v0x564f5c909760_0 .var "reg1", 3 0;
v0x564f5c909820_0 .var "reg2", 3 0;
v0x564f5c909930_0 .var "reg3", 3 0;
v0x564f5c909a40_0 .var "reg4", 3 0;
v0x564f5c909b50_0 .var "reg5", 3 0;
v0x564f5c909c60_0 .var "reg6", 3 0;
v0x564f5c909d70_0 .var "reg7", 3 0;
v0x564f5c909e80_0 .var "reg8", 3 0;
E_0x564f5c8ab480 .event posedge, v0x564f5c909230_0;
E_0x564f5c8aafc0 .event posedge, v0x564f5c9092d0_0;
LS_0x564f5c90c450_0_0 .concat [ 1 1 1 1], L_0x564f5c90b950, L_0x564f5c90b950, L_0x564f5c90b950, L_0x564f5c90b950;
LS_0x564f5c90c450_0_4 .concat [ 1 1 1 1], L_0x564f5c90b950, L_0x564f5c90b950, L_0x564f5c90b950, L_0x564f5c90b950;
L_0x564f5c90c450 .concat [ 4 4 0 0], LS_0x564f5c90c450_0_0, LS_0x564f5c90c450_0_4;
S_0x564f5c906bc0 .scope module, "A" "mux_8to1" 6 44, 7 1 0, S_0x564f5c906880;
.timescale -9 -12;
.port_info 0 /INPUT 4 "In1"
.port_info 1 /INPUT 4 "In2"
.port_info 2 /INPUT 4 "In3"
.port_info 3 /INPUT 4 "In4"
.port_info 4 /INPUT 4 "In5"
.port_info 5 /INPUT 4 "In6"
.port_info 6 /INPUT 4 "In7"
.port_info 7 /INPUT 4 "In8"
.port_info 8 /INPUT 3 "Sel"
.port_info 9 /OUTPUT 4 "Out"
v0x564f5c906f20_0 .net "In1", 3 0, v0x564f5c909760_0; 1 drivers
v0x564f5c907020_0 .net "In2", 3 0, v0x564f5c909820_0; 1 drivers
v0x564f5c907100_0 .net "In3", 3 0, v0x564f5c909930_0; 1 drivers
v0x564f5c9071f0_0 .net "In4", 3 0, v0x564f5c909a40_0; 1 drivers
v0x564f5c9072d0_0 .net "In5", 3 0, v0x564f5c909b50_0; 1 drivers
v0x564f5c907400_0 .net "In6", 3 0, v0x564f5c909c60_0; 1 drivers
v0x564f5c9074e0_0 .net "In7", 3 0, v0x564f5c909d70_0; 1 drivers
v0x564f5c9075c0_0 .net "In8", 3 0, v0x564f5c909e80_0; 1 drivers
v0x564f5c9076a0_0 .var "Out", 3 0;
v0x564f5c9077f0_0 .net "Sel", 2 0, L_0x564f5c90b740; alias, 1 drivers
E_0x564f5c8e6370/0 .event edge, v0x564f5c9077f0_0, v0x564f5c906f20_0, v0x564f5c907020_0, v0x564f5c907100_0;
E_0x564f5c8e6370/1 .event edge, v0x564f5c9071f0_0, v0x564f5c9072d0_0, v0x564f5c907400_0, v0x564f5c9074e0_0;
E_0x564f5c8e6370/2 .event edge, v0x564f5c9075c0_0;
E_0x564f5c8e6370 .event/or E_0x564f5c8e6370/0, E_0x564f5c8e6370/1, E_0x564f5c8e6370/2;
S_0x564f5c907a70 .scope module, "B" "mux_8to1" 6 45, 7 1 0, S_0x564f5c906880;
.timescale -9 -12;
.port_info 0 /INPUT 4 "In1"
.port_info 1 /INPUT 4 "In2"
.port_info 2 /INPUT 4 "In3"
.port_info 3 /INPUT 4 "In4"
.port_info 4 /INPUT 4 "In5"
.port_info 5 /INPUT 4 "In6"
.port_info 6 /INPUT 4 "In7"
.port_info 7 /INPUT 4 "In8"
.port_info 8 /INPUT 3 "Sel"
.port_info 9 /OUTPUT 4 "Out"
v0x564f5c907df0_0 .net "In1", 3 0, v0x564f5c909760_0; alias, 1 drivers
v0x564f5c907ed0_0 .net "In2", 3 0, v0x564f5c909820_0; alias, 1 drivers
v0x564f5c907f70_0 .net "In3", 3 0, v0x564f5c909930_0; alias, 1 drivers
v0x564f5c908070_0 .net "In4", 3 0, v0x564f5c909a40_0; alias, 1 drivers
v0x564f5c908140_0 .net "In5", 3 0, v0x564f5c909b50_0; alias, 1 drivers
v0x564f5c908230_0 .net "In6", 3 0, v0x564f5c909c60_0; alias, 1 drivers
v0x564f5c908300_0 .net "In7", 3 0, v0x564f5c909d70_0; alias, 1 drivers
v0x564f5c9083d0_0 .net "In8", 3 0, v0x564f5c909e80_0; alias, 1 drivers
v0x564f5c9084a0_0 .var "Out", 3 0;
v0x564f5c9085d0_0 .net "Sel", 2 0, L_0x564f5c90b6a0; alias, 1 drivers
E_0x564f5c907d60/0 .event edge, v0x564f5c9085d0_0, v0x564f5c906f20_0, v0x564f5c907020_0, v0x564f5c907100_0;
E_0x564f5c907d60/1 .event edge, v0x564f5c9071f0_0, v0x564f5c9072d0_0, v0x564f5c907400_0, v0x564f5c9074e0_0;
E_0x564f5c907d60/2 .event edge, v0x564f5c9075c0_0;
E_0x564f5c907d60 .event/or E_0x564f5c907d60/0, E_0x564f5c907d60/1, E_0x564f5c907d60/2;
S_0x564f5c908850 .scope module, "uut" "decoder_3to8" 6 14, 8 1 0, S_0x564f5c906880;
.timescale -9 -12;
.port_info 0 /INPUT 3 "in"
.port_info 1 /OUTPUT 8 "out"
v0x564f5c908ac0_0 .net "in", 2 0, L_0x564f5c90b7e0; alias, 1 drivers
v0x564f5c908bc0_0 .var "out", 7 0;
E_0x564f5c908a40 .event edge, v0x564f5c908ac0_0;
.scope S_0x564f5c908850;
T_0 ;
%wait E_0x564f5c908a40;
%load/vec4 v0x564f5c908ac0_0;
%dup/vec4;
%pushi/vec4 0, 0, 3;
%cmp/u;
%jmp/1 T_0.0, 6;
%dup/vec4;
%pushi/vec4 1, 0, 3;
%cmp/u;
%jmp/1 T_0.1, 6;
%dup/vec4;
%pushi/vec4 2, 0, 3;
%cmp/u;
%jmp/1 T_0.2, 6;
%dup/vec4;
%pushi/vec4 3, 0, 3;
%cmp/u;
%jmp/1 T_0.3, 6;
%dup/vec4;
%pushi/vec4 4, 0, 3;
%cmp/u;
%jmp/1 T_0.4, 6;
%dup/vec4;
%pushi/vec4 5, 0, 3;
%cmp/u;
%jmp/1 T_0.5, 6;
%dup/vec4;
%pushi/vec4 6, 0, 3;
%cmp/u;
%jmp/1 T_0.6, 6;
%dup/vec4;
%pushi/vec4 7, 0, 3;
%cmp/u;
%jmp/1 T_0.7, 6;
%jmp T_0.8;
T_0.0 ;
%pushi/vec4 1, 0, 8;
%store/vec4 v0x564f5c908bc0_0, 0, 8;
%jmp T_0.8;
T_0.1 ;
%pushi/vec4 2, 0, 8;
%store/vec4 v0x564f5c908bc0_0, 0, 8;
%jmp T_0.8;
T_0.2 ;
%pushi/vec4 4, 0, 8;
%store/vec4 v0x564f5c908bc0_0, 0, 8;
%jmp T_0.8;
T_0.3 ;
%pushi/vec4 8, 0, 8;
%store/vec4 v0x564f5c908bc0_0, 0, 8;
%jmp T_0.8;
T_0.4 ;
%pushi/vec4 16, 0, 8;
%store/vec4 v0x564f5c908bc0_0, 0, 8;
%jmp T_0.8;
T_0.5 ;
%pushi/vec4 32, 0, 8;
%store/vec4 v0x564f5c908bc0_0, 0, 8;
%jmp T_0.8;
T_0.6 ;
%pushi/vec4 64, 0, 8;
%store/vec4 v0x564f5c908bc0_0, 0, 8;
%jmp T_0.8;
T_0.7 ;
%pushi/vec4 128, 0, 8;
%store/vec4 v0x564f5c908bc0_0, 0, 8;
%jmp T_0.8;
T_0.8 ;
%pop/vec4 1;
%jmp T_0;
.thread T_0, $push;
.scope S_0x564f5c906bc0;
T_1 ;
%wait E_0x564f5c8e6370;
%load/vec4 v0x564f5c9077f0_0;
%dup/vec4;
%pushi/vec4 0, 0, 3;
%cmp/u;
%jmp/1 T_1.0, 6;
%dup/vec4;
%pushi/vec4 1, 0, 3;
%cmp/u;
%jmp/1 T_1.1, 6;
%dup/vec4;
%pushi/vec4 2, 0, 3;
%cmp/u;
%jmp/1 T_1.2, 6;
%dup/vec4;
%pushi/vec4 3, 0, 3;
%cmp/u;
%jmp/1 T_1.3, 6;
%dup/vec4;
%pushi/vec4 4, 0, 3;
%cmp/u;
%jmp/1 T_1.4, 6;
%dup/vec4;
%pushi/vec4 5, 0, 3;
%cmp/u;
%jmp/1 T_1.5, 6;
%dup/vec4;
%pushi/vec4 6, 0, 3;
%cmp/u;
%jmp/1 T_1.6, 6;
%dup/vec4;
%pushi/vec4 7, 0, 3;
%cmp/u;
%jmp/1 T_1.7, 6;
%pushi/vec4 0, 0, 4;
%store/vec4 v0x564f5c9076a0_0, 0, 4;
%jmp T_1.9;
T_1.0 ;
%load/vec4 v0x564f5c906f20_0;
%store/vec4 v0x564f5c9076a0_0, 0, 4;
%jmp T_1.9;
T_1.1 ;
%load/vec4 v0x564f5c907020_0;
%store/vec4 v0x564f5c9076a0_0, 0, 4;
%jmp T_1.9;
T_1.2 ;
%load/vec4 v0x564f5c907100_0;
%store/vec4 v0x564f5c9076a0_0, 0, 4;
%jmp T_1.9;
T_1.3 ;
%load/vec4 v0x564f5c9071f0_0;
%store/vec4 v0x564f5c9076a0_0, 0, 4;
%jmp T_1.9;
T_1.4 ;
%load/vec4 v0x564f5c9072d0_0;
%store/vec4 v0x564f5c9076a0_0, 0, 4;
%jmp T_1.9;
T_1.5 ;
%load/vec4 v0x564f5c907400_0;
%store/vec4 v0x564f5c9076a0_0, 0, 4;
%jmp T_1.9;
T_1.6 ;
%load/vec4 v0x564f5c9074e0_0;
%store/vec4 v0x564f5c9076a0_0, 0, 4;
%jmp T_1.9;
T_1.7 ;
%load/vec4 v0x564f5c9075c0_0;
%store/vec4 v0x564f5c9076a0_0, 0, 4;
%jmp T_1.9;
T_1.9 ;
%pop/vec4 1;
%jmp T_1;
.thread T_1, $push;
.scope S_0x564f5c907a70;
T_2 ;
%wait E_0x564f5c907d60;
%load/vec4 v0x564f5c9085d0_0;
%dup/vec4;
%pushi/vec4 0, 0, 3;
%cmp/u;
%jmp/1 T_2.0, 6;
%dup/vec4;
%pushi/vec4 1, 0, 3;
%cmp/u;
%jmp/1 T_2.1, 6;
%dup/vec4;
%pushi/vec4 2, 0, 3;
%cmp/u;
%jmp/1 T_2.2, 6;
%dup/vec4;
%pushi/vec4 3, 0, 3;
%cmp/u;
%jmp/1 T_2.3, 6;
%dup/vec4;
%pushi/vec4 4, 0, 3;
%cmp/u;
%jmp/1 T_2.4, 6;
%dup/vec4;
%pushi/vec4 5, 0, 3;
%cmp/u;
%jmp/1 T_2.5, 6;
%dup/vec4;
%pushi/vec4 6, 0, 3;
%cmp/u;
%jmp/1 T_2.6, 6;
%dup/vec4;
%pushi/vec4 7, 0, 3;
%cmp/u;
%jmp/1 T_2.7, 6;
%pushi/vec4 0, 0, 4;
%store/vec4 v0x564f5c9084a0_0, 0, 4;
%jmp T_2.9;
T_2.0 ;
%load/vec4 v0x564f5c907df0_0;
%store/vec4 v0x564f5c9084a0_0, 0, 4;
%jmp T_2.9;
T_2.1 ;
%load/vec4 v0x564f5c907ed0_0;
%store/vec4 v0x564f5c9084a0_0, 0, 4;
%jmp T_2.9;
T_2.2 ;
%load/vec4 v0x564f5c907f70_0;
%store/vec4 v0x564f5c9084a0_0, 0, 4;
%jmp T_2.9;
T_2.3 ;
%load/vec4 v0x564f5c908070_0;
%store/vec4 v0x564f5c9084a0_0, 0, 4;
%jmp T_2.9;
T_2.4 ;
%load/vec4 v0x564f5c908140_0;
%store/vec4 v0x564f5c9084a0_0, 0, 4;
%jmp T_2.9;
T_2.5 ;
%load/vec4 v0x564f5c908230_0;
%store/vec4 v0x564f5c9084a0_0, 0, 4;
%jmp T_2.9;
T_2.6 ;
%load/vec4 v0x564f5c908300_0;
%store/vec4 v0x564f5c9084a0_0, 0, 4;
%jmp T_2.9;
T_2.7 ;
%load/vec4 v0x564f5c9083d0_0;
%store/vec4 v0x564f5c9084a0_0, 0, 4;
%jmp T_2.9;
T_2.9 ;
%pop/vec4 1;
%jmp T_2;
.thread T_2, $push;
.scope S_0x564f5c906880;
T_3 ;
%wait E_0x564f5c8aafc0;
%pushi/vec4 0, 0, 4;
%store/vec4 v0x564f5c909760_0, 0, 4;
%pushi/vec4 0, 0, 4;
%store/vec4 v0x564f5c909820_0, 0, 4;
%pushi/vec4 0, 0, 4;
%store/vec4 v0x564f5c909930_0, 0, 4;
%pushi/vec4 0, 0, 4;
%store/vec4 v0x564f5c909a40_0, 0, 4;
%pushi/vec4 0, 0, 4;
%store/vec4 v0x564f5c909b50_0, 0, 4;
%pushi/vec4 0, 0, 4;
%store/vec4 v0x564f5c909c60_0, 0, 4;
%pushi/vec4 0, 0, 4;
%store/vec4 v0x564f5c909d70_0, 0, 4;
%pushi/vec4 0, 0, 4;
%store/vec4 v0x564f5c909e80_0, 0, 4;
%jmp T_3;
.thread T_3;
.scope S_0x564f5c906880;
T_4 ;
%wait E_0x564f5c8ab480;
%load/vec4 v0x564f5c9095e0_0;
%dup/vec4;
%pushi/vec4 1, 0, 8;
%cmp/u;
%jmp/1 T_4.0, 6;
%dup/vec4;
%pushi/vec4 2, 0, 8;
%cmp/u;
%jmp/1 T_4.1, 6;
%dup/vec4;
%pushi/vec4 4, 0, 8;
%cmp/u;
%jmp/1 T_4.2, 6;
%dup/vec4;
%pushi/vec4 8, 0, 8;
%cmp/u;
%jmp/1 T_4.3, 6;
%dup/vec4;
%pushi/vec4 16, 0, 8;
%cmp/u;
%jmp/1 T_4.4, 6;
%dup/vec4;
%pushi/vec4 32, 0, 8;
%cmp/u;
%jmp/1 T_4.5, 6;
%dup/vec4;
%pushi/vec4 64, 0, 8;
%cmp/u;
%jmp/1 T_4.6, 6;
%dup/vec4;
%pushi/vec4 128, 0, 8;
%cmp/u;
%jmp/1 T_4.7, 6;
%jmp T_4.8;
T_4.0 ;
%load/vec4 v0x564f5c909390_0;
%store/vec4 v0x564f5c909760_0, 0, 4;
%jmp T_4.8;
T_4.1 ;
%load/vec4 v0x564f5c909390_0;
%store/vec4 v0x564f5c909820_0, 0, 4;
%jmp T_4.8;
T_4.2 ;
%load/vec4 v0x564f5c909390_0;
%store/vec4 v0x564f5c909930_0, 0, 4;
%jmp T_4.8;
T_4.3 ;
%load/vec4 v0x564f5c909390_0;
%store/vec4 v0x564f5c909a40_0, 0, 4;
%jmp T_4.8;
T_4.4 ;
%load/vec4 v0x564f5c909390_0;
%store/vec4 v0x564f5c909b50_0, 0, 4;
%jmp T_4.8;
T_4.5 ;
%load/vec4 v0x564f5c909390_0;
%store/vec4 v0x564f5c909c60_0, 0, 4;
%jmp T_4.8;
T_4.6 ;
%load/vec4 v0x564f5c909390_0;
%store/vec4 v0x564f5c909d70_0, 0, 4;
%jmp T_4.8;
T_4.7 ;
%load/vec4 v0x564f5c909390_0;
%store/vec4 v0x564f5c909e80_0, 0, 4;
%jmp T_4.8;
T_4.8 ;
%pop/vec4 1;
%jmp T_4;
.thread T_4;
.scope S_0x564f5c8d64b0;
T_5 ;
%wait E_0x564f5c8ab350;
%load/vec4 v0x564f5c90acf0_0;
%dup/vec4;
%pushi/vec4 1, 0, 4;
%cmp/u;
%jmp/1 T_5.0, 6;
%dup/vec4;
%pushi/vec4 2, 0, 4;
%cmp/u;
%jmp/1 T_5.1, 6;
%dup/vec4;
%pushi/vec4 3, 0, 4;
%cmp/u;
%jmp/1 T_5.2, 6;
%dup/vec4;
%pushi/vec4 4, 0, 4;
%cmp/u;
%jmp/1 T_5.3, 6;
%dup/vec4;
%pushi/vec4 5, 0, 4;
%cmp/u;
%jmp/1 T_5.4, 6;
%dup/vec4;
%pushi/vec4 6, 0, 4;
%cmp/u;
%jmp/1 T_5.5, 6;
%dup/vec4;
%pushi/vec4 7, 0, 4;
%cmp/u;
%jmp/1 T_5.6, 6;
%dup/vec4;
%pushi/vec4 15, 0, 4;
%cmp/u;
%jmp/1 T_5.7, 6;
%pushi/vec4 0, 0, 7;
%store/vec4 v0x564f5c90ab50_0, 0, 7;
%jmp T_5.9;
T_5.0 ;
%pushi/vec4 1, 0, 7;
%store/vec4 v0x564f5c90ab50_0, 0, 7;
%jmp T_5.9;
T_5.1 ;
%pushi/vec4 9, 0, 7;
%store/vec4 v0x564f5c90ab50_0, 0, 7;
%jmp T_5.9;
T_5.2 ;
%pushi/vec4 2, 0, 7;
%store/vec4 v0x564f5c90ab50_0, 0, 7;
%jmp T_5.9;
T_5.3 ;
%pushi/vec4 5, 0, 7;
%store/vec4 v0x564f5c90ab50_0, 0, 7;
%jmp T_5.9;
T_5.4 ;
%pushi/vec4 21, 0, 7;
%store/vec4 v0x564f5c90ab50_0, 0, 7;
%jmp T_5.9;
T_5.5 ;
%pushi/vec4 37, 0, 7;
%store/vec4 v0x564f5c90ab50_0, 0, 7;
%jmp T_5.9;
T_5.6 ;
%pushi/vec4 53, 0, 7;
%store/vec4 v0x564f5c90ab50_0, 0, 7;
%jmp T_5.9;
T_5.7 ;
%pushi/vec4 117, 0, 7;
%store/vec4 v0x564f5c90ab50_0, 0, 7;
%jmp T_5.9;
T_5.9 ;
%pop/vec4 1;
%jmp T_5;
.thread T_5, $push;
.scope S_0x564f5c8d9bd0;
T_6 ;
%delay 5000, 0;
%load/vec4 v0x564f5c90b290_0;
%nor/r;
%store/vec4 v0x564f5c90b290_0, 0, 1;
%jmp T_6;
.thread T_6;
.scope S_0x564f5c8d9bd0;
T_7 ;
%vpi_call 2 17 "$dumpfile", "cpu.vcd" {0 0 0};
%vpi_call 2 18 "$dumpvars", 32'sb00000000000000000000000000000000, S_0x564f5c8d9bd0 {0 0 0};
%pushi/vec4 0, 0, 1;
%store/vec4 v0x564f5c90b290_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0x564f5c90b380_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0x564f5c90b380_0, 0, 1;
%pushi/vec4 4096, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 4353, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 4611, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 4867, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 12323, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 9248, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 62529, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 12324, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 29489, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 12323, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 17716, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 12325, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 21812, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 12325, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 25908, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 12325, 0, 16;
%store/vec4 v0x564f5c90b470_0, 0, 16;
%delay 10000, 0;
%pushi/vec4 1, 0, 1;
%store/vec4 v0x564f5c90b380_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0x564f5c90b380_0, 0, 1;
%delay 10000, 0;
%vpi_call 2 40 "$finish" {0 0 0};
%end;
.thread T_7;
# The file index is used to find the file name in the following table.
:file_names 9;
"N/A";
"<interactive>";
"cpu_tb.v";
"./cpu.v";
"./mux_4to1.v";
"./alu.v";
"./three_port_reg_file.v";
"./mux_8to1.v";
"./decoder_3to8.v";