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misc16-eforth

This project implements eForth on the MISC16, a 16-bit minimal CPU which only has a single instruction 'mov'.

The resources included here:

  • Python based MISC16 assembler and simulator
  • C based MISC16 simulator
  • MISC16 assembly eForth
  • VHDL MISC16 CPU core

History of MISC16

The MISC16 project started with an article by Douglas W. Jones:

http://homepage.cs.uiowa.edu/~jones/arch/risc/

Juergen Pintaske saw the article and discussed the approach with his colleagues. At the time he had visited ARM and ARC in the UK, and this design looked like a “low-cost” ARC, where additional functions can be easily added memory mapped, without influencing the rest. The result was the original hardware version, tested on a CPLD board, developed in VHDL by Harry Siebert and the Mixed Mode ASIC Design Team. Some Forth people in Munich were involved later as well after the board was up and running, mainly Bernd Paysan. Later on, Juergen Pintaske found out, that this design had been slightly modified at FH Nuremberg and there then even been implemented as ASIC, manufactured by AMS as a student project. Juergen asked Mixed Mode, if this Mixed Mode Design can be published and used elsewhere, as nobody was using it, which was granted.

MISC16 Architecture

The MISC16 has a 16-bit address bus, memory locations 0x0010-0xFFFF can be used for RAM, ROM, and IO, the first 16 locations are reserved for a memory mapped ALU and Program Counter which implement virtual instructions.

+---------+-------------+------------------+
| Address | Source      | Destination      |
+---------+-------------+------------------+
| 0x0000  | PC          | PC               |   
| 0x0001  | PC+2        | PC if A < 0      |
| 0x0002  | PC+4        | PC if A = 0      |
| 0x0003  | PC+6        | -                |
| 0x0004  | -           | PC if C = 1      |
| 0x0005  | -           | -                |
| 0x0006  | -           | -                |
| 0x0007  | [A]         | [A]              |
| 0x0008  | A           | A                |
| 0x0009  | -           | A = A - source   |
| 0x000A  | -           | -                |
| 0x000B  | -           | A = A + source   |
| 0x000C  | -           | A = A xor source |
| 0x000D  | -           | A = A or source  |
| 0x000E  | -           | A = A and source |
| 0x000F  | -           | A = source >> 1  | 
+---------+-------------+------------------+

Program execution begins at address 0x0010, after which the program counter increments by 2 with each instruction until its modified by an instruction whose destination is the program counter (PC). Reading PC yields the program counter while it’s still pointing to the address of the instruction doing the read, PC+2 is the next instruction and so on for PC+4 and PC+6.

A is the accumulator which can be used as an index register for indirect addressing. The accumulator is the destination of the arithmetic and logic operations and can be used to conditionally load the program counter for conditional jumps.

The carry flag C is also used to conditionally load the PC, its modified by the add and subtract instructions, for subtract it becomes borrow. The carry flag is used in the shift right instruction (0x000F), here it has the least significant bit of the accumulator shifted into it and its old value shifted into the most significant bit.

Assembler

The Python script 'misc.py' implements a very simple MISC16 assembler, it only understands 5 keywords:

+-----+---------------------------------------+
| mov | Move instruction                      |
| equ | Assign a constant integer to a symbol | 
| db  | Define a byte                         |
| dw  | Define a word                         |
| org | Change current assmbler pointer       |
+---------------------------------------------+

The assembler uses Python 3. The following command line will assemble the eForth image generating a binary image, a FPGA memory initialisation file and a listing file.


  python misc.py eforth.asm eforth.bin eforth.lst eforth.mif

The listing file can be viewed with a text editor and used as an insight into the syntax of the assembly language. The binary file can be used with the C based simulator and the .MIF file for using to initialize FPGA block memory with Intel Quartus. If you don't need all the output files these can be left off and they won't be generated.

Simulator

By not specifying any output files, misc.py will run the simulator after a successful assembly. A version of the simulator written in C is included, the source code resides in a single file and can easily be built by gcc or another C compiler. When compiled it is run by specifying the binary image on the command line.


  misc eforth.bin

License

misc16-eforth is distributed under the terms of the MIT license.

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MISC16 minimal CPU running eForth

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