/
wd33c93.c
2234 lines (1961 loc) · 66.1 KB
/
wd33c93.c
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/*
* Copyright (c) 1996 John Shifflett, GeoLog Consulting
* john@geolog.com
* jshiffle@netcom.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/*
* Drew Eckhardt's excellent 'Generic NCR5380' sources from Linux-PC
* provided much of the inspiration and some of the code for this
* driver. Everything I know about Amiga DMA was gleaned from careful
* reading of Hamish Mcdonald's original wd33c93 driver; in fact, I
* borrowed shamelessly from all over that source. Thanks Hamish!
*
* _This_ driver is (I feel) an improvement over the old one in
* several respects:
*
* - Target Disconnection/Reconnection is now supported. Any
* system with more than one device active on the SCSI bus
* will benefit from this. The driver defaults to what I
* call 'adaptive disconnect' - meaning that each command
* is evaluated individually as to whether or not it should
* be run with the option to disconnect/reselect (if the
* device chooses), or as a "SCSI-bus-hog".
*
* - Synchronous data transfers are now supported. Because of
* a few devices that choke after telling the driver that
* they can do sync transfers, we don't automatically use
* this faster protocol - it can be enabled via the command-
* line on a device-by-device basis.
*
* - Runtime operating parameters can now be specified through
* the 'amiboot' or the 'insmod' command line. For amiboot do:
* "amiboot [usual stuff] wd33c93=blah,blah,blah"
* The defaults should be good for most people. See the comment
* for 'setup_strings' below for more details.
*
* - The old driver relied exclusively on what the Western Digital
* docs call "Combination Level 2 Commands", which are a great
* idea in that the CPU is relieved of a lot of interrupt
* overhead. However, by accepting a certain (user-settable)
* amount of additional interrupts, this driver achieves
* better control over the SCSI bus, and data transfers are
* almost as fast while being much easier to define, track,
* and debug.
*
*
* TODO:
* more speed. linked commands.
*
*
* People with bug reports, wish-lists, complaints, comments,
* or improvements are asked to pah-leeez email me (John Shifflett)
* at john@geolog.com or jshiffle@netcom.com! I'm anxious to get
* this thing into as good a shape as possible, and I'm positive
* there are lots of lurking bugs and "Stupid Places".
*
* Updates:
*
* Added support for pre -A chips, which don't have advanced features
* and will generate CSR_RESEL rather than CSR_RESEL_AM.
* Richard Hirst <richard@sleepie.demon.co.uk> August 2000
*
* Added support for Burst Mode DMA and Fast SCSI. Enabled the use of
* default_sx_per for asynchronous data transfers. Added adjustment
* of transfer periods in sx_table to the actual input-clock.
* peter fuerst <post@pfrst.de> February 2007
*/
#include <linux/module.h>
#include <linux/string.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/blkdev.h>
#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_host.h>
#include <asm/irq.h>
#include "wd33c93.h"
#define optimum_sx_per(hostdata) (hostdata)->sx_table[1].period_ns
#define WD33C93_VERSION "1.26++"
#define WD33C93_DATE "10/Feb/2007"
MODULE_AUTHOR("John Shifflett");
MODULE_DESCRIPTION("Generic WD33C93 SCSI driver");
MODULE_LICENSE("GPL");
/*
* 'setup_strings' is a single string used to pass operating parameters and
* settings from the kernel/module command-line to the driver. 'setup_args[]'
* is an array of strings that define the compile-time default values for
* these settings. If Linux boots with an amiboot or insmod command-line,
* those settings are combined with 'setup_args[]'. Note that amiboot
* command-lines are prefixed with "wd33c93=" while insmod uses a
* "setup_strings=" prefix. The driver recognizes the following keywords
* (lower case required) and arguments:
*
* - nosync:bitmask -bitmask is a byte where the 1st 7 bits correspond with
* the 7 possible SCSI devices. Set a bit to negotiate for
* asynchronous transfers on that device. To maintain
* backwards compatibility, a command-line such as
* "wd33c93=255" will be automatically translated to
* "wd33c93=nosync:0xff".
* - nodma:x -x = 1 to disable DMA, x = 0 to enable it. Argument is
* optional - if not present, same as "nodma:1".
* - period:ns -ns is the minimum # of nanoseconds in a SCSI data transfer
* period. Default is 500; acceptable values are 250 - 1000.
* - disconnect:x -x = 0 to never allow disconnects, 2 to always allow them.
* x = 1 does 'adaptive' disconnects, which is the default
* and generally the best choice.
* - debug:x -If 'DEBUGGING_ON' is defined, x is a bit mask that causes
* various types of debug output to printed - see the DB_xxx
* defines in wd33c93.h
* - clock:x -x = clock input in MHz for WD33c93 chip. Normal values
* would be from 8 through 20. Default is 8.
* - burst:x -x = 1 to use Burst Mode (or Demand-Mode) DMA, x = 0 to use
* Single Byte DMA, which is the default. Argument is
* optional - if not present, same as "burst:1".
* - fast:x -x = 1 to enable Fast SCSI, which is only effective with
* input-clock divisor 4 (WD33C93_FS_16_20), x = 0 to disable
* it, which is the default. Argument is optional - if not
* present, same as "fast:1".
* - next -No argument. Used to separate blocks of keywords when
* there's more than one host adapter in the system.
*
* Syntax Notes:
* - Numeric arguments can be decimal or the '0x' form of hex notation. There
* _must_ be a colon between a keyword and its numeric argument, with no
* spaces.
* - Keywords are separated by commas, no spaces, in the standard kernel
* command-line manner.
* - A keyword in the 'nth' comma-separated command-line member will overwrite
* the 'nth' element of setup_args[]. A blank command-line member (in
* other words, a comma with no preceding keyword) will _not_ overwrite
* the corresponding setup_args[] element.
* - If a keyword is used more than once, the first one applies to the first
* SCSI host found, the second to the second card, etc, unless the 'next'
* keyword is used to change the order.
*
* Some amiboot examples (for insmod, use 'setup_strings' instead of 'wd33c93'):
* - wd33c93=nosync:255
* - wd33c93=nodma
* - wd33c93=nodma:1
* - wd33c93=disconnect:2,nosync:0x08,period:250
* - wd33c93=debug:0x1c
*/
/* Normally, no defaults are specified */
static char *setup_args[] = { "", "", "", "", "", "", "", "", "", "" };
static char *setup_strings;
module_param(setup_strings, charp, 0);
static void wd33c93_execute(struct Scsi_Host *instance);
#ifdef CONFIG_WD33C93_PIO
static inline uchar
read_wd33c93(const wd33c93_regs regs, uchar reg_num)
{
uchar data;
outb(reg_num, regs.SASR);
data = inb(regs.SCMD);
return data;
}
static inline unsigned long
read_wd33c93_count(const wd33c93_regs regs)
{
unsigned long value;
outb(WD_TRANSFER_COUNT_MSB, regs.SASR);
value = inb(regs.SCMD) << 16;
value |= inb(regs.SCMD) << 8;
value |= inb(regs.SCMD);
return value;
}
static inline uchar
read_aux_stat(const wd33c93_regs regs)
{
return inb(regs.SASR);
}
static inline void
write_wd33c93(const wd33c93_regs regs, uchar reg_num, uchar value)
{
outb(reg_num, regs.SASR);
outb(value, regs.SCMD);
}
static inline void
write_wd33c93_count(const wd33c93_regs regs, unsigned long value)
{
outb(WD_TRANSFER_COUNT_MSB, regs.SASR);
outb((value >> 16) & 0xff, regs.SCMD);
outb((value >> 8) & 0xff, regs.SCMD);
outb( value & 0xff, regs.SCMD);
}
#define write_wd33c93_cmd(regs, cmd) \
write_wd33c93((regs), WD_COMMAND, (cmd))
static inline void
write_wd33c93_cdb(const wd33c93_regs regs, uint len, uchar cmnd[])
{
int i;
outb(WD_CDB_1, regs.SASR);
for (i=0; i<len; i++)
outb(cmnd[i], regs.SCMD);
}
#else /* CONFIG_WD33C93_PIO */
static inline uchar
read_wd33c93(const wd33c93_regs regs, uchar reg_num)
{
*regs.SASR = reg_num;
mb();
return (*regs.SCMD);
}
static unsigned long
read_wd33c93_count(const wd33c93_regs regs)
{
unsigned long value;
*regs.SASR = WD_TRANSFER_COUNT_MSB;
mb();
value = *regs.SCMD << 16;
value |= *regs.SCMD << 8;
value |= *regs.SCMD;
mb();
return value;
}
static inline uchar
read_aux_stat(const wd33c93_regs regs)
{
return *regs.SASR;
}
static inline void
write_wd33c93(const wd33c93_regs regs, uchar reg_num, uchar value)
{
*regs.SASR = reg_num;
mb();
*regs.SCMD = value;
mb();
}
static void
write_wd33c93_count(const wd33c93_regs regs, unsigned long value)
{
*regs.SASR = WD_TRANSFER_COUNT_MSB;
mb();
*regs.SCMD = value >> 16;
*regs.SCMD = value >> 8;
*regs.SCMD = value;
mb();
}
static inline void
write_wd33c93_cmd(const wd33c93_regs regs, uchar cmd)
{
*regs.SASR = WD_COMMAND;
mb();
*regs.SCMD = cmd;
mb();
}
static inline void
write_wd33c93_cdb(const wd33c93_regs regs, uint len, uchar cmnd[])
{
int i;
*regs.SASR = WD_CDB_1;
for (i = 0; i < len; i++)
*regs.SCMD = cmnd[i];
}
#endif /* CONFIG_WD33C93_PIO */
static inline uchar
read_1_byte(const wd33c93_regs regs)
{
uchar asr;
uchar x = 0;
write_wd33c93(regs, WD_CONTROL, CTRL_IDI | CTRL_EDI | CTRL_POLLED);
write_wd33c93_cmd(regs, WD_CMD_TRANS_INFO | 0x80);
do {
asr = read_aux_stat(regs);
if (asr & ASR_DBR)
x = read_wd33c93(regs, WD_DATA);
} while (!(asr & ASR_INT));
return x;
}
static int
round_period(unsigned int period, const struct sx_period *sx_table)
{
int x;
for (x = 1; sx_table[x].period_ns; x++) {
if ((period <= sx_table[x - 0].period_ns) &&
(period > sx_table[x - 1].period_ns)) {
return x;
}
}
return 7;
}
/*
* Calculate Synchronous Transfer Register value from SDTR code.
*/
static uchar
calc_sync_xfer(unsigned int period, unsigned int offset, unsigned int fast,
const struct sx_period *sx_table)
{
/* When doing Fast SCSI synchronous data transfers, the corresponding
* value in 'sx_table' is two times the actually used transfer period.
*/
uchar result;
if (offset && fast) {
fast = STR_FSS;
period *= 2;
} else {
fast = 0;
}
period *= 4; /* convert SDTR code to ns */
result = sx_table[round_period(period,sx_table)].reg_value;
result |= (offset < OPTIMUM_SX_OFF) ? offset : OPTIMUM_SX_OFF;
result |= fast;
return result;
}
/*
* Calculate SDTR code bytes [3],[4] from period and offset.
*/
static inline void
calc_sync_msg(unsigned int period, unsigned int offset, unsigned int fast,
uchar msg[2])
{
/* 'period' is a "normal"-mode value, like the ones in 'sx_table'. The
* actually used transfer period for Fast SCSI synchronous data
* transfers is half that value.
*/
period /= 4;
if (offset && fast)
period /= 2;
msg[0] = period;
msg[1] = offset;
}
static int
wd33c93_queuecommand_lck(struct scsi_cmnd *cmd,
void (*done)(struct scsi_cmnd *))
{
struct WD33C93_hostdata *hostdata;
struct scsi_cmnd *tmp;
hostdata = (struct WD33C93_hostdata *) cmd->device->host->hostdata;
DB(DB_QUEUE_COMMAND,
printk("Q-%d-%02x-%ld( ", cmd->device->id, cmd->cmnd[0], cmd->serial_number))
/* Set up a few fields in the scsi_cmnd structure for our own use:
* - host_scribble is the pointer to the next cmd in the input queue
* - scsi_done points to the routine we call when a cmd is finished
* - result is what you'd expect
*/
cmd->host_scribble = NULL;
cmd->scsi_done = done;
cmd->result = 0;
/* We use the Scsi_Pointer structure that's included with each command
* as a scratchpad (as it's intended to be used!). The handy thing about
* the SCp.xxx fields is that they're always associated with a given
* cmd, and are preserved across disconnect-reselect. This means we
* can pretty much ignore SAVE_POINTERS and RESTORE_POINTERS messages
* if we keep all the critical pointers and counters in SCp:
* - SCp.ptr is the pointer into the RAM buffer
* - SCp.this_residual is the size of that buffer
* - SCp.buffer points to the current scatter-gather buffer
* - SCp.buffers_residual tells us how many S.G. buffers there are
* - SCp.have_data_in is not used
* - SCp.sent_command is not used
* - SCp.phase records this command's SRCID_ER bit setting
*/
if (scsi_bufflen(cmd)) {
cmd->SCp.buffer = scsi_sglist(cmd);
cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1;
cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
cmd->SCp.this_residual = cmd->SCp.buffer->length;
} else {
cmd->SCp.buffer = NULL;
cmd->SCp.buffers_residual = 0;
cmd->SCp.ptr = NULL;
cmd->SCp.this_residual = 0;
}
/* WD docs state that at the conclusion of a "LEVEL2" command, the
* status byte can be retrieved from the LUN register. Apparently,
* this is the case only for *uninterrupted* LEVEL2 commands! If
* there are any unexpected phases entered, even if they are 100%
* legal (different devices may choose to do things differently),
* the LEVEL2 command sequence is exited. This often occurs prior
* to receiving the status byte, in which case the driver does a
* status phase interrupt and gets the status byte on its own.
* While such a command can then be "resumed" (ie restarted to
* finish up as a LEVEL2 command), the LUN register will NOT be
* a valid status byte at the command's conclusion, and we must
* use the byte obtained during the earlier interrupt. Here, we
* preset SCp.Status to an illegal value (0xff) so that when
* this command finally completes, we can tell where the actual
* status byte is stored.
*/
cmd->SCp.Status = ILLEGAL_STATUS_BYTE;
/*
* Add the cmd to the end of 'input_Q'. Note that REQUEST SENSE
* commands are added to the head of the queue so that the desired
* sense data is not lost before REQUEST_SENSE executes.
*/
spin_lock_irq(&hostdata->lock);
if (!(hostdata->input_Q) || (cmd->cmnd[0] == REQUEST_SENSE)) {
cmd->host_scribble = (uchar *) hostdata->input_Q;
hostdata->input_Q = cmd;
} else { /* find the end of the queue */
for (tmp = (struct scsi_cmnd *) hostdata->input_Q;
tmp->host_scribble;
tmp = (struct scsi_cmnd *) tmp->host_scribble) ;
tmp->host_scribble = (uchar *) cmd;
}
/* We know that there's at least one command in 'input_Q' now.
* Go see if any of them are runnable!
*/
wd33c93_execute(cmd->device->host);
DB(DB_QUEUE_COMMAND, printk(")Q-%ld ", cmd->serial_number))
spin_unlock_irq(&hostdata->lock);
return 0;
}
DEF_SCSI_QCMD(wd33c93_queuecommand)
/*
* This routine attempts to start a scsi command. If the host_card is
* already connected, we give up immediately. Otherwise, look through
* the input_Q, using the first command we find that's intended
* for a currently non-busy target/lun.
*
* wd33c93_execute() is always called with interrupts disabled or from
* the wd33c93_intr itself, which means that a wd33c93 interrupt
* cannot occur while we are in here.
*/
static void
wd33c93_execute(struct Scsi_Host *instance)
{
struct WD33C93_hostdata *hostdata =
(struct WD33C93_hostdata *) instance->hostdata;
const wd33c93_regs regs = hostdata->regs;
struct scsi_cmnd *cmd, *prev;
DB(DB_EXECUTE, printk("EX("))
if (hostdata->selecting || hostdata->connected) {
DB(DB_EXECUTE, printk(")EX-0 "))
return;
}
/*
* Search through the input_Q for a command destined
* for an idle target/lun.
*/
cmd = (struct scsi_cmnd *) hostdata->input_Q;
prev = NULL;
while (cmd) {
if (!(hostdata->busy[cmd->device->id] & (1 << cmd->device->lun)))
break;
prev = cmd;
cmd = (struct scsi_cmnd *) cmd->host_scribble;
}
/* quit if queue empty or all possible targets are busy */
if (!cmd) {
DB(DB_EXECUTE, printk(")EX-1 "))
return;
}
/* remove command from queue */
if (prev)
prev->host_scribble = cmd->host_scribble;
else
hostdata->input_Q = (struct scsi_cmnd *) cmd->host_scribble;
#ifdef PROC_STATISTICS
hostdata->cmd_cnt[cmd->device->id]++;
#endif
/*
* Start the selection process
*/
if (cmd->sc_data_direction == DMA_TO_DEVICE)
write_wd33c93(regs, WD_DESTINATION_ID, cmd->device->id);
else
write_wd33c93(regs, WD_DESTINATION_ID, cmd->device->id | DSTID_DPD);
/* Now we need to figure out whether or not this command is a good
* candidate for disconnect/reselect. We guess to the best of our
* ability, based on a set of hierarchical rules. When several
* devices are operating simultaneously, disconnects are usually
* an advantage. In a single device system, or if only 1 device
* is being accessed, transfers usually go faster if disconnects
* are not allowed:
*
* + Commands should NEVER disconnect if hostdata->disconnect =
* DIS_NEVER (this holds for tape drives also), and ALWAYS
* disconnect if hostdata->disconnect = DIS_ALWAYS.
* + Tape drive commands should always be allowed to disconnect.
* + Disconnect should be allowed if disconnected_Q isn't empty.
* + Commands should NOT disconnect if input_Q is empty.
* + Disconnect should be allowed if there are commands in input_Q
* for a different target/lun. In this case, the other commands
* should be made disconnect-able, if not already.
*
* I know, I know - this code would flunk me out of any
* "C Programming 101" class ever offered. But it's easy
* to change around and experiment with for now.
*/
cmd->SCp.phase = 0; /* assume no disconnect */
if (hostdata->disconnect == DIS_NEVER)
goto no;
if (hostdata->disconnect == DIS_ALWAYS)
goto yes;
if (cmd->device->type == 1) /* tape drive? */
goto yes;
if (hostdata->disconnected_Q) /* other commands disconnected? */
goto yes;
if (!(hostdata->input_Q)) /* input_Q empty? */
goto no;
for (prev = (struct scsi_cmnd *) hostdata->input_Q; prev;
prev = (struct scsi_cmnd *) prev->host_scribble) {
if ((prev->device->id != cmd->device->id) ||
(prev->device->lun != cmd->device->lun)) {
for (prev = (struct scsi_cmnd *) hostdata->input_Q; prev;
prev = (struct scsi_cmnd *) prev->host_scribble)
prev->SCp.phase = 1;
goto yes;
}
}
goto no;
yes:
cmd->SCp.phase = 1;
#ifdef PROC_STATISTICS
hostdata->disc_allowed_cnt[cmd->device->id]++;
#endif
no:
write_wd33c93(regs, WD_SOURCE_ID, ((cmd->SCp.phase) ? SRCID_ER : 0));
write_wd33c93(regs, WD_TARGET_LUN, cmd->device->lun);
write_wd33c93(regs, WD_SYNCHRONOUS_TRANSFER,
hostdata->sync_xfer[cmd->device->id]);
hostdata->busy[cmd->device->id] |= (1 << cmd->device->lun);
if ((hostdata->level2 == L2_NONE) ||
(hostdata->sync_stat[cmd->device->id] == SS_UNSET)) {
/*
* Do a 'Select-With-ATN' command. This will end with
* one of the following interrupts:
* CSR_RESEL_AM: failure - can try again later.
* CSR_TIMEOUT: failure - give up.
* CSR_SELECT: success - proceed.
*/
hostdata->selecting = cmd;
/* Every target has its own synchronous transfer setting, kept in the
* sync_xfer array, and a corresponding status byte in sync_stat[].
* Each target's sync_stat[] entry is initialized to SX_UNSET, and its
* sync_xfer[] entry is initialized to the default/safe value. SS_UNSET
* means that the parameters are undetermined as yet, and that we
* need to send an SDTR message to this device after selection is
* complete: We set SS_FIRST to tell the interrupt routine to do so.
* If we've been asked not to try synchronous transfers on this
* target (and _all_ luns within it), we'll still send the SDTR message
* later, but at that time we'll negotiate for async by specifying a
* sync fifo depth of 0.
*/
if (hostdata->sync_stat[cmd->device->id] == SS_UNSET)
hostdata->sync_stat[cmd->device->id] = SS_FIRST;
hostdata->state = S_SELECTING;
write_wd33c93_count(regs, 0); /* guarantee a DATA_PHASE interrupt */
write_wd33c93_cmd(regs, WD_CMD_SEL_ATN);
} else {
/*
* Do a 'Select-With-ATN-Xfer' command. This will end with
* one of the following interrupts:
* CSR_RESEL_AM: failure - can try again later.
* CSR_TIMEOUT: failure - give up.
* anything else: success - proceed.
*/
hostdata->connected = cmd;
write_wd33c93(regs, WD_COMMAND_PHASE, 0);
/* copy command_descriptor_block into WD chip
* (take advantage of auto-incrementing)
*/
write_wd33c93_cdb(regs, cmd->cmd_len, cmd->cmnd);
/* The wd33c93 only knows about Group 0, 1, and 5 commands when
* it's doing a 'select-and-transfer'. To be safe, we write the
* size of the CDB into the OWN_ID register for every case. This
* way there won't be problems with vendor-unique, audio, etc.
*/
write_wd33c93(regs, WD_OWN_ID, cmd->cmd_len);
/* When doing a non-disconnect command with DMA, we can save
* ourselves a DATA phase interrupt later by setting everything
* up ahead of time.
*/
if ((cmd->SCp.phase == 0) && (hostdata->no_dma == 0)) {
if (hostdata->dma_setup(cmd,
(cmd->sc_data_direction == DMA_TO_DEVICE) ?
DATA_OUT_DIR : DATA_IN_DIR))
write_wd33c93_count(regs, 0); /* guarantee a DATA_PHASE interrupt */
else {
write_wd33c93_count(regs,
cmd->SCp.this_residual);
write_wd33c93(regs, WD_CONTROL,
CTRL_IDI | CTRL_EDI | hostdata->dma_mode);
hostdata->dma = D_DMA_RUNNING;
}
} else
write_wd33c93_count(regs, 0); /* guarantee a DATA_PHASE interrupt */
hostdata->state = S_RUNNING_LEVEL2;
write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
}
/*
* Since the SCSI bus can handle only 1 connection at a time,
* we get out of here now. If the selection fails, or when
* the command disconnects, we'll come back to this routine
* to search the input_Q again...
*/
DB(DB_EXECUTE,
printk("%s%ld)EX-2 ", (cmd->SCp.phase) ? "d:" : "", cmd->serial_number))
}
static void
transfer_pio(const wd33c93_regs regs, uchar * buf, int cnt,
int data_in_dir, struct WD33C93_hostdata *hostdata)
{
uchar asr;
DB(DB_TRANSFER,
printk("(%p,%d,%s:", buf, cnt, data_in_dir ? "in" : "out"))
write_wd33c93(regs, WD_CONTROL, CTRL_IDI | CTRL_EDI | CTRL_POLLED);
write_wd33c93_count(regs, cnt);
write_wd33c93_cmd(regs, WD_CMD_TRANS_INFO);
if (data_in_dir) {
do {
asr = read_aux_stat(regs);
if (asr & ASR_DBR)
*buf++ = read_wd33c93(regs, WD_DATA);
} while (!(asr & ASR_INT));
} else {
do {
asr = read_aux_stat(regs);
if (asr & ASR_DBR)
write_wd33c93(regs, WD_DATA, *buf++);
} while (!(asr & ASR_INT));
}
/* Note: we are returning with the interrupt UN-cleared.
* Since (presumably) an entire I/O operation has
* completed, the bus phase is probably different, and
* the interrupt routine will discover this when it
* responds to the uncleared int.
*/
}
static void
transfer_bytes(const wd33c93_regs regs, struct scsi_cmnd *cmd,
int data_in_dir)
{
struct WD33C93_hostdata *hostdata;
unsigned long length;
hostdata = (struct WD33C93_hostdata *) cmd->device->host->hostdata;
/* Normally, you'd expect 'this_residual' to be non-zero here.
* In a series of scatter-gather transfers, however, this
* routine will usually be called with 'this_residual' equal
* to 0 and 'buffers_residual' non-zero. This means that a
* previous transfer completed, clearing 'this_residual', and
* now we need to setup the next scatter-gather buffer as the
* source or destination for THIS transfer.
*/
if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
++cmd->SCp.buffer;
--cmd->SCp.buffers_residual;
cmd->SCp.this_residual = cmd->SCp.buffer->length;
cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
}
if (!cmd->SCp.this_residual) /* avoid bogus setups */
return;
write_wd33c93(regs, WD_SYNCHRONOUS_TRANSFER,
hostdata->sync_xfer[cmd->device->id]);
/* 'hostdata->no_dma' is TRUE if we don't even want to try DMA.
* Update 'this_residual' and 'ptr' after 'transfer_pio()' returns.
*/
if (hostdata->no_dma || hostdata->dma_setup(cmd, data_in_dir)) {
#ifdef PROC_STATISTICS
hostdata->pio_cnt++;
#endif
transfer_pio(regs, (uchar *) cmd->SCp.ptr,
cmd->SCp.this_residual, data_in_dir, hostdata);
length = cmd->SCp.this_residual;
cmd->SCp.this_residual = read_wd33c93_count(regs);
cmd->SCp.ptr += (length - cmd->SCp.this_residual);
}
/* We are able to do DMA (in fact, the Amiga hardware is
* already going!), so start up the wd33c93 in DMA mode.
* We set 'hostdata->dma' = D_DMA_RUNNING so that when the
* transfer completes and causes an interrupt, we're
* reminded to tell the Amiga to shut down its end. We'll
* postpone the updating of 'this_residual' and 'ptr'
* until then.
*/
else {
#ifdef PROC_STATISTICS
hostdata->dma_cnt++;
#endif
write_wd33c93(regs, WD_CONTROL, CTRL_IDI | CTRL_EDI | hostdata->dma_mode);
write_wd33c93_count(regs, cmd->SCp.this_residual);
if ((hostdata->level2 >= L2_DATA) ||
(hostdata->level2 == L2_BASIC && cmd->SCp.phase == 0)) {
write_wd33c93(regs, WD_COMMAND_PHASE, 0x45);
write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
hostdata->state = S_RUNNING_LEVEL2;
} else
write_wd33c93_cmd(regs, WD_CMD_TRANS_INFO);
hostdata->dma = D_DMA_RUNNING;
}
}
void
wd33c93_intr(struct Scsi_Host *instance)
{
struct WD33C93_hostdata *hostdata =
(struct WD33C93_hostdata *) instance->hostdata;
const wd33c93_regs regs = hostdata->regs;
struct scsi_cmnd *patch, *cmd;
uchar asr, sr, phs, id, lun, *ucp, msg;
unsigned long length, flags;
asr = read_aux_stat(regs);
if (!(asr & ASR_INT) || (asr & ASR_BSY))
return;
spin_lock_irqsave(&hostdata->lock, flags);
#ifdef PROC_STATISTICS
hostdata->int_cnt++;
#endif
cmd = (struct scsi_cmnd *) hostdata->connected; /* assume we're connected */
sr = read_wd33c93(regs, WD_SCSI_STATUS); /* clear the interrupt */
phs = read_wd33c93(regs, WD_COMMAND_PHASE);
DB(DB_INTR, printk("{%02x:%02x-", asr, sr))
/* After starting a DMA transfer, the next interrupt
* is guaranteed to be in response to completion of
* the transfer. Since the Amiga DMA hardware runs in
* in an open-ended fashion, it needs to be told when
* to stop; do that here if D_DMA_RUNNING is true.
* Also, we have to update 'this_residual' and 'ptr'
* based on the contents of the TRANSFER_COUNT register,
* in case the device decided to do an intermediate
* disconnect (a device may do this if it has to do a
* seek, or just to be nice and let other devices have
* some bus time during long transfers). After doing
* whatever is needed, we go on and service the WD3393
* interrupt normally.
*/
if (hostdata->dma == D_DMA_RUNNING) {
DB(DB_TRANSFER,
printk("[%p/%d:", cmd->SCp.ptr, cmd->SCp.this_residual))
hostdata->dma_stop(cmd->device->host, cmd, 1);
hostdata->dma = D_DMA_OFF;
length = cmd->SCp.this_residual;
cmd->SCp.this_residual = read_wd33c93_count(regs);
cmd->SCp.ptr += (length - cmd->SCp.this_residual);
DB(DB_TRANSFER,
printk("%p/%d]", cmd->SCp.ptr, cmd->SCp.this_residual))
}
/* Respond to the specific WD3393 interrupt - there are quite a few! */
switch (sr) {
case CSR_TIMEOUT:
DB(DB_INTR, printk("TIMEOUT"))
if (hostdata->state == S_RUNNING_LEVEL2)
hostdata->connected = NULL;
else {
cmd = (struct scsi_cmnd *) hostdata->selecting; /* get a valid cmd */
hostdata->selecting = NULL;
}
cmd->result = DID_NO_CONNECT << 16;
hostdata->busy[cmd->device->id] &= ~(1 << cmd->device->lun);
hostdata->state = S_UNCONNECTED;
cmd->scsi_done(cmd);
/* From esp.c:
* There is a window of time within the scsi_done() path
* of execution where interrupts are turned back on full
* blast and left that way. During that time we could
* reconnect to a disconnected command, then we'd bomb
* out below. We could also end up executing two commands
* at _once_. ...just so you know why the restore_flags()
* is here...
*/
spin_unlock_irqrestore(&hostdata->lock, flags);
/* We are not connected to a target - check to see if there
* are commands waiting to be executed.
*/
wd33c93_execute(instance);
break;
/* Note: this interrupt should not occur in a LEVEL2 command */
case CSR_SELECT:
DB(DB_INTR, printk("SELECT"))
hostdata->connected = cmd =
(struct scsi_cmnd *) hostdata->selecting;
hostdata->selecting = NULL;
/* construct an IDENTIFY message with correct disconnect bit */
hostdata->outgoing_msg[0] = (0x80 | 0x00 | cmd->device->lun);
if (cmd->SCp.phase)
hostdata->outgoing_msg[0] |= 0x40;
if (hostdata->sync_stat[cmd->device->id] == SS_FIRST) {
hostdata->sync_stat[cmd->device->id] = SS_WAITING;
/* Tack on a 2nd message to ask about synchronous transfers. If we've
* been asked to do only asynchronous transfers on this device, we
* request a fifo depth of 0, which is equivalent to async - should
* solve the problems some people have had with GVP's Guru ROM.
*/
hostdata->outgoing_msg[1] = EXTENDED_MESSAGE;
hostdata->outgoing_msg[2] = 3;
hostdata->outgoing_msg[3] = EXTENDED_SDTR;
if (hostdata->no_sync & (1 << cmd->device->id)) {
calc_sync_msg(hostdata->default_sx_per, 0,
0, hostdata->outgoing_msg + 4);
} else {
calc_sync_msg(optimum_sx_per(hostdata),
OPTIMUM_SX_OFF,
hostdata->fast,
hostdata->outgoing_msg + 4);
}
hostdata->outgoing_len = 6;
#ifdef SYNC_DEBUG
ucp = hostdata->outgoing_msg + 1;
printk(" sending SDTR %02x03%02x%02x%02x ",
ucp[0], ucp[2], ucp[3], ucp[4]);
#endif
} else
hostdata->outgoing_len = 1;
hostdata->state = S_CONNECTED;
spin_unlock_irqrestore(&hostdata->lock, flags);
break;
case CSR_XFER_DONE | PHS_DATA_IN:
case CSR_UNEXP | PHS_DATA_IN:
case CSR_SRV_REQ | PHS_DATA_IN:
DB(DB_INTR,
printk("IN-%d.%d", cmd->SCp.this_residual,
cmd->SCp.buffers_residual))
transfer_bytes(regs, cmd, DATA_IN_DIR);
if (hostdata->state != S_RUNNING_LEVEL2)
hostdata->state = S_CONNECTED;
spin_unlock_irqrestore(&hostdata->lock, flags);
break;
case CSR_XFER_DONE | PHS_DATA_OUT:
case CSR_UNEXP | PHS_DATA_OUT:
case CSR_SRV_REQ | PHS_DATA_OUT:
DB(DB_INTR,
printk("OUT-%d.%d", cmd->SCp.this_residual,
cmd->SCp.buffers_residual))
transfer_bytes(regs, cmd, DATA_OUT_DIR);
if (hostdata->state != S_RUNNING_LEVEL2)
hostdata->state = S_CONNECTED;
spin_unlock_irqrestore(&hostdata->lock, flags);
break;
/* Note: this interrupt should not occur in a LEVEL2 command */
case CSR_XFER_DONE | PHS_COMMAND:
case CSR_UNEXP | PHS_COMMAND:
case CSR_SRV_REQ | PHS_COMMAND:
DB(DB_INTR, printk("CMND-%02x,%ld", cmd->cmnd[0], cmd->serial_number))
transfer_pio(regs, cmd->cmnd, cmd->cmd_len, DATA_OUT_DIR,
hostdata);
hostdata->state = S_CONNECTED;
spin_unlock_irqrestore(&hostdata->lock, flags);
break;
case CSR_XFER_DONE | PHS_STATUS:
case CSR_UNEXP | PHS_STATUS:
case CSR_SRV_REQ | PHS_STATUS:
DB(DB_INTR, printk("STATUS="))
cmd->SCp.Status = read_1_byte(regs);
DB(DB_INTR, printk("%02x", cmd->SCp.Status))
if (hostdata->level2 >= L2_BASIC) {
sr = read_wd33c93(regs, WD_SCSI_STATUS); /* clear interrupt */
udelay(7);
hostdata->state = S_RUNNING_LEVEL2;
write_wd33c93(regs, WD_COMMAND_PHASE, 0x50);
write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
} else {
hostdata->state = S_CONNECTED;
}
spin_unlock_irqrestore(&hostdata->lock, flags);
break;
case CSR_XFER_DONE | PHS_MESS_IN:
case CSR_UNEXP | PHS_MESS_IN:
case CSR_SRV_REQ | PHS_MESS_IN:
DB(DB_INTR, printk("MSG_IN="))
msg = read_1_byte(regs);
sr = read_wd33c93(regs, WD_SCSI_STATUS); /* clear interrupt */
udelay(7);
hostdata->incoming_msg[hostdata->incoming_ptr] = msg;