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BUILD.bazel
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# Copyright 2020 Google LLC
#
# This source code is licensed under the BSD-style license found in the
# LICENSE file in the root directory of this source tree.
#
# Description:
# XNNPACK - optimized floating-point neural network operators library
load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
licenses(["notice"])
exports_files(["LICENSE"])
OPERATOR_BENCHMARK_DEPS = [
":XNNPACK",
":bench_utils",
"@cpuinfo",
"@FP16",
"@pthreadpool",
]
MICROKERNEL_BENCHMARK_DEPS = [
":ukernels",
":bench_utils",
":enable_assembly",
"@cpuinfo",
"@FP16",
"@pthreadpool",
]
ACCURACY_EVAL_DEPS = [
":XNNPACK",
":ukernels",
"@FP16",
"@pthreadpool",
]
MICROKERNEL_TEST_DEPS = [
":ukernels_test_mode",
":enable_assembly",
"@cpuinfo",
"@FP16",
"@pthreadpool",
]
OPERATOR_TEST_DEPS = [
":XNNPACK_test_mode",
"@pthreadpool",
"@FP16",
]
OPERATOR_SRCS = [
"src/operators/argmax-pooling-nhwc.c",
"src/operators/average-pooling-nhwc.c",
"src/operators/binary-elementwise-nd.c",
"src/operators/channel-shuffle-nc.c",
"src/operators/constant-pad-nd.c",
"src/operators/convolution-nchw.c",
"src/operators/convolution-nhwc.c",
"src/operators/deconvolution-nhwc.c",
"src/operators/depth-to-space-nchw2nhwc.c",
"src/operators/depth-to-space-nhwc.c",
"src/operators/fully-connected-nc.c",
"src/operators/global-average-pooling-ncw.c",
"src/operators/global-average-pooling-nwc.c",
"src/operators/leaky-relu-nc.c",
"src/operators/max-pooling-nhwc.c",
"src/operators/prelu-nc.c",
"src/operators/resize-bilinear-nchw.c",
"src/operators/resize-bilinear-nhwc.c",
"src/operators/sigmoid-nc.c",
"src/operators/softmax-nc.c",
"src/operators/unary-elementwise-nc.c",
"src/operators/unpooling-nhwc.c",
]
SUBGRAPH_SRCS = [
"src/subgraph/abs.c",
"src/subgraph/add2.c",
"src/subgraph/argmax-pooling-2d.c",
"src/subgraph/average-pooling-2d.c",
"src/subgraph/bankers-rounding.c",
"src/subgraph/ceiling.c",
"src/subgraph/clamp.c",
"src/subgraph/convolution-2d.c",
"src/subgraph/deconvolution-2d.c",
"src/subgraph/depth-to-space.c",
"src/subgraph/depthwise-convolution-2d.c",
"src/subgraph/divide.c",
"src/subgraph/elu.c",
"src/subgraph/floor.c",
"src/subgraph/fully-connected.c",
"src/subgraph/global-average-pooling-2d.c",
"src/subgraph/hardswish.c",
"src/subgraph/leaky-relu.c",
"src/subgraph/max-pooling-2d.c",
"src/subgraph/maximum2.c",
"src/subgraph/minimum2.c",
"src/subgraph/multiply2.c",
"src/subgraph/negate.c",
"src/subgraph/prelu.c",
"src/subgraph/sigmoid.c",
"src/subgraph/softmax.c",
"src/subgraph/square-root.c",
"src/subgraph/square.c",
"src/subgraph/squared-difference.c",
"src/subgraph/static-constant-pad.c",
"src/subgraph/static-reshape.c",
"src/subgraph/static-resize-bilinear-2d.c",
"src/subgraph/subtract.c",
"src/subgraph/unpooling-2d.c",
]
TABLE_SRCS = [
"src/tables/exp2-k-over-64.c",
"src/tables/exp2-k-over-2048.c",
"src/tables/exp2minus-k-over-4.c",
"src/tables/exp2minus-k-over-8.c",
"src/tables/exp2minus-k-over-16.c",
"src/tables/exp2minus-k-over-64.c",
"src/tables/exp2minus-k-over-2048.c",
]
SCALAR_UKERNELS = [
"src/f32-argmaxpool/4x-scalar-c1.c",
"src/f32-argmaxpool/9p8x-scalar-c1.c",
"src/f32-argmaxpool/9x-scalar-c1.c",
"src/f32-avgpool/9p8x-minmax-scalar-c1.c",
"src/f32-avgpool/9x-minmax-scalar-c1.c",
"src/f32-clamp/gen/scalar-x1.c",
"src/f32-clamp/gen/scalar-x2.c",
"src/f32-clamp/gen/scalar-x4.c",
"src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
"src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
"src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
"src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
"src/f32-dwconv/gen/up1x4-minmax-scalar.c",
"src/f32-dwconv/gen/up1x4-scalar-acc2.c",
"src/f32-dwconv/gen/up1x4-scalar.c",
"src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
"src/f32-dwconv/gen/up1x9-minmax-scalar.c",
"src/f32-dwconv/gen/up1x9-scalar-acc2.c",
"src/f32-dwconv/gen/up1x9-scalar.c",
"src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
"src/f32-dwconv/gen/up1x25-minmax-scalar.c",
"src/f32-dwconv/gen/up1x25-scalar-acc2.c",
"src/f32-dwconv/gen/up1x25-scalar.c",
"src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
"src/f32-dwconv/gen/up2x4-minmax-scalar.c",
"src/f32-dwconv/gen/up2x4-scalar-acc2.c",
"src/f32-dwconv/gen/up2x4-scalar.c",
"src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
"src/f32-dwconv/gen/up2x9-minmax-scalar.c",
"src/f32-dwconv/gen/up2x9-scalar-acc2.c",
"src/f32-dwconv/gen/up2x9-scalar.c",
"src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
"src/f32-dwconv/gen/up2x25-minmax-scalar.c",
"src/f32-dwconv/gen/up2x25-scalar-acc2.c",
"src/f32-dwconv/gen/up2x25-scalar.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
"src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
"src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
"src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
"src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
"src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
"src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
"src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
"src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
"src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
"src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
"src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
"src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
"src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
"src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
"src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
"src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
"src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
"src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
"src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
"src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
"src/f32-gavgpool-cw/scalar-x1.c",
"src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
"src/f32-gavgpool/7x-minmax-scalar-c1.c",
"src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
"src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
"src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
"src/f32-gemm/gen/1x4-minmax-scalar.c",
"src/f32-gemm/gen/1x4-relu-scalar.c",
"src/f32-gemm/gen/1x4-scalar.c",
"src/f32-gemm/gen/2x4-minmax-scalar.c",
"src/f32-gemm/gen/2x4-relu-scalar.c",
"src/f32-gemm/gen/2x4-scalar.c",
"src/f32-gemm/gen/4x2-minmax-scalar.c",
"src/f32-gemm/gen/4x2-relu-scalar.c",
"src/f32-gemm/gen/4x2-scalar.c",
"src/f32-gemm/gen/4x4-minmax-scalar.c",
"src/f32-gemm/gen/4x4-relu-scalar.c",
"src/f32-gemm/gen/4x4-scalar.c",
"src/f32-hswish/gen/hswish-scalar-x1.c",
"src/f32-hswish/gen/hswish-scalar-x2.c",
"src/f32-hswish/gen/hswish-scalar-x4.c",
"src/f32-ibilinear-chw/gen/scalar-p1.c",
"src/f32-ibilinear-chw/gen/scalar-p2.c",
"src/f32-ibilinear-chw/gen/scalar-p4.c",
"src/f32-ibilinear/gen/scalar-c1.c",
"src/f32-ibilinear/gen/scalar-c2.c",
"src/f32-ibilinear/gen/scalar-c4.c",
"src/f32-igemm/gen/1x4-minmax-scalar.c",
"src/f32-igemm/gen/1x4-relu-scalar.c",
"src/f32-igemm/gen/1x4-scalar.c",
"src/f32-igemm/gen/2x4-minmax-scalar.c",
"src/f32-igemm/gen/2x4-relu-scalar.c",
"src/f32-igemm/gen/2x4-scalar.c",
"src/f32-igemm/gen/4x2-minmax-scalar.c",
"src/f32-igemm/gen/4x2-relu-scalar.c",
"src/f32-igemm/gen/4x2-scalar.c",
"src/f32-igemm/gen/4x4-minmax-scalar.c",
"src/f32-igemm/gen/4x4-relu-scalar.c",
"src/f32-igemm/gen/4x4-scalar.c",
"src/f32-maxpool/9p8x-minmax-scalar-c1.c",
"src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
"src/f32-pavgpool/9x-minmax-scalar-c1.c",
"src/f32-ppmm/gen/2x4-minmax-scalar.c",
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"src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
"src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
"src/f32-gemm/gen/1x4-minmax-wasm.c",
"src/f32-gemm/gen/1x4-relu-wasm.c",
"src/f32-gemm/gen/1x4-wasm.c",
"src/f32-gemm/gen/2x4-minmax-wasm.c",
"src/f32-gemm/gen/2x4-relu-wasm.c",
"src/f32-gemm/gen/2x4-wasm.c",
"src/f32-gemm/gen/4x2-minmax-wasm.c",
"src/f32-gemm/gen/4x2-relu-wasm.c",
"src/f32-gemm/gen/4x2-wasm.c",
"src/f32-gemm/gen/4x4-minmax-wasm.c",
"src/f32-gemm/gen/4x4-relu-wasm.c",
"src/f32-gemm/gen/4x4-wasm.c",
"src/f32-hswish/gen/hswish-wasm-x1.c",
"src/f32-hswish/gen/hswish-wasm-x2.c",
"src/f32-hswish/gen/hswish-wasm-x4.c",
"src/f32-igemm/gen/1x4-minmax-wasm.c",
"src/f32-igemm/gen/1x4-relu-wasm.c",
"src/f32-igemm/gen/1x4-wasm.c",
"src/f32-igemm/gen/2x4-minmax-wasm.c",
"src/f32-igemm/gen/2x4-relu-wasm.c",
"src/f32-igemm/gen/2x4-wasm.c",
"src/f32-igemm/gen/4x2-minmax-wasm.c",
"src/f32-igemm/gen/4x2-relu-wasm.c",
"src/f32-igemm/gen/4x2-wasm.c",
"src/f32-igemm/gen/4x4-minmax-wasm.c",
"src/f32-igemm/gen/4x4-relu-wasm.c",
"src/f32-igemm/gen/4x4-wasm.c",
"src/f32-maxpool/9p8x-minmax-wasm-c1.c",
"src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
"src/f32-pavgpool/9x-minmax-wasm-c1.c",
"src/f32-prelu/gen/wasm-2x1.c",
"src/f32-prelu/gen/wasm-2x4.c",
"src/f32-relu/gen/wasm-x1.c",
"src/f32-relu/gen/wasm-x2.c",
"src/f32-relu/gen/wasm-x4.c",
"src/f32-relu/gen/wasm-x8.c",
"src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
"src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
"src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
"src/f32-vbinary/gen/vadd-minmax-wasm-x8.c",
"src/f32-vbinary/gen/vadd-relu-wasm-x1.c",
"src/f32-vbinary/gen/vadd-relu-wasm-x2.c",
"src/f32-vbinary/gen/vadd-relu-wasm-x4.c",
"src/f32-vbinary/gen/vadd-relu-wasm-x8.c",
"src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
"src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
"src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
"src/f32-vbinary/gen/vaddc-minmax-wasm-x8.c",
"src/f32-vbinary/gen/vaddc-relu-wasm-x1.c",
"src/f32-vbinary/gen/vaddc-relu-wasm-x2.c",
"src/f32-vbinary/gen/vaddc-relu-wasm-x4.c",
"src/f32-vbinary/gen/vaddc-relu-wasm-x8.c",
"src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
"src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
"src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
"src/f32-vbinary/gen/vdiv-minmax-wasm-x8.c",
"src/f32-vbinary/gen/vdiv-relu-wasm-x1.c",
"src/f32-vbinary/gen/vdiv-relu-wasm-x2.c",
"src/f32-vbinary/gen/vdiv-relu-wasm-x4.c",
"src/f32-vbinary/gen/vdiv-relu-wasm-x8.c",
"src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
"src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
"src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
"src/f32-vbinary/gen/vdivc-minmax-wasm-x8.c",
"src/f32-vbinary/gen/vdivc-relu-wasm-x1.c",
"src/f32-vbinary/gen/vdivc-relu-wasm-x2.c",
"src/f32-vbinary/gen/vdivc-relu-wasm-x4.c",
"src/f32-vbinary/gen/vdivc-relu-wasm-x8.c",
"src/f32-vbinary/gen/vmax-wasm-x1.c",
"src/f32-vbinary/gen/vmax-wasm-x2.c",
"src/f32-vbinary/gen/vmax-wasm-x4.c",
"src/f32-vbinary/gen/vmax-wasm-x8.c",
"src/f32-vbinary/gen/vmaxc-wasm-x1.c",
"src/f32-vbinary/gen/vmaxc-wasm-x2.c",
"src/f32-vbinary/gen/vmaxc-wasm-x4.c",
"src/f32-vbinary/gen/vmaxc-wasm-x8.c",
"src/f32-vbinary/gen/vmin-wasm-x1.c",
"src/f32-vbinary/gen/vmin-wasm-x2.c",
"src/f32-vbinary/gen/vmin-wasm-x4.c",
"src/f32-vbinary/gen/vmin-wasm-x8.c",
"src/f32-vbinary/gen/vminc-wasm-x1.c",
"src/f32-vbinary/gen/vminc-wasm-x2.c",
"src/f32-vbinary/gen/vminc-wasm-x4.c",
"src/f32-vbinary/gen/vminc-wasm-x8.c",
"src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
"src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
"src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
"src/f32-vbinary/gen/vmul-minmax-wasm-x8.c",
"src/f32-vbinary/gen/vmul-relu-wasm-x1.c",
"src/f32-vbinary/gen/vmul-relu-wasm-x2.c",
"src/f32-vbinary/gen/vmul-relu-wasm-x4.c",
"src/f32-vbinary/gen/vmul-relu-wasm-x8.c",
"src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
"src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
"src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
"src/f32-vbinary/gen/vmulc-minmax-wasm-x8.c",
"src/f32-vbinary/gen/vmulc-relu-wasm-x1.c",
"src/f32-vbinary/gen/vmulc-relu-wasm-x2.c",
"src/f32-vbinary/gen/vmulc-relu-wasm-x4.c",
"src/f32-vbinary/gen/vmulc-relu-wasm-x8.c",
"src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
"src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
"src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
"src/f32-vbinary/gen/vrdivc-minmax-wasm-x8.c",
"src/f32-vbinary/gen/vrdivc-relu-wasm-x1.c",
"src/f32-vbinary/gen/vrdivc-relu-wasm-x2.c",
"src/f32-vbinary/gen/vrdivc-relu-wasm-x4.c",
"src/f32-vbinary/gen/vrdivc-relu-wasm-x8.c",
"src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
"src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
"src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
"src/f32-vbinary/gen/vrsubc-minmax-wasm-x8.c",
"src/f32-vbinary/gen/vrsubc-relu-wasm-x1.c",
"src/f32-vbinary/gen/vrsubc-relu-wasm-x2.c",
"src/f32-vbinary/gen/vrsubc-relu-wasm-x4.c",
"src/f32-vbinary/gen/vrsubc-relu-wasm-x8.c",
"src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
"src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
"src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
"src/f32-vbinary/gen/vsub-minmax-wasm-x8.c",
"src/f32-vbinary/gen/vsub-relu-wasm-x1.c",
"src/f32-vbinary/gen/vsub-relu-wasm-x2.c",
"src/f32-vbinary/gen/vsub-relu-wasm-x4.c",
"src/f32-vbinary/gen/vsub-relu-wasm-x8.c",
"src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
"src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
"src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
"src/f32-vbinary/gen/vsubc-minmax-wasm-x8.c",
"src/f32-vbinary/gen/vsubc-relu-wasm-x1.c",
"src/f32-vbinary/gen/vsubc-relu-wasm-x2.c",
"src/f32-vbinary/gen/vsubc-relu-wasm-x4.c",
"src/f32-vbinary/gen/vsubc-relu-wasm-x8.c",
"src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x1.c",
"src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x2.c",
"src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x3.c",
"src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x4.c",
"src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x5.c",
"src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x6.c",
"src/f32-velu/gen/velu-wasm-rr2-p6-x1.c",
"src/f32-velu/gen/velu-wasm-rr2-p6-x2.c",
"src/f32-velu/gen/velu-wasm-rr2-p6-x3.c",
"src/f32-velu/gen/velu-wasm-rr2-p6-x4.c",
"src/f32-velu/gen/velu-wasm-rr2-p6-x5.c",
"src/f32-velu/gen/velu-wasm-rr2-p6-x6.c",
"src/f32-vlrelu/gen/vlrelu-wasm-x1.c",
"src/f32-vlrelu/gen/vlrelu-wasm-x2.c",
"src/f32-vlrelu/gen/vlrelu-wasm-x4.c",
"src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
"src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
"src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
]
WASMSIMD_UKERNELS = [
"src/f32-argmaxpool/4x-wasmsimd-c4.c",
"src/f32-argmaxpool/9p8x-wasmsimd-c4.c",
"src/f32-argmaxpool/9x-wasmsimd-c4.c",
"src/f32-avgpool/9p8x-minmax-wasmsimd-arm-c4.c",
"src/f32-avgpool/9p8x-minmax-wasmsimd-x86-c4.c",
"src/f32-avgpool/9x-minmax-wasmsimd-arm-c4.c",
"src/f32-avgpool/9x-minmax-wasmsimd-x86-c4.c",
"src/f32-clamp/gen/wasmsimd-arm-x4.c",
"src/f32-clamp/gen/wasmsimd-arm-x8.c",
"src/f32-clamp/gen/wasmsimd-x86-x4.c",
"src/f32-clamp/gen/wasmsimd-x86-x8.c",
"src/f32-conv-hwc2chw/3x3s2p1c3x4-wasmsimd-2x2.c",
"src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm-acc2.c",
"src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
"src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86-acc2.c",
"src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
"src/f32-dwconv/gen/up4x4-wasmsimd.c",
"src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm-acc2.c",
"src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
"src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86-acc2.c",
"src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
"src/f32-dwconv/gen/up4x9-wasmsimd.c",
"src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm-acc2.c",
"src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
"src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86-acc2.c",
"src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
"src/f32-dwconv/gen/up4x25-wasmsimd.c",
"src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm-acc2.c",
"src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
"src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86-acc2.c",
"src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
"src/f32-dwconv/gen/up8x4-wasmsimd.c",
"src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm-acc2.c",
"src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
"src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86-acc2.c",
"src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
"src/f32-dwconv/gen/up8x9-wasmsimd.c",
"src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm-acc2.c",
"src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
"src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86-acc2.c",
"src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
"src/f32-dwconv/gen/up8x25-wasmsimd.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-5x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-6x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-3x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-4x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-5x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-6x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-5x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-6x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-3x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-4x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-5x4.c",
"src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-6x4.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-3x4.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-4x4.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
"src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
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