Bugs when setting DAC5687 registers

[markasoftware]

Took a look at the datasheet today.

hs2-dds-host/src/dac5687.c

Lines 63 to 64 in 56d4b1b

	(settings->config_0.pll_kv << 5) | (settings->config_0.fir_interp << 3) |
	(settings->config_0.inv_pll_lock << 2) | (settings->config_0.fifo_bypass);

Wrong bitshifts for interp and pll_lock, should be 2 and 1 respectively.

hs2-dds-host/src/dac5687.c

Lines 85 to 86 in 56d4b1b

	txBuf[17] = (settings->dac_a_off & 0xF00) >> 8;
	txBuf[18] = (settings->dac_b_off & 0xF00) >> 8;

Bitshift should be by 4, not 8.

hs2-dds-host/src/dac5687.c

Lines 90 to 91 in 56d4b1b

	txBuf[22] = ((settings->qmc_phase & 0x300) >> 2) | ((settings->qmc_a_gain & 0x500) >> 5) |
	((settings->qmc_b_gain & 0x500) >> 8);

Should be 0x700 instead of 0x500, because 0x500=0b101.

hs2-dds-host/src/dac5687.c

Line 94 in 56d4b1b

txBuf[25] = ((settings->dac_a_gain & 0x800) >> 4) | ((settings->dac_b_gain & 0x800) >> 8);

Should be 0xF00 instead of 0x800, because 0x800=0b1000 0000 0000.

hs2-dds-host/src/dac5687.c

Line 95 in 56d4b1b

txBuf[27] = ((settings->atest & 0x8) << 4) | (settings->phstr_del & 0x2);

Should be 0xF, not 0x8, and 0x3 instead of 0x2, and phstr_del needs to be bitshifted left by 1.