-
Notifications
You must be signed in to change notification settings - Fork 0
/
sm.S
411 lines (371 loc) · 8.24 KB
/
sm.S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
/*
* Copyright (C) 2022 (Unix69@github)
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*/
.arch armv8-a
.file "start.S"
.section ".text.sm"
.data
.align 2
BOOTDIV: .asciz "--------------------------------------------------------------------\n"
BOOTMODEHEADER: .asciz "Secure Monitor Bootmode "
BOOTHEADER: .asciz "Secure Monitor Boot\n"
EVTEL3HEADER: .asciz "Vector Table EL3 Base Address "
SCTLREL3HEADER: .asciz "System Control Register EL3 "
SPSREL3HEADER: .asciz "Saved Program Status Register EL3 "
CURELHEADER: .asciz "Current EL "
CPUNHEADER: .asciz "CPU number "
NL: .asciz "\n"
CR: .asciz "\r"
TB: .asciz "\t"
.text
.global sm_boot
sm_boot:
LDR X0, [SP], #8
STP X29, X30, [SP, #-16]!
MOV X20, X0
//BOOT DIV
MOV X0, #0
LDR X0, =BOOTDIV
BL uart_puts
//BOOT HEADER
MOV X0, #0
LDR X0, =BOOTHEADER
BL uart_puts
//print saved BOOTMODE
MOV X0, #0
LDR X0, =BOOTMODEHEADER
BL uart_puts
MOV X0, #0
MOV X0, x20
BL uart_hex_uint64
//print newline
MOV X0, #0
LDR X0, =NL
BL uart_puts
//print CURRENTEL
MOV X0, #0
LDR X0, =CURELHEADER
BL uart_puts
MOV X0, #0
MRS X0, CURRENTEL
AND X0, X0, #12
LSR X0, X0, #2
BL uart_hex_uint64
//print newline
MOV X0, #0
LDR X0, =NL
BL uart_puts
//print nCPU
MOV X0, #0
LDR X0, =CPUNHEADER
BL uart_puts
MOV X0, #0
MRS X0, MPIDR_EL1
AND X0, X0, #3
BL uart_hex_uint64
//print newline
MOV X0, #0
LDR X0, =NL
BL uart_puts
//set up VECTOR BASE ADDRESS REGISTER EL2 to =vector_table_el2
LDR x2, =vector_table_el3
MSR VBAR_EL3, x2
//print VECTOR BASE ADDRESS REGISTER EL2
MOV X0, #0
LDR X0, =EVTEL3HEADER
BL uart_puts
MOV X0, #0
MRS X0, VBAR_EL3
BL uart_hex_uint64
//print newline
MOV X0, #0
LDR X0, =NL
BL uart_puts
//set STATUS REGISTER EL3
MOV x2, #0x780
MSR SCR_EL3, x2
//print STATUS REGISTER EL3
MOV X0, #0
LDR X0, =SCTLREL3HEADER
BL uart_puts
MOV X0, #0
MRS X0, SCR_EL3
BL uart_hex_uint64
//print newline
MOV X0, #0
LDR X0, =NL
BL uart_puts
//set up SAVED PROGRAM STATUS REGISTER EL3
MOV X0, #0x3c9
MSR SPSR_EL3, X0
//print SAVED PROGRAM STATUS REGISTER EL3
MOV X0, #0
LDR X0, =SPSREL3HEADER
BL uart_puts
MOV X0, #0
MRS X0, SPSR_EL3
BL uart_hex_uint64
LDP X29, X30, [SP], #16
RET
//Exception Vector Table EL2
.balign 0x800
vector_table_el3:
curr_el3_sp0_sync:
// The exception handler for the synchronous
// exception from the current EL using SP0.
//print nExcp = 0
MOV X0, #0
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET
.balign 0x80
curr_el3_sp0_irq:
// The exception handler for the IRQ exception
// from the current EL using SP0.
//print nExcp = 1
MOV X0, #1
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET
.balign 0x80
curr_EL3_sp0_fiq:
// The exception handler for the FIQ exception
// from the current EL using SP0.
//print nExcp = 2
MOV X0, #2
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET
.balign 0x80
curr_EL3_sp0_serror:
// The exception handler for the system error
// exception from the current EL using SP0.
//print nExcp = 3
MOV X0, #3
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET
.balign 0x80
curr_EL3_spx_sync:
// The exception handler for the synchronous
// exception from the current EL using the
// current SP.
//print nExcp = 4
MOV X0, #4
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET
.balign 0x80
curr_EL3_spx_irq:
// The exception handler for IRQ exception
// from the current EL using the current SP.
//print nExcp = 5
MOV X0, #5
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET
.balign 0x80
curr_EL3_spx_fiq:
// The exception handler for the FIQ exception
// from the current EL using the current SP.
//print nExcp = 6
MOV X0, #6
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET
.balign 0x80
curr_EL3_spx_serror:
// The exception handler for the system error
// exception from the current EL using the
// current SP.
//print nExcp = 7
MOV X0, #7
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET
.balign 0x80
lower_EL3_aarch64_sync:
// The exception handler for the synchronous
// exception from a lower EL (AArch64).
MOV X0, #8
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET
.balign 0x80
lower_EL3_aarch64_irq:
// The exception handler for the IRQ exception
// from a lower EL (AArch64).
//print nExcp = 9
MOV X0, #9
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET
.balign 0x80
lower_EL3_aarch64_fiq:
// The exception handler for the FIQ exception
// from a lower EL (AArch64).
//print nExcp = 10
MOV X0, #10
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET
.balign 0x80
lower_EL3_aarch64_serror: // The exception handler for the system error
// exception from a lower EL(AArch64).
//print nExcp = 11
MOV X0, #11
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET
.balign 0x80
lower_EL3_aarch32_sync:
// The exception handler for the synchronous
// exception from a lower EL(AArch32).
//print nExcp = 12
MOV X0, #12
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET
.balign 0x80
lower_EL3_aarch32_irq:
// The exception handler for the IRQ exception
// from a lower EL (AArch32).
//print nExcp = 13
MOV X0, #13
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET
.balign 0x80
lower_EL3_aarch32_fiq:
// The exception handler for the FIQ exception
// from a lower EL (AArch32).
//print nExcp = 14
MOV X0, #14
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET
.balign 0x80
lower_EL3_aarch32_serror: // The exception handler for the system error
// exception from a lower EL(AArch32).
//print nExcp = 15
MOV X0, #15
MRS x1, ESR_EL3
MRS x2, ELR_EL3
MRS x3, SPSR_EL3
MRS x4, FAR_EL3
MRS x5, CURRENTEL
AND x5, x5, #12
LSR x5, x5, #2
BL exception_handler
ERET