-
Notifications
You must be signed in to change notification settings - Fork 27
/
arm64test.py
executable file
·2957 lines (2892 loc) · 224 KB
/
arm64test.py
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
#!/usr/bin/env python3
import os
import re
import sys
import pathlib
import binaryninja
from binaryninja import binaryview
from binaryninja import lowlevelil
from binaryninja.enums import LowLevelILOperation, ILInstructionAttribute
path_here = pathlib.Path(__file__).parent.absolute()
path_il_h = os.path.join(path_here, 'il.h')
ATTR_PTR_AUTH = ILInstructionAttribute(8) # enum BNILInstructionAttribute.SrcInstructionUsesPointerAuth from api/binaryninjacore.h
tests_udf = [
# udf #0
(b'\x00\x00\x00\x00', 'LLIL_TRAP(0)'),
# udf #1
(b'\x01\x00\x00\x00', 'LLIL_TRAP(1)'),
]
# These instructions potentially use PAC, but we always lift them as if PAC is disabled.
tests_pac = [
# BRANCHES
# blr x12 (example of encoding: BLR_64_branch_reg)
(b'\x80\x01\x3F\xD6', 'LLIL_CALL(LLIL_REG.q(x12))'),
# blraaz x7 (example of encoding: BLRAAZ_64_branch_reg)
(b'\xFF\x08\x3F\xD6', 'LLIL_CALL(LLIL_REG.q(x7))', ATTR_PTR_AUTH),
# blraa xzr, sp (example of encoding: BLRAA_64P_branch_reg)
(b'\xFF\x0B\x3F\xD7', 'LLIL_CALL(LLIL_CONST.q(0x0))', ATTR_PTR_AUTH),
# blrabz x13 (example of encoding: BLRABZ_64_branch_reg)
(b'\xBF\x0D\x3F\xD6', 'LLIL_CALL(LLIL_REG.q(x13))', ATTR_PTR_AUTH),
# blrab x4, sp (example of encoding: BLRAB_64P_branch_reg)
(b'\x9F\x0C\x3F\xD7', 'LLIL_CALL(LLIL_REG.q(x4))', ATTR_PTR_AUTH),
# br x21 (example of encoding: BR_64_branch_reg)
(b'\xA0\x02\x1F\xD6', 'LLIL_JUMP(LLIL_REG.q(x21))'),
# braaz x7 (example of encoding: BRAAZ_64_branch_reg)
(b'\xFF\x08\x1F\xD6', 'LLIL_JUMP(LLIL_REG.q(x7))', ATTR_PTR_AUTH),
# braa x25, x5 (example of encoding: BRAA_64P_branch_reg)
(b'\x25\x0B\x1F\xD7', 'LLIL_JUMP(LLIL_REG.q(x25))', ATTR_PTR_AUTH),
# brabz x6 (example of encoding: BRABZ_64_branch_reg)
(b'\xDF\x0C\x1F\xD6', 'LLIL_JUMP(LLIL_REG.q(x6))', ATTR_PTR_AUTH),
# brab x23, x17 (example of encoding: BRAB_64P_branch_reg)
(b'\xF1\x0E\x1F\xD7', 'LLIL_JUMP(LLIL_REG.q(x23))', ATTR_PTR_AUTH),
# EXCEPTION RETURN
# eret (example of encoding: ERET_64E_branch_reg)
(b'\xE0\x03\x9F\xD6', 'LLIL_INTRINSIC([],_eret,[]); LLIL_TRAP(0)'),
# eretaa (example of encoding: ERETAA_64E_branch_reg)
(b'\xFF\x0B\x9F\xD6', 'LLIL_INTRINSIC([],_eret,[]); LLIL_TRAP(0)'),
# eretab (example of encoding: ERETAB_64E_branch_reg)
(b'\xFF\x0F\x9F\xD6', 'LLIL_INTRINSIC([],_eret,[]); LLIL_TRAP(0)'),
# LOAD REGISTER WITH AUTHENTICATION (key A or B)
# ldraa x7, [x30, #-0x6b0] (example of encoding: LDRAA_64_ldst_pac)
(b'\xC7\xA7\x72\xF8', 'LLIL_SET_REG.q(x7,LLIL_LOAD.q(LLIL_ADD.q(LLIL_REG.q(x30),LLIL_CONST.q(0xFFFFFFFFFFFFF950))))', ATTR_PTR_AUTH),
# ldraa x7, [sp, #-0xf20]! (example of encoding: LDRAA_64W_ldst_pac)
(b'\xE7\xCF\x61\xF8', 'LLIL_SET_REG.q(sp,LLIL_ADD.q(LLIL_REG.q(sp),LLIL_CONST.q(0xFFFFFFFFFFFFF0E0))); LLIL_SET_REG.q(x7,LLIL_LOAD.q(LLIL_REG.q(sp)))', ATTR_PTR_AUTH),
# ldrab x27, [x17, #0x8d0] (example of encoding: LDRAB_64_ldst_pac)
(b'\x3B\xA6\xB1\xF8', 'LLIL_SET_REG.q(x27,LLIL_LOAD.q(LLIL_ADD.q(LLIL_REG.q(x17),LLIL_CONST.q(0x8D0))))', ATTR_PTR_AUTH),
# ldrab x20, [x1, #0xac8]! (example of encoding: LDRAB_64W_ldst_pac)
(b'\x34\x9C\xB5\xF8', 'LLIL_SET_REG.q(x1,LLIL_ADD.q(LLIL_REG.q(x1),LLIL_CONST.q(0xAC8))); LLIL_SET_REG.q(x20,LLIL_LOAD.q(LLIL_REG.q(x1)))', ATTR_PTR_AUTH),
# RETURN
# ret x27 (example of encoding: RET_64R_branch_reg)
(b'\x60\x03\x5F\xD6', 'LLIL_RET(LLIL_REG.q(x27))'),
# RETURN FROM SUBROUTINE, WITH POINTER AUTHENTICATION
# retaa (example of encoding: RETAA_64E_branch_reg)
(b'\xFF\x0B\x5F\xD6', 'LLIL_RET(LLIL_REG.q(x30))', ATTR_PTR_AUTH),
# retab (example of encoding: RETAB_64E_branch_reg)
(b'\xFF\x0F\x5F\xD6', 'LLIL_RET(LLIL_REG.q(x30))', ATTR_PTR_AUTH),
# mixed instructions from old tests
# BLRAA_64P_branch_reg 1101011100111111000010xxxxxxxxxx
(b'\x14\x0B\x3F\xD7', 'LLIL_CALL(LLIL_REG.q(x24))', ATTR_PTR_AUTH), # blraa x24, x20
(b'\xFD\x0A\x3F\xD7', 'LLIL_CALL(LLIL_REG.q(x23))', ATTR_PTR_AUTH), # blraa x23, x29
# BLRAAZ_64_branch_reg 1101011000111111000010xxxxx11111
(b'\xDF\x09\x3F\xD6', 'LLIL_CALL(LLIL_REG.q(x14))', ATTR_PTR_AUTH), # blraaz x14
(b'\xDF\x08\x3F\xD6', 'LLIL_CALL(LLIL_REG.q(x6))', ATTR_PTR_AUTH), # blraaz x6
# BLRAB_64P_branch_reg 1101011100111111000011xxxxxxxxxx
(b'\xBA\x0C\x3F\xD7', 'LLIL_CALL(LLIL_REG.q(x5))', ATTR_PTR_AUTH), # blrab x5, x26
(b'\xC2\x0E\x3F\xD7', 'LLIL_CALL(LLIL_REG.q(x22))', ATTR_PTR_AUTH), # blrab x22, x2
# BLRABZ_64_branch_reg 1101011000111111000011xxxxx11111
(b'\x3F\x0E\x3F\xD6', 'LLIL_CALL(LLIL_REG.q(x17))', ATTR_PTR_AUTH), # blrabz x17
(b'\x3F\x0F\x3F\xD6', 'LLIL_CALL(LLIL_REG.q(x25))', ATTR_PTR_AUTH), # blrabz x25
# BRAAZ_64_branch_reg 1101011000011111000010xxxxx11111
(b'\x5F\x08\x1F\xD6', 'LLIL_JUMP(LLIL_REG.q(x2))', ATTR_PTR_AUTH), # braaz x2
(b'\x5F\x0A\x1F\xD6', 'LLIL_JUMP(LLIL_REG.q(x18))', ATTR_PTR_AUTH), # braaz x18
# BRAA_64P_branch_reg 1101011100011111000010xxxxxxxxxx
(b'\x81\x08\x1F\xD7', 'LLIL_JUMP(LLIL_REG.q(x4))', ATTR_PTR_AUTH), # braa x4, x1
(b'\x4C\x09\x1F\xD7', 'LLIL_JUMP(LLIL_REG.q(x10))', ATTR_PTR_AUTH), # braa x10, x12
# BRABZ_64_branch_reg 1101011000011111000011xxxxx11111
(b'\x3F\x0C\x1F\xD6', 'LLIL_JUMP(LLIL_REG.q(x1))', ATTR_PTR_AUTH), # brabz x1
(b'\xBF\x0E\x1F\xD6', 'LLIL_JUMP(LLIL_REG.q(x21))', ATTR_PTR_AUTH), # brabz x21
# BRAB_64P_branch_reg 1101011100011111000011xxxxxxxxxx
(b'\x39\x0F\x1F\xD7', 'LLIL_JUMP(LLIL_REG.q(x25))', ATTR_PTR_AUTH), # brab x25, x25
(b'\xA3\x0E\x1F\xD7', 'LLIL_JUMP(LLIL_REG.q(x21))', ATTR_PTR_AUTH), # brab x21, x3
# LDRAA_64W_ldst_pac 111110000x1xxxxxxxxxxxxxxxxxxxxx
(b'\xAE\x1D\x25\xF8', 'LLIL_SET_REG.q(x13,LLIL_ADD.q(LLIL_REG.q(x13),LLIL_CONST.q(0x288)));' + \
' LLIL_SET_REG.q(x14,LLIL_LOAD.q(LLIL_REG.q(x13)))', ATTR_PTR_AUTH), # ldraa x14, [x13, #648]!
(b'\x63\x6E\x62\xF8', 'LLIL_SET_REG.q(x19,LLIL_ADD.q(LLIL_REG.q(x19),LLIL_CONST.q(0xFFFFFFFFFFFFF130)));' + \
' LLIL_SET_REG.q(x3,LLIL_LOAD.q(LLIL_REG.q(x19)))', ATTR_PTR_AUTH), # ldraa x3, [x19, #-3792]!
# LDRAA_64_ldst_pac 111110000x1xxxxxxxxxxxxxxxxxxxxx
(b'\x90\x15\x62\xF8', 'LLIL_SET_REG.q(x16,LLIL_LOAD.q(LLIL_ADD.q(LLIL_REG.q(x12),LLIL_CONST.q(0xFFFFFFFFFFFFF108))))', ATTR_PTR_AUTH), # ldraa x16, [x12, #-3832]
(b'\x52\x26\x73\xF8', 'LLIL_SET_REG.q(x18,LLIL_LOAD.q(LLIL_ADD.q(LLIL_REG.q(x18),LLIL_CONST.q(0xFFFFFFFFFFFFF990))))', ATTR_PTR_AUTH), # ldraa x18, [x18, #-1648]
# LDRAB_64W_ldst_pac 111110001x1xxxxxxxxx11xxxxxxxxxx
(b'\x68\xDE\xB8\xF8', 'LLIL_SET_REG.q(x19,LLIL_ADD.q(LLIL_REG.q(x19),LLIL_CONST.q(0xC68)));' + \
' LLIL_SET_REG.q(x8,LLIL_LOAD.q(LLIL_REG.q(x19)))', ATTR_PTR_AUTH), # ldrab x8, [x19, #3176]!
(b'\x8D\x0D\xFF\xF8', 'LLIL_SET_REG.q(x12,LLIL_ADD.q(LLIL_REG.q(x12),LLIL_CONST.q(0xFFFFFFFFFFFFFF80)));' + \
' LLIL_SET_REG.q(x13,LLIL_LOAD.q(LLIL_REG.q(x12)))', ATTR_PTR_AUTH), # ldrab x13, [x12, #-o]!
# LDRAB_64_ldst_pac 111110001x1xxxxxxxxxxxxxxxxxxxxx
(b'\x94\xF5\xA1\xF8', 'LLIL_SET_REG.q(x20,LLIL_LOAD.q(LLIL_ADD.q(LLIL_REG.q(x12),LLIL_CONST.q(0xF8))))', ATTR_PTR_AUTH), # ldrab x20, [x12, #248]
(b'\x2B\x35\xAA\xF8', 'LLIL_SET_REG.q(x11,LLIL_LOAD.q(LLIL_ADD.q(LLIL_REG.q(x9),LLIL_CONST.q(0x518))))', ATTR_PTR_AUTH), # ldrab x11, [x9, #1304]
(b'\x28\x1b\x02\x90', 'LLIL_SET_REG.q(x8,LLIL_CONST.q(0x4364000))'), # ldrsw x8, 0x100008000
# RETAA_64E_branch_reg 11010110010111110000101111111111
(b'\xFF\x0B\x5F\xD6', 'LLIL_RET(LLIL_REG.q(x30))', ATTR_PTR_AUTH), # retaa
# RETAB_64E_branch_reg 11010110010111110000111111111111
(b'\xFF\x0F\x5F\xD6', 'LLIL_RET(LLIL_REG.q(x30))', ATTR_PTR_AUTH), # retab
]
# pac tests depend on whether the architecture is configured to lift them as
# intrinsics or as their non-authenticated counterparts
# see if the line "#define LIFT_PAC_AS_INTRINSIC 1" exists in il.h
if '#define LIFT_PAC_AS_INTRINSIC 1\n' in open(path_il_h).readlines():
print('testing that select PAC instructions lift to intrinsics')
tests_pac.extend([
# AUTHENTICATE (VALIDATE CODE)
# regex: autda[d|i]z?[a|b] where:
# d means "data", i means "instruction"
# z means modifier zero
# a means "use key A", b means "use key B"
# autda x22, x18 (example of encoding: AUTDA_64P_dp_1src)
(b'\x56\x1A\xC1\xDA', 'LLIL_INTRINSIC([x22],__autda,[LLIL_REG.q(x22),LLIL_REG.q(x18)])'),
# authenticate data address with modifier zero
# autdza x1 (example of encoding: AUTDZA_64Z_dp_1src)
(b'\xE1\x3B\xC1\xDA', 'LLIL_INTRINSIC([x1],__autda,[LLIL_REG.q(x1),LLIL_CONST.q(0x0)])'),
# autdb x19, x3 (example of encoding: AUTDB_64P_dp_1src)
(b'\x73\x1C\xC1\xDA', 'LLIL_INTRINSIC([x19],__autdb,[LLIL_REG.q(x19),LLIL_REG.q(x3)])'),
# autdzb x1 (example of encoding: AUTDZB_64Z_dp_1src)
(b'\xE1\x3F\xC1\xDA', 'LLIL_INTRINSIC([x1],__autdb,[LLIL_REG.q(x1),LLIL_CONST.q(0x0)])'),
# autia x26, x9 (example of encoding: AUTIA_64P_dp_1src)
(b'\x3A\x11\xC1\xDA', 'LLIL_INTRINSIC([x26],__autia,[LLIL_REG.q(x26),LLIL_REG.q(x9)])'),
# autiza x30 (example of encoding: AUTIZA_64Z_dp_1src)
(b'\xFE\x33\xC1\xDA', 'LLIL_INTRINSIC([x30],__autia,[LLIL_REG.q(x30),LLIL_CONST.q(0x0)])'),
# autib x18, x21 (example of encoding: AUTIB_64P_dp_1src)
(b'\xB2\x16\xC1\xDA', 'LLIL_INTRINSIC([x18],__autib,[LLIL_REG.q(x18),LLIL_REG.q(x21)])'),
# autizb x17 (example of encoding: AUTIZB_64Z_dp_1src)
(b'\xF1\x37\xC1\xDA', 'LLIL_INTRINSIC([x17],__autib,[LLIL_REG.q(x17),LLIL_CONST.q(0x0)])'),
# SIGN (COMPUTE CODE)
# regex: pac[d|i][z][a|b] where:
# regex: autda[d|i]z?g?[a|b] where:
# d means "data", i means "instruction"
# z means modifier zero
# g means "use generic key" (even if "a" follows)
# a means "use key A", b means "use key B"
# pacda x9, x21 (example of encoding: PACDA_64P_dp_1src)
(b'\xA9\x0A\xC1\xDA', 'LLIL_INTRINSIC([x9],__pacda,[LLIL_REG.q(x9),LLIL_REG.q(x21)])'),
# pacdza x5 (example of encoding: PACDZA_64Z_dp_1src)
(b'\xE5\x2B\xC1\xDA', 'LLIL_INTRINSIC([x5],__pacda,[LLIL_REG.q(x5),LLIL_CONST.q(0x0)])'),
# pacdb x14, x3 (example of encoding: PACDB_64P_dp_1src)
(b'\x6E\x0C\xC1\xDA', 'LLIL_INTRINSIC([x14],__pacdb,[LLIL_REG.q(x14),LLIL_REG.q(x3)])'),
# pacdzb x1 (example of encoding: PACDZB_64Z_dp_1src)
(b'\xE1\x2F\xC1\xDA', 'LLIL_INTRINSIC([x1],__pacdb,[LLIL_REG.q(x1),LLIL_CONST.q(0x0)])'),
# pacga x1, xzr, x12 (example of encoding: PACGA_64P_dp_2src)
(b'\xE1\x33\xCC\x9A', 'LLIL_INTRINSIC([x1],__pacga,[LLIL_CONST.q(0x0),LLIL_REG.q(x12)])'),
# pacia x6, x14 (example of encoding: PACIA_64P_dp_1src)
(b'\xC6\x01\xC1\xDA', 'LLIL_INTRINSIC([x6],__pacia,[LLIL_REG.q(x6),LLIL_REG.q(x14)])'),
# paciza x21 (example of encoding: PACIZA_64Z_dp_1src)
(b'\xF5\x23\xC1\xDA', 'LLIL_INTRINSIC([x21],__pacia,[LLIL_REG.q(x21),LLIL_CONST.q(0x0)])'),
# pacib x29, x4 (example of encoding: PACIB_64P_dp_1src)
(b'\x9D\x04\xC1\xDA', 'LLIL_INTRINSIC([x29],__pacib,[LLIL_REG.q(x29),LLIL_REG.q(x4)])'),
# pacizb x14 (example of encoding: PACIZB_64Z_dp_1src)
(b'\xEE\x27\xC1\xDA', 'LLIL_INTRINSIC([x14],__pacib,[LLIL_REG.q(x14),LLIL_CONST.q(0x0)])'),
# STRIP (REMOVE CODE WITHOUT AUTHENTICATION)
# xpacd xzr (example of encoding: XPACD_64Z_dp_1src)
(b'\xFF\x47\xC1\xDA', 'LLIL_INTRINSIC([xzr],__xpacd,[LLIL_CONST.q(0x0)])'),
# xpaci x25 (example of encoding: XPACI_64Z_dp_1src)
(b'\xF9\x43\xC1\xDA', 'LLIL_INTRINSIC([x25],__xpaci,[LLIL_REG.q(x25)])'),
# mixed instructions from old tests
# PACDA_64P_dp_1src 1101101011000001000010xxxxxxxxxx
(b'\xAC\x0B\xC1\xDA', 'LLIL_INTRINSIC([x12],__pacda,[LLIL_REG.q(x12),LLIL_REG.q(x29)])'), # pacda x12, x29
(b'\xD2\x09\xC1\xDA', 'LLIL_INTRINSIC([x18],__pacda,[LLIL_REG.q(x18),LLIL_REG.q(x14)])'), # pacda x18, x14
# PACDB_64P_dp_1src 1101101011000001000011xxxxxxxxxx
(b'\xF9\x0E\xC1\xDA', 'LLIL_INTRINSIC([x25],__pacdb,[LLIL_REG.q(x25),LLIL_REG.q(x23)])'), # pacdb x25, x23
(b'\xBA\x0C\xC1\xDA', 'LLIL_INTRINSIC([x26],__pacdb,[LLIL_REG.q(x26),LLIL_REG.q(x5)])'), # pacdb x26, x5
# PACDZA_64Z_dp_1src 110110101100000100101xxxxxxxxxxx
(b'\xE7\x2B\xC1\xDA', 'LLIL_INTRINSIC([x7],__pacda,[LLIL_REG.q(x7),LLIL_CONST.q(0x0)])'), # pacdza x7
(b'\xF7\x2B\xC1\xDA', 'LLIL_INTRINSIC([x23],__pacda,[LLIL_REG.q(x23),LLIL_CONST.q(0x0)])'), # pacdza x23
# PACDZB_64Z_dp_1src 1101101011000001001xxxxxxxxxxxxx
(b'\xE6\x2F\xC1\xDA', 'LLIL_INTRINSIC([x6],__pacdb,[LLIL_REG.q(x6),LLIL_CONST.q(0x0)])'), # pacdzb x6
(b'\xE0\x2F\xC1\xDA', 'LLIL_INTRINSIC([x0],__pacdb,[LLIL_REG.q(x0),LLIL_CONST.q(0x0)])'), # pacdzb x0
# PACGA_64P_dp_2src 10011010110xxxxx001100xxxxxxxxxx
(b'\x22\x30\xCD\x9A', 'LLIL_INTRINSIC([x2],__pacga,[LLIL_REG.q(x1),LLIL_REG.q(x13)])'), # pacga x2, x1, x13
(b'\x99\x32\xD3\x9A', 'LLIL_INTRINSIC([x25],__pacga,[LLIL_REG.q(x20),LLIL_REG.q(x19)])'), # pacga x25, x20, x19
# PACIA1716_HI_hints 1101010100000011001000010xxxxxxx
(b'\x1F\x21\x03\xD5', 'LLIL_INTRINSIC([x17],__pacia,[LLIL_REG.q(x17),LLIL_REG.q(x16)])'), # pacia1716
# PACIAZ_HI_hints 11010101000000110010001100xxxxxx
(b'\x1F\x23\x03\xD5', 'LLIL_INTRINSIC([x30],__pacia,[LLIL_REG.q(x30),LLIL_CONST.q(0x0)])'), # paciaz
# PACIA_64P_dp_1src 1101101011000001000000xxxxxxxxxx
(b'\x4A\x02\xC1\xDA', 'LLIL_INTRINSIC([x10],__pacia,[LLIL_REG.q(x10),LLIL_REG.q(x18)])'), # pacia x10, x18
(b'\xAA\x00\xC1\xDA', 'LLIL_INTRINSIC([x10],__pacia,[LLIL_REG.q(x10),LLIL_REG.q(x5)])'), # pacia x10, x5
# PACIB1716_HI_hints 110101010000001100100001xxxxxxxx
(b'\x5F\x21\x03\xD5', 'LLIL_INTRINSIC([x17],__pacib,[LLIL_REG.q(x17),LLIL_REG.q(x16)])'), # pacib1716
# PACIASP_HI_hints 1101010100000011001000110xxxxxxx
# writes x30 (after PAC computation), reads sp for modifier
(b'\x3F\x23\x03\xD5', 'LLIL_INTRINSIC([x30],__pacia,[LLIL_REG.q(x30),LLIL_REG.q(sp)])'), # paciasp
# PACIBSP_HI_hints 110101010000001100100011xxxxxxxx
(b'\x7F\x23\x03\xD5', 'LLIL_INTRINSIC([x30],__pacib,[LLIL_REG.q(x30),LLIL_REG.q(sp)])'), # pacibsp
# PACIBZ_HI_hints 11010101000000110010001101xxxxxx
(b'\x5F\x23\x03\xD5', 'LLIL_INTRINSIC([x30],__pacib,[LLIL_REG.q(x30),LLIL_CONST.q(0x0)])'), # pacibz
# PACIB_64P_dp_1src 1101101011000001000001xxxxxxxxxx
(b'\x84\x06\xC1\xDA', 'LLIL_INTRINSIC([x4],__pacib,[LLIL_REG.q(x4),LLIL_REG.q(x20)])'), # pacib x4, x20
(b'\x61\x06\xC1\xDA', 'LLIL_INTRINSIC([x1],__pacib,[LLIL_REG.q(x1),LLIL_REG.q(x19)])'), # pacib x1, x19
# PACIZA_64Z_dp_1src 110110101100000100100xxxxxxxxxxx
(b'\xE3\x23\xC1\xDA', 'LLIL_INTRINSIC([x3],__pacia,[LLIL_REG.q(x3),LLIL_CONST.q(0x0)])'), # paciza x3
(b'\xFE\x23\xC1\xDA', 'LLIL_INTRINSIC([x30],__pacia,[LLIL_REG.q(x30),LLIL_CONST.q(0x0)])'), # paciza x30
# PACIZB_64Z_dp_1src 11011010110000010010xxxxxxxxxxxx
(b'\xE3\x27\xC1\xDA', 'LLIL_INTRINSIC([x3],__pacib,[LLIL_REG.q(x3),LLIL_CONST.q(0x0)])'), # pacizb x3
(b'\xE7\x27\xC1\xDA', 'LLIL_INTRINSIC([x7],__pacib,[LLIL_REG.q(x7),LLIL_CONST.q(0x0)])'), # pacizb x7
# XPACD_64Z_dp_1src 110110101100000101000111111xxxxx
(b'\xF8\x47\xC1\xDA', 'LLIL_INTRINSIC([x24],__xpacd,[LLIL_REG.q(x24)])'), # xpacd x24
(b'\xED\x47\xC1\xDA', 'LLIL_INTRINSIC([x13],__xpacd,[LLIL_REG.q(x13)])'), # xpacd x13
# XPACI_64Z_dp_1src 110110101100000101000xxxxxxxxxxx
(b'\xE2\x43\xC1\xDA', 'LLIL_INTRINSIC([x2],__xpaci,[LLIL_REG.q(x2)])'), # xpaci x2
(b'\xE7\x43\xC1\xDA', 'LLIL_INTRINSIC([x7],__xpaci,[LLIL_REG.q(x7)])'), # xpaci x7
# XPACLRI_HI_hints 11010101000000110010000xxxxxxxxx
(b'\xFF\x20\x03\xD5', 'LLIL_INTRINSIC([x30],__xpaci,[LLIL_REG.q(x30)])'), # xpaclri
])
# DO NOT LIFT PAC AS INTRINSIC
else:
print('testing that select PAC instructions lift to NOP')
tests_pac.extend([
# In all these cases, we leave the target untouched.
# Authenticate instructions normally modify the target, removing the code if authentication succeeds.
(b'\x56\x1A\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\xE1\x3B\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\x73\x1C\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\xE1\x3F\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\x3A\x11\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\xFE\x33\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\xB2\x16\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\xF1\x37\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
# Sign instructions normally modify the target, adding a code.
(b'\xA9\x0A\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\xE5\x2B\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\x6E\x0C\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\xE1\x2F\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\xE1\x33\xCC\x9A', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\xC6\x01\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\xF5\x23\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\x9D\x04\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\xEE\x27\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
# Strip instructions normally modify the target, removing the code without authentication.
(b'\xFF\x47\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
(b'\xF9\x43\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH),
# mixed instructions from old tests
(b'\xAC\x0B\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacda x12, x29
(b'\xD2\x09\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacda x18, x14
(b'\xF9\x0E\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacdb x25, x23
(b'\xBA\x0C\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacdb x26, x5
(b'\xE7\x2B\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacdza x7
(b'\xF7\x2B\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacdza x23
(b'\xE6\x2F\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacdzb x6
(b'\xE0\x2F\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacdzb x0
(b'\x22\x30\xCD\x9A', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacga x2, x1, x13
(b'\x99\x32\xD3\x9A', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacga x25, x20, x19
(b'\x1F\x21\x03\xD5', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacia1716
(b'\x1F\x23\x03\xD5', 'LLIL_NOP()', ATTR_PTR_AUTH), # paciaz
(b'\x4A\x02\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacia x10, x18
(b'\xAA\x00\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacia x10, x5
(b'\x5F\x21\x03\xD5', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacib1716
(b'\x3F\x23\x03\xD5', 'LLIL_NOP()', ATTR_PTR_AUTH), # paciasp
(b'\x7F\x23\x03\xD5', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacibsp
(b'\x5F\x23\x03\xD5', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacibz
(b'\x84\x06\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacib x4, x20
(b'\x61\x06\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacib x1, x19
(b'\xE3\x23\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # paciza x3
(b'\xFE\x23\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # paciza x30
(b'\xE3\x27\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacizb x3
(b'\xE7\x27\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # pacizb x7
(b'\xF8\x47\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # xpacd x24
(b'\xED\x47\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # xpacd x13
(b'\xE2\x43\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # xpaci x2
(b'\xE7\x43\xC1\xDA', 'LLIL_NOP()', ATTR_PTR_AUTH), # xpaci x7
(b'\xFF\x20\x03\xD5', 'LLIL_NOP()', ATTR_PTR_AUTH), # xpaclri
])
tests_load_acquire_store_release = [
# LDAPURB <Wt>, [<Xn|SP>{, #<simm>}]
(b'\xBE\xE3\x53\x19', 'LLIL_SET_REG.d(w30,LLIL_ZX.d(LLIL_LOAD.b(LLIL_ADD.q(LLIL_REG.q(x29),LLIL_CONST.q(0xFFFFFFFFFFFFFF3E)))))'), # ldapurb w30, [x29, #-0xc2]
(b'\x7C\xB3\x5E\x19', 'LLIL_SET_REG.d(w28,LLIL_ZX.d(LLIL_LOAD.b(LLIL_ADD.q(LLIL_REG.q(x27),LLIL_CONST.q(0xFFFFFFFFFFFFFFEB)))))'), # ldapurb w28, [x27, #-0x15]
(b'\x2D\x62\x59\x19', 'LLIL_SET_REG.d(w13,LLIL_ZX.d(LLIL_LOAD.b(LLIL_ADD.q(LLIL_REG.q(x17),LLIL_CONST.q(0xFFFFFFFFFFFFFF96)))))'), # ldapurb w13, [x17, #-0x6a]
(b'\xE1\x01\x45\x19', 'LLIL_SET_REG.d(w1,LLIL_ZX.d(LLIL_LOAD.b(LLIL_ADD.q(LLIL_REG.q(x15),LLIL_CONST.q(0x50)))))'), # ldapurb w1, [x15, #0x50]
# LDAPURSB <Wt>, [<Xn|SP>{, #<simm>}]
(b'\x7F\xC1\xD5\x19', 'LLIL_SX.d(LLIL_LOAD.b(LLIL_ADD.q(LLIL_REG.q(x11),LLIL_CONST.q(0xFFFFFFFFFFFFFF5C))))'), # ldapursb wzr, [x11, #-0xa4]
(b'\x5E\x03\xD7\x19', 'LLIL_SET_REG.d(w30,LLIL_SX.d(LLIL_LOAD.b(LLIL_ADD.q(LLIL_REG.q(x26),LLIL_CONST.q(0xFFFFFFFFFFFFFF70)))))'), # ldapursb w30, [x26, #-0x90]
(b'\xE0\x82\xD2\x19', 'LLIL_SET_REG.d(w0,LLIL_SX.d(LLIL_LOAD.b(LLIL_ADD.q(LLIL_REG.q(x23),LLIL_CONST.q(0xFFFFFFFFFFFFFF28)))))'), # ldapursb w0, [x23, #-0xd8]
(b'\xAF\x70\xD3\x19', 'LLIL_SET_REG.d(w15,LLIL_SX.d(LLIL_LOAD.b(LLIL_ADD.q(LLIL_REG.q(x5),LLIL_CONST.q(0xFFFFFFFFFFFFFF37)))))'), # ldapursb w15, [x5, #-0xc9]
# LDAPURSB <Xt>, [<Xn|SP>{, #<simm>}]
(b'\x00\x72\x9D\x19', 'LLIL_SET_REG.q(x0,LLIL_SX.q(LLIL_LOAD.b(LLIL_ADD.q(LLIL_REG.q(x16),LLIL_CONST.q(0xFFFFFFFFFFFFFFD7)))))'), # ldapursb x0, [x16, #-0x29]
(b'\xB0\x40\x8A\x19', 'LLIL_SET_REG.q(x16,LLIL_SX.q(LLIL_LOAD.b(LLIL_ADD.q(LLIL_REG.q(x5),LLIL_CONST.q(0xA4)))))'), # ldapursb x16, [x5, #0xa4]
(b'\x9E\xC2\x84\x19', 'LLIL_SET_REG.q(x30,LLIL_SX.q(LLIL_LOAD.b(LLIL_ADD.q(LLIL_REG.q(x20),LLIL_CONST.q(0x4C)))))'), # ldapursb x30, [x20, #0x4c]
(b'\x2B\x63\x81\x19', 'LLIL_SET_REG.q(x11,LLIL_SX.q(LLIL_LOAD.b(LLIL_ADD.q(LLIL_REG.q(x25),LLIL_CONST.q(0x16)))))'), # ldapursb x11, [x25, #0x16]
# LDAPURH <Wt>, [<Xn|SP>{, #<simm>}]
(b'\x21\x72\x40\x59', 'LLIL_SET_REG.d(w1,LLIL_ZX.d(LLIL_LOAD.w(LLIL_ADD.q(LLIL_REG.q(x17),LLIL_CONST.q(0x7)))))'), # ldapurh w1, [x17, #0x7]
(b'\xAB\xD2\x48\x59', 'LLIL_SET_REG.d(w11,LLIL_ZX.d(LLIL_LOAD.w(LLIL_ADD.q(LLIL_REG.q(x21),LLIL_CONST.q(0x8D)))))'), # ldapurh w11, [x21, #0x8d]
(b'\x0E\xB0\x54\x59', 'LLIL_SET_REG.d(w14,LLIL_ZX.d(LLIL_LOAD.w(LLIL_ADD.q(LLIL_REG.q(x0),LLIL_CONST.q(0xFFFFFFFFFFFFFF4B)))))'), # ldapurh w14, [x0, #-0xb5]
(b'\x76\x50\x4A\x59', 'LLIL_SET_REG.d(w22,LLIL_ZX.d(LLIL_LOAD.w(LLIL_ADD.q(LLIL_REG.q(x3),LLIL_CONST.q(0xA5)))))'), # ldapurh w22, [x3, #0xa5]
# LDAPURSH <Wt>, [<Xn|SP>{, #<simm>}]
(b'\xA1\x81\xC2\x59', 'LLIL_SET_REG.d(w1,LLIL_SX.d(LLIL_LOAD.w(LLIL_ADD.q(LLIL_REG.q(x13),LLIL_CONST.q(0x28)))))'), # ldapursh w1, [x13, #0x28]
(b'\x7D\x60\xC3\x59', 'LLIL_SET_REG.d(w29,LLIL_SX.d(LLIL_LOAD.w(LLIL_ADD.q(LLIL_REG.q(x3),LLIL_CONST.q(0x36)))))'), # ldapursh w29, [x3, #0x36]
(b'\x5C\xD1\xDF\x59', 'LLIL_SET_REG.d(w28,LLIL_SX.d(LLIL_LOAD.w(LLIL_ADD.q(LLIL_REG.q(x10),LLIL_CONST.q(0xFFFFFFFFFFFFFFFD)))))'), # ldapursh w28, [x10, #-0x3]
(b'\x6B\x42\xC0\x59', 'LLIL_SET_REG.d(w11,LLIL_SX.d(LLIL_LOAD.w(LLIL_ADD.q(LLIL_REG.q(x19),LLIL_CONST.q(0x4)))))'), # ldapursh w11, [x19, #0x4]
# LDAPURSH <Xt>, [<Xn|SP>{, #<simm>}]
(b'\x17\xB1\x8C\x59', 'LLIL_SET_REG.q(x23,LLIL_SX.q(LLIL_LOAD.w(LLIL_ADD.q(LLIL_REG.q(x8),LLIL_CONST.q(0xCB)))))'), # ldapursh x23, [x8, #0xcb]
(b'\xC0\xE3\x89\x59', 'LLIL_SET_REG.q(x0,LLIL_SX.q(LLIL_LOAD.w(LLIL_ADD.q(LLIL_REG.q(x30),LLIL_CONST.q(0x9E)))))'), # ldapursh x0, [x30, #0x9e]
(b'\x19\x01\x91\x59', 'LLIL_SET_REG.q(x25,LLIL_SX.q(LLIL_LOAD.w(LLIL_ADD.q(LLIL_REG.q(x8),LLIL_CONST.q(0xFFFFFFFFFFFFFF10)))))'), # ldapursh x25, [x8, #-0xf0]
(b'\x4F\xE1\x8D\x59', 'LLIL_SET_REG.q(x15,LLIL_SX.q(LLIL_LOAD.w(LLIL_ADD.q(LLIL_REG.q(x10),LLIL_CONST.q(0xDE)))))'), # ldapursh x15, [x10, #0xde]
# LDAPURSW <Xt>, [<Xn|SP>{, #<simm>}]
(b'\x1D\xA1\x80\x99', 'LLIL_SET_REG.q(x29,LLIL_SX.q(LLIL_LOAD.d(LLIL_ADD.q(LLIL_REG.q(x8),LLIL_CONST.q(0xA)))))'), # ldapursw x29, [x8, #0xa]
(b'\xD8\xD2\x83\x99', 'LLIL_SET_REG.q(x24,LLIL_SX.q(LLIL_LOAD.d(LLIL_ADD.q(LLIL_REG.q(x22),LLIL_CONST.q(0x3D)))))'), # ldapursw x24, [x22, #0x3d]
(b'\xBA\xD2\x9E\x99', 'LLIL_SET_REG.q(x26,LLIL_SX.q(LLIL_LOAD.d(LLIL_ADD.q(LLIL_REG.q(x21),LLIL_CONST.q(0xFFFFFFFFFFFFFFED)))))'), # ldapursw x26, [x21, #-0x13]
(b'\x45\x43\x89\x99', 'LLIL_SET_REG.q(x5,LLIL_SX.q(LLIL_LOAD.d(LLIL_ADD.q(LLIL_REG.q(x26),LLIL_CONST.q(0x94)))))'), # ldapursw x5, [x26, #0x94]
# LDAPR <Wt>, [<Xn|SP>{,#0}]
(b'\x11\xC0\xBF\xB8', 'LLIL_SET_REG.d(w17,LLIL_LOAD.d(LLIL_REG.q(x0)))'), # ldapr w17, [x0]
(b'\x24\xC3\xBF\xB8', 'LLIL_SET_REG.d(w4,LLIL_LOAD.d(LLIL_REG.q(x25)))'), # ldapr w4, [x25]
(b'\x49\xC3\xBF\xB8', 'LLIL_SET_REG.d(w9,LLIL_LOAD.d(LLIL_REG.q(x26)))'), # ldapr w9, [x26]
(b'\x3F\xC0\xBF\xB8', 'LLIL_LOAD.d(LLIL_REG.q(x1))'), # ldapr wzr, [x1]
# LDAPR <Xt>, [<Xn|SP>{,#0}]
(b'\x08\xC3\xBF\xF8', 'LLIL_SET_REG.q(x8,LLIL_LOAD.q(LLIL_REG.q(x24)))'), # ldapr x8, [x24]
(b'\x25\xC3\xBF\xF8', 'LLIL_SET_REG.q(x5,LLIL_LOAD.q(LLIL_REG.q(x25)))'), # ldapr x5, [x25]
(b'\x6D\xC2\xBF\xF8', 'LLIL_SET_REG.q(x13,LLIL_LOAD.q(LLIL_REG.q(x19)))'), # ldapr x13, [x19]
(b'\xD6\xC0\xBF\xF8', 'LLIL_SET_REG.q(x22,LLIL_LOAD.q(LLIL_REG.q(x6)))'), # ldapr x22, [x6]
# LDAPRB <Wt>, [<Xn|SP>{,#0}]
(b'\x80\xC3\xBF\x38', 'LLIL_SET_REG.d(w0,LLIL_ZX.d(LLIL_LOAD.b(LLIL_REG.q(x28))))'), # ldaprb w0, [x28]
(b'\x5C\xC2\xBF\x38', 'LLIL_SET_REG.d(w28,LLIL_ZX.d(LLIL_LOAD.b(LLIL_REG.q(x18))))'), # ldaprb w28, [x18]
(b'\x05\xC3\xBF\x38', 'LLIL_SET_REG.d(w5,LLIL_ZX.d(LLIL_LOAD.b(LLIL_REG.q(x24))))'), # ldaprb w5, [x24]
(b'\x61\xC2\xBF\x38', 'LLIL_SET_REG.d(w1,LLIL_ZX.d(LLIL_LOAD.b(LLIL_REG.q(x19))))'), # ldaprb w1, [x19]
# LDAPRH <Wt>, [<Xn|SP>{,#0}]
(b'\x6B\xC0\xBF\x78', 'LLIL_SET_REG.d(w11,LLIL_ZX.d(LLIL_LOAD.w(LLIL_REG.q(x3))))'), # ldaprh w11, [x3]
(b'\x02\xC3\xBF\x78', 'LLIL_SET_REG.d(w2,LLIL_ZX.d(LLIL_LOAD.w(LLIL_REG.q(x24))))'), # ldaprh w2, [x24]
(b'\xE0\xC2\xBF\x78', 'LLIL_SET_REG.d(w0,LLIL_ZX.d(LLIL_LOAD.w(LLIL_REG.q(x23))))'), # ldaprh w0, [x23]
(b'\x2B\xC3\xBF\x78', 'LLIL_SET_REG.d(w11,LLIL_ZX.d(LLIL_LOAD.w(LLIL_REG.q(x25))))'), # ldaprh w11, [x25]
# STLUR <Wt>, [<Xn|SP>{, #<simm>}]
(b'\x62\xD0\x14\x99', 'LLIL_STORE.d(LLIL_ADD.q(LLIL_REG.q(x3),LLIL_CONST.q(0xFFFFFFFFFFFFFF4D)),LLIL_REG.d(w2))'), # stlur w2, [x3, #-0xb3]
(b'\x2D\x71\x05\x99', 'LLIL_STORE.d(LLIL_ADD.q(LLIL_REG.q(x9),LLIL_CONST.q(0x57)),LLIL_REG.d(w13))'), # stlur w13, [x9, #0x57]
(b'\xC4\x03\x01\x99', 'LLIL_STORE.d(LLIL_ADD.q(LLIL_REG.q(x30),LLIL_CONST.q(0x10)),LLIL_REG.d(w4))'), # stlur w4, [x30, #0x10]
(b'\x46\x91\x1B\x99', 'LLIL_STORE.d(LLIL_ADD.q(LLIL_REG.q(x10),LLIL_CONST.q(0xFFFFFFFFFFFFFFB9)),LLIL_REG.d(w6))'), # stlur w6, [x10, #-0x47]
# STLUR <Xt>, [<Xn|SP>{, #<simm>}]
(b'\x5C\x52\x0A\xD9', 'LLIL_STORE.q(LLIL_ADD.q(LLIL_REG.q(x18),LLIL_CONST.q(0xA5)),LLIL_REG.q(x28))'), # stlur x28, [x18, #0xa5]
(b'\x0D\x63\x09\xD9', 'LLIL_STORE.q(LLIL_ADD.q(LLIL_REG.q(x24),LLIL_CONST.q(0x96)),LLIL_REG.q(x13))'), # stlur x13, [x24, #0x96]
(b'\xF6\x92\x14\xD9', 'LLIL_STORE.q(LLIL_ADD.q(LLIL_REG.q(x23),LLIL_CONST.q(0xFFFFFFFFFFFFFF49)),LLIL_REG.q(x22))'), # stlur x22, [x23, #-0xb7]
(b'\xD5\x20\x01\xD9', 'LLIL_STORE.q(LLIL_ADD.q(LLIL_REG.q(x6),LLIL_CONST.q(0x12)),LLIL_REG.q(x21))'), # stlur x21, [x6, #0x12]
# STLURB <Wt>, [<Xn|SP>{, #<simm>}]
(b'\x29\xF2\x0C\x19', 'LLIL_STORE.b(LLIL_ADD.q(LLIL_REG.q(x17),LLIL_CONST.q(0xCF)),LLIL_LOW_PART.b(LLIL_REG.d(w9)))'), # stlurb w9, [x17, #0xcf]
(b'\x76\xA2\x10\x19', 'LLIL_STORE.b(LLIL_ADD.q(LLIL_REG.q(x19),LLIL_CONST.q(0xFFFFFFFFFFFFFF0A)),LLIL_LOW_PART.b(LLIL_REG.d(w22)))'), # stlurb w22, [x19, #-0xf6]
(b'\x0B\xA0\x10\x19', 'LLIL_STORE.b(LLIL_ADD.q(LLIL_REG.q(x0),LLIL_CONST.q(0xFFFFFFFFFFFFFF0A)),LLIL_LOW_PART.b(LLIL_REG.d(w11)))'), # stlurb w11, [x0, #-0xf6]
(b'\xF0\xE3\x0D\x19', 'LLIL_STORE.b(LLIL_ADD.q(LLIL_REG.q(sp),LLIL_CONST.q(0xDE)),LLIL_LOW_PART.b(LLIL_REG.d(w16)))'), # stlurb w16, [sp, #0xde]
# STLURH <Wt>, [<Xn|SP>{, #<simm>}]
(b'\xE2\x51\x0E\x59', 'LLIL_STORE.w(LLIL_ADD.q(LLIL_REG.q(x15),LLIL_CONST.q(0xE5)),LLIL_LOW_PART.w(LLIL_REG.d(w2)))'), # stlurh w2, [x15, #0xe5]
(b'\x4E\x33\x12\x59', 'LLIL_STORE.w(LLIL_ADD.q(LLIL_REG.q(x26),LLIL_CONST.q(0xFFFFFFFFFFFFFF23)),LLIL_LOW_PART.w(LLIL_REG.d(w14)))'), # stlurh w14, [x26, #-0xdd]
(b'\xBA\x83\x1B\x59', 'LLIL_STORE.w(LLIL_ADD.q(LLIL_REG.q(x29),LLIL_CONST.q(0xFFFFFFFFFFFFFFB8)),LLIL_LOW_PART.w(LLIL_REG.d(w26)))'), # stlurh w26, [x29, #-0x48]
(b'\x61\xB3\x01\x59', 'LLIL_STORE.w(LLIL_ADD.q(LLIL_REG.q(x27),LLIL_CONST.q(0x1B)),LLIL_LOW_PART.w(LLIL_REG.d(w1)))'), # stlurh w1, [x27, #0x1b]
# LDAPUR <Wt>, [<Xn|SP>{, #<simm>}]
(b'\xD9\x51\x59\x99', 'LLIL_SET_REG.d(w25,LLIL_LOAD.d(LLIL_ADD.q(LLIL_REG.q(x14),LLIL_CONST.q(0xFFFFFFFFFFFFFF95))))'), # ldapur w25, [x14, #-0x6b]
(b'\x38\xC1\x58\x99', 'LLIL_SET_REG.d(w24,LLIL_LOAD.d(LLIL_ADD.q(LLIL_REG.q(x9),LLIL_CONST.q(0xFFFFFFFFFFFFFF8C))))'), # ldapur w24, [x9, #-0x74]
(b'\xB3\x42\x54\x99', 'LLIL_SET_REG.d(w19,LLIL_LOAD.d(LLIL_ADD.q(LLIL_REG.q(x21),LLIL_CONST.q(0xFFFFFFFFFFFFFF44))))'), # ldapur w19, [x21, #-0xbc]
(b'\x2A\x01\x56\x99', 'LLIL_SET_REG.d(w10,LLIL_LOAD.d(LLIL_ADD.q(LLIL_REG.q(x9),LLIL_CONST.q(0xFFFFFFFFFFFFFF60))))'), # ldapur w10, [x9, #-0xa0]
# LDAPUR <Xt>, [<Xn|SP>{, #<simm>}]
(b'\x51\x52\x5B\xD9', 'LLIL_SET_REG.q(x17,LLIL_LOAD.q(LLIL_ADD.q(LLIL_REG.q(x18),LLIL_CONST.q(0xFFFFFFFFFFFFFFB5))))'), # ldapur x17, [x18, #-0x4b]
(b'\x71\x30\x56\xD9', 'LLIL_SET_REG.q(x17,LLIL_LOAD.q(LLIL_ADD.q(LLIL_REG.q(x3),LLIL_CONST.q(0xFFFFFFFFFFFFFF63))))'), # ldapur x17, [x3, #-0x9d]
(b'\x6C\x00\x4C\xD9', 'LLIL_SET_REG.q(x12,LLIL_LOAD.q(LLIL_ADD.q(LLIL_REG.q(x3),LLIL_CONST.q(0xC0))))'), # ldapur x12, [x3, #0xc0]
(b'\xD4\x82\x43\xD9', 'LLIL_SET_REG.q(x20,LLIL_LOAD.q(LLIL_ADD.q(LLIL_REG.q(x22),LLIL_CONST.q(0x38))))') # ldapur x20, [x22, #0x38]
]
tests_movk = [
(b'\xe9\xae\xb7\xf2', 'LLIL_SET_REG.q(x9,LLIL_AND.q(LLIL_REG.q(x9),LLIL_NOT.q(LLIL_CONST.q(0xFFFF0000)))); LLIL_SET_REG.q(x9,LLIL_OR.q(LLIL_REG.q(x9),LLIL_CONST.q(0xBD770000)))'), # movk x9, #0xbd77, lsl #0x10
]
tests_mvni = [
(b'\xe2\x05\x01\x6f', 'LLIL_SET_REG.o(v2,LLIL_NOT.o(LLIL_CONST.o(0x2F)))'), # mvni v2.4s, #0x2f
]
# https://github.com/Vector35/binaryninja-api/issues/2791
tests_2791 = [
(b'\x00\x20\x21\x1e', 'LLIL_FSUB.d{f*}(LLIL_REG.d(s0),LLIL_REG.d(s1))'), # fcmp s0, s1
]
tests_ucvtf = [
# msr, mrs with unnamed (implementation specific) sysregs
(b'\x2B\x19\x1B\xD5', 'LLIL_INTRINSIC([sysreg_unknown],_WriteStatusReg,[LLIL_REG.q(x11)])'), # msr s3_3_c1_c9_1, x11
(b'\xEE\x47\x1E\xD5', 'LLIL_INTRINSIC([sysreg_unknown],_WriteStatusReg,[LLIL_REG.q(x14)])'), # msr s3_6_c4_c7_7, x14
(b'\x39\xB5\x15\xD5', 'LLIL_INTRINSIC([sysreg_unknown],_WriteStatusReg,[LLIL_REG.q(x25)])'), # msr s2_5_c11_c5_1, x25
(b'\x87\xBF\x11\xD5', 'LLIL_INTRINSIC([sysreg_unknown],_WriteStatusReg,[LLIL_REG.q(x7)])'), # msr s2_1_c11_c15_4, x7
(b'\x3E\x53\x39\xD5', 'LLIL_INTRINSIC([x30],_ReadStatusReg,[LLIL_REG.q(sysreg_unknown)])'), # mrs x30, s3_1_c5_c3_1
(b'\x5D\x93\x3C\xD5', 'LLIL_INTRINSIC([x29],_ReadStatusReg,[LLIL_REG.q(sysreg_unknown)])'), # mrs x29, s3_4_c9_c3_2
(b'\x30\x0E\x34\xD5', 'LLIL_INTRINSIC([x16],_ReadStatusReg,[LLIL_REG.q(sysreg_unknown)])'), # mrs x16, s2_4_c0_c14_1
(b'\x3A\x8E\x33\xD5', 'LLIL_INTRINSIC([x26],_ReadStatusReg,[LLIL_REG.q(sysreg_unknown)])'), # mrs x26, s2_3_c8_c14_1
# msr, mrs with named sysregs
(b'\x36\xE2\x1C\xD5', 'LLIL_INTRINSIC([cnthp_ctl_el2],_WriteStatusReg,[LLIL_REG.q(x22)])'), # msr cnthp_ctl_el2, x22
(b'\xF4\xEA\x1B\xD5', 'LLIL_INTRINSIC([pmevcntr23_el0],_WriteStatusReg,[LLIL_REG.q(x20)])'), # msr pmevcntr23_el0, x20
(b'\x05\xE1\x18\xD5', 'LLIL_INTRINSIC([cntkctl_el1],_WriteStatusReg,[LLIL_REG.q(x5)])'), # msr cntkctl_el1, x5
(b'\x00\xE2\x1D\xD5', 'LLIL_INTRINSIC([cntp_tval_el02],_WriteStatusReg,[LLIL_REG.q(x0)])'), # msr cntp_tval_el02, x
(b'\xF9\x20\x31\xD5', 'LLIL_INTRINSIC([x25],_ReadStatusReg,[LLIL_REG(trcdvcmr4)])'), # mrs x25, trcdvcmr4
(b'\x4D\xC9\x3C\xD5', 'LLIL_INTRINSIC([x13],_ReadStatusReg,[LLIL_REG(ich_ap1r2_el2)])'), # mrs x13, ich_ap1r2_el2
(b'\xC4\xC8\x38\xD5', 'LLIL_INTRINSIC([x4],_ReadStatusReg,[LLIL_REG(icc_ap0r2_el1)])'), # mrs x4, icc_ap0r2_el1
(b'\x80\x10\x30\xD5', 'LLIL_INTRINSIC([x0],_ReadStatusReg,[LLIL_REG(oslar_el1)])'), # mrs x0, oslar_el1
# when same input/output register, encoding is UCVTF_asisdmisc_R
# ucvtf s16, s7 UCVTF_asisdmisc_R
(b'\xF0\xD8\x21\x7E', 'LLIL_INTRINSIC([s16],vcvts_f32_u32,[LLIL_REG.d(s7)])'),
# ucvtf d26, d30 UCVTF_asisdmisc_R
(b'\xDA\xDB\x61\x7E', 'LLIL_INTRINSIC([d26],vcvt_f64_u64,[LLIL_REG.q(d30)])'),
# ucvtf s6, s19 UCVTF_asisdmisc_R
(b'\x66\xDA\x21\x7E', 'LLIL_INTRINSIC([s6],vcvts_f32_u32,[LLIL_REG.d(s19)])'),
# ucvtf s13, s0 UCVTF_asisdmisc_R
(b'\x0D\xD8\x21\x7E', 'LLIL_INTRINSIC([s13],vcvts_f32_u32,[LLIL_REG.d(s0)])'),
# ucvtf d28, d26 UCVTF_asisdmisc_R
(b'\x5C\xDB\x61\x7E', 'LLIL_INTRINSIC([d28],vcvt_f64_u64,[LLIL_REG.q(d26)])'),
# ucvtf d25, d11 UCVTF_asisdmisc_R
(b'\x79\xD9\x61\x7E', 'LLIL_INTRINSIC([d25],vcvt_f64_u64,[LLIL_REG.q(d11)])'),
# ucvtf d24, d21 UCVTF_asisdmisc_R
(b'\xB8\xDA\x61\x7E', 'LLIL_INTRINSIC([d24],vcvt_f64_u64,[LLIL_REG.q(d21)])'),
# ucvtf s7, s18 UCVTF_asisdmisc_R
(b'\x47\xDA\x21\x7E', 'LLIL_INTRINSIC([s7],vcvts_f32_u32,[LLIL_REG.d(s18)])'),
# when 16-bit reg, needs FP16 extension and encoding name breaks convention
# ucvtf h30, h0 UCVTF_asisdmiscfp16_R
(b'\x1E\xD8\x79\x7E', 'LLIL_INTRINSIC([h30],vcvth_f16_u16,[LLIL_REG.w(h0)])'),
# ucvtf h22, h6 UCVTF_asisdmiscfp16_R
(b'\xD6\xD8\x79\x7E', 'LLIL_INTRINSIC([h22],vcvth_f16_u16,[LLIL_REG.w(h6)])'),
# ucvtf h7, h2 UCVTF_asisdmiscfp16_R
(b'\x47\xD8\x79\x7E', 'LLIL_INTRINSIC([h7],vcvth_f16_u16,[LLIL_REG.w(h2)])'),
# ucvtf h24, h18 UCVTF_asisdmiscfp16_R
(b'\x58\xDA\x79\x7E', 'LLIL_INTRINSIC([h24],vcvth_f16_u16,[LLIL_REG.w(h18)])'),
# ucvtf h8, h21 UCVTF_asisdmiscfp16_R
# 64-bit GPR to 64-bit FP
# ucvtf d30, x19 UCVTF_D64_float2int
(b'\x7E\x02\x63\x9E', 'LLIL_INTRINSIC([d30],vcvt_f64_u64,[LLIL_REG.q(x19)])'),
# ucvtf d10, x28 UCVTF_D64_float2int
(b'\x8A\x03\x63\x9E', 'LLIL_INTRINSIC([d10],vcvt_f64_u64,[LLIL_REG.q(x28)])'),
# ucvtf d16, x21 UCVTF_D64_float2int
(b'\xB0\x02\x63\x9E', 'LLIL_INTRINSIC([d16],vcvt_f64_u64,[LLIL_REG.q(x21)])'),
# ucvtf d18, x24 UCVTF_D64_float2int
(b'\x12\x03\x63\x9E', 'LLIL_INTRINSIC([d18],vcvt_f64_u64,[LLIL_REG.q(x24)])'),
# 64-bit GPR to 32-bit FP
# ucvtf s29, x5 UCVTF_S64_float2int
(b'\xBD\x00\x23\x9E', 'LLIL_INTRINSIC([s29],vcvth_f16_u16,[LLIL_REG.q(x5)])'),
# ucvtf s23, x8 UCVTF_S64_float2int
(b'\x17\x01\x23\x9E', 'LLIL_INTRINSIC([s23],vcvth_f16_u16,[LLIL_REG.q(x8)])'),
# ucvtf s22, x14 UCVTF_S64_float2int
(b'\xD6\x01\x23\x9E', 'LLIL_INTRINSIC([s22],vcvth_f16_u16,[LLIL_REG.q(x14)])'),
# ucvtf s10, x11 UCVTF_S64_float2int
(b'\x6A\x01\x23\x9E', 'LLIL_INTRINSIC([s10],vcvth_f16_u16,[LLIL_REG.q(x11)])'),
# 64-bit GPR to 16-bit FP
# ucvtf h3, x2 UCVTF_H64_float2int
(b'\x43\x00\xE3\x9E', 'LLIL_INTRINSIC([h3],vcvth_f16_u64,[LLIL_REG.q(x2)])'),
# ucvtf h18, x21 UCVTF_H64_float2int
(b'\xB2\x02\xE3\x9E', 'LLIL_INTRINSIC([h18],vcvth_f16_u64,[LLIL_REG.q(x21)])'),
# ucvtf h18, x7 UCVTF_H64_float2int
(b'\xF2\x00\xE3\x9E', 'LLIL_INTRINSIC([h18],vcvth_f16_u64,[LLIL_REG.q(x7)])'),
# ucvtf h27, x29 UCVTF_H64_float2int
(b'\xBB\x03\xE3\x9E', 'LLIL_INTRINSIC([h27],vcvth_f16_u64,[LLIL_REG.q(x29)])'),
# 32-bit GPR to 64-bit FP
# ucvtf d0, w7 UCVTF_D32_float2int
(b'\xE0\x00\x63\x1E', 'LLIL_INTRINSIC([d0],vcvt_f64_u32,[LLIL_REG.d(w7)])'),
# ucvtf d19, w25 UCVTF_D32_float2int
(b'\x33\x03\x63\x1E', 'LLIL_INTRINSIC([d19],vcvt_f64_u32,[LLIL_REG.d(w25)])'),
# ucvtf d19, w5 UCVTF_D32_float2int
(b'\xB3\x00\x63\x1E', 'LLIL_INTRINSIC([d19],vcvt_f64_u32,[LLIL_REG.d(w5)])'),
# ucvtf d26, w16 UCVTF_D32_float2int
(b'\x1A\x02\x63\x1E', 'LLIL_INTRINSIC([d26],vcvt_f64_u32,[LLIL_REG.d(w16)])'),
# ucvtf d0, w7
(b'\xE0\x00\x63\x1e', 'LLIL_INTRINSIC([d0],vcvt_f64_u32,[LLIL_REG.d(w7)])'),
# 32-bit GPR to 64-bit FP + #<fbits>
# ucvtf d18, w3, #0x1f
(b'\x72\x84\x43\x1E', 'LLIL_INTRINSIC([d18],vcvtd_n_f64_u32,[LLIL_REG.d(w3),LLIL_CONST(31)])'),
# ucvtf d25, w5, #0x1c
(b'\xB9\x90\x43\x1E', 'LLIL_INTRINSIC([d25],vcvtd_n_f64_u32,[LLIL_REG.d(w5),LLIL_CONST(28)])'),
# ucvtf d22, w9, #0x2
(b'\x36\xf9\x43\x1e', 'LLIL_INTRINSIC([d22],vcvtd_n_f64_u32,[LLIL_REG.d(w9),LLIL_CONST(2)])'),
# ucvtf d12, w28, #0x3
(b'\x8c\xf7\x43\x1e', 'LLIL_INTRINSIC([d12],vcvtd_n_f64_u32,[LLIL_REG.d(w28),LLIL_CONST(3)])'),
# 32-bit GPR to 32-bit FP
# ucvtf s29, w24 UCVTF_S32_float2int
(b'\x1D\x03\x23\x1E', 'LLIL_INTRINSIC([s29],vcvts_f32_u32,[LLIL_REG.d(w24)])'),
# ucvtf s6, w7 UCVTF_S32_float2int
(b'\xE6\x00\x23\x1E', 'LLIL_INTRINSIC([s6],vcvts_f32_u32,[LLIL_REG.d(w7)])'),
# ucvtf s31, w23 UCVTF_S32_float2int
(b'\xFF\x02\x23\x1E', 'LLIL_INTRINSIC([s31],vcvts_f32_u32,[LLIL_REG.d(w23)])'),
# ucvtf s21, w0 UCVTF_S32_float2int
(b'\x15\x00\x23\x1E', 'LLIL_INTRINSIC([s21],vcvts_f32_u32,[LLIL_REG.d(w0)])'),
# 32-bit GPR to 16-bit FP
# ucvtf h5, w12 UCVTF_H32_float2int
(b'\x85\x01\xE3\x1E', 'LLIL_INTRINSIC([h5],vcvth_f16_u32,[LLIL_REG.d(w12)])'),
# ucvtf h30, w15 UCVTF_H32_float2int
(b'\xFE\x01\xE3\x1E', 'LLIL_INTRINSIC([h30],vcvth_f16_u32,[LLIL_REG.d(w15)])'),
# ucvtf h7, w13 UCVTF_H32_float2int
(b'\xA7\x01\xE3\x1E', 'LLIL_INTRINSIC([h7],vcvth_f16_u32,[LLIL_REG.d(w13)])'),
# ucvtf h26, w8 UCVTF_H32_float2int
(b'\x1A\x01\xE3\x1E', 'LLIL_INTRINSIC([h26],vcvth_f16_u32,[LLIL_REG.d(w8)])'),
]
tests_ucvtf2 = [
# UCVTF_D32_float2fix 00011110010000111xxxxxxxxxxxxxxx
# ucvtf d18, w3, #0x1f
(b'\x72\x84\x43\x1E', 'LLIL_INTRINSIC([d18],vcvtd_n_f64_u32,[LLIL_REG.d(w3),LLIL_CONST(31)])'),
# UCVTF_D32_float2int 0001111001100011000000xxxxxxxxxx
# ucvtf d0, w7
(b'\xE0\x00\x63\x1E', 'LLIL_INTRINSIC([d0],vcvt_f64_u32,[LLIL_REG.d(w7)])'),
# UCVTF_D64_float2fix 1001111001000011xxxxxxxxxxxxxxxx
# ucvtf d19, x26, #0x23
(b'\x53\x77\x43\x9E', 'LLIL_INTRINSIC([d19],vcvtd_n_f64_u64,[LLIL_REG.q(x26),LLIL_CONST(35)])'),
# UCVTF_D64_float2int 1001111001100011000000xxxxxxxxxx
# ucvtf d30, x19
(b'\x7E\x02\x63\x9E', 'LLIL_INTRINSIC([d30],vcvt_f64_u64,[LLIL_REG.q(x19)])'),
# UCVTF_H32_float2fix 00011110110000111xxxxxxxxxxxxxxx
# ucvtf h3, w29, #0x13
(b'\xA3\xB7\xC3\x1E', 'LLIL_INTRINSIC([h3],vcvth_n_f16_u32,[LLIL_REG.d(w29),LLIL_CONST(19)])'),
# UCVTF_H32_float2int 0001111011100011000000xxxxxxxxxx
# ucvtf h5, w12
(b'\x85\x01\xE3\x1E', 'LLIL_INTRINSIC([h5],vcvth_f16_u32,[LLIL_REG.d(w12)])'),
# UCVTF_H64_float2fix 1001111011000011xxxxxxxxxxxxxxxx
# ucvtf h5, x13, #0x16
(b'\xA5\xA9\xC3\x9E', 'LLIL_INTRINSIC([h5],vcvth_n_f16_u64,[LLIL_REG.q(x13),LLIL_CONST(22)])'),
# UCVTF_H64_float2int 1001111011100011000000xxxxxxxxxx
# ucvtf h3, x2
(b'\x43\x00\xE3\x9E', 'LLIL_INTRINSIC([h3],vcvth_f16_u64,[LLIL_REG.q(x2)])'),
# UCVTF_S32_float2fix 00011110000000111xxxxxxxxxxxxxxx
# ucvtf s1, w22, #0x1
(b'\xC1\xFE\x03\x1E', 'LLIL_INTRINSIC([s1],vcvts_n_f32_u32,[LLIL_REG.d(w22),LLIL_CONST(1)])'),
# UCVTF_S32_float2int 0001111000100011000000xxxxxxxxxx
# ucvtf s29, w24
(b'\x1D\x03\x23\x1E', 'LLIL_INTRINSIC([s29],vcvts_f32_u32,[LLIL_REG.d(w24)])'),
# UCVTF_S64_float2fix 1001111000000011xxxxxxxxxxxxxxxx
# ucvtf s2, x27, #0xf
(b'\x62\xC7\x03\x9E', 'LLIL_INTRINSIC([s2],vcvts_n_f32_u64,[LLIL_REG.q(x27),LLIL_CONST(15)])'),
# UCVTF_S64_float2int 1001111000100011000000xxxxxxxxxx
# ucvtf s29, x5
(b'\xBD\x00\x23\x9E', 'LLIL_INTRINSIC([s29],vcvth_f16_u16,[LLIL_REG.q(x5)])'),
# UCVTF_asisdshf_C 011111110xxxxxxx111001xxxxxxxxxx
# ucvtf d20, d1, #0x2a
(b'\x34\xE4\x56\x7F', 'LLIL_INTRINSIC([d20],vcvt_n_f64_u64,[LLIL_REG.q(d1),LLIL_CONST(42)])'),
# UCVTF_asimdshf_C 0x1011110xxxxxxx1110xxxxxxxxxxxx
# ucvtf v15.2s, v14.2s, #0x19
(b'\xCF\xE5\x27\x2F', 'LLIL_INTRINSIC([v15],vcvt_n_f32_u32,[LLIL_REG.o(v14),LLIL_CONST(25)])'),
# UCVTF_asimdmisc_R 0x1011100x100001110110xxxxxxxxxx
# ucvtf v11.2d, v11.2d
(b'\x6B\xD9\x61\x6E', 'LLIL_INTRINSIC([v11],vcvt_f32_u32,[LLIL_REG.o(v11)])'),
# UCVTF_asimdmiscfp16_R 0x1011100111100111011xxxxxxxxxxx
# ucvtf v31.4h, v29.4h
(b'\xBF\xDB\x79\x2E', 'LLIL_INTRINSIC([v31],vcvt_n_f16_u16,[LLIL_REG.o(v29)])'),
# UCVTF_asisdmisc_R 011111100x100001110110xxxxxxxxxx
# ucvtf s16, s7
(b'\xF0\xD8\x21\x7E', 'LLIL_INTRINSIC([s16],vcvts_f32_u32,[LLIL_REG.d(s7)])'),
# UCVTF_asisdmiscfp16_R 0111111001111001110110xxxxxxxxxx
# ucvtf h30, h0
(b'\x1E\xD8\x79\x7E', 'LLIL_INTRINSIC([h30],vcvth_f16_u16,[LLIL_REG.w(h0)])')
]
tests_scvtf = [
# scvtf d1, x15 SCVTF_D64_float2int
(b'\xe1\x01b\x9e', 'LLIL_INTRINSIC([d1],vcvtd_f64_s64,[LLIL_REG.q(x15)])')
]
tests_ret = [
# ret
(b'\xC0\x03\x5F\xD6', 'LLIL_RET(LLIL_REG.q(x30))'),
# ret x10
(b'\x40\x01\x5F\xD6', 'LLIL_RET(LLIL_REG.q(x10))'),
]
tests_svc_hvc_smc = [
# svc #0xb79 SVC_EX_EXCEPTION
(b'\x21\x6F\x01\xD4', 'LLIL_SET_REG.d(syscall_info,LLIL_CONST.d(0x40000B79));' + \
' LLIL_SYSCALL()'),
# svc #0x18a3 SVC_EX_EXCEPTION
(b'\x61\x14\x03\xD4', 'LLIL_SET_REG.d(syscall_info,LLIL_CONST.d(0x400018A3));' + \
' LLIL_SYSCALL()'),
# svc #0x6ea8 SVC_EX_EXCEPTION
(b'\x01\xD5\x0D\xD4', 'LLIL_SET_REG.d(syscall_info,LLIL_CONST.d(0x40006EA8));' + \
' LLIL_SYSCALL()'),
# svc #0x73ac SVC_EX_EXCEPTION
(b'\x81\x75\x0E\xD4', 'LLIL_SET_REG.d(syscall_info,LLIL_CONST.d(0x400073AC));' + \
' LLIL_SYSCALL()'),
# hvc #0x6fa3 HVC_EX_EXCEPTION
(b'\x62\xF4\x0D\xD4', 'LLIL_SET_REG.d(syscall_info,LLIL_CONST.d(0x80006FA3));' + \
' LLIL_SYSCALL()'),
# hvc #0xa4c4 HVC_EX_EXCEPTION
(b'\x82\x98\x14\xD4', 'LLIL_SET_REG.d(syscall_info,LLIL_CONST.d(0x8000A4C4));' + \
' LLIL_SYSCALL()'),
# hvc #0xd5b2 HVC_EX_EXCEPTION
(b'\x42\xB6\x1A\xD4', 'LLIL_SET_REG.d(syscall_info,LLIL_CONST.d(0x8000D5B2));' + \
' LLIL_SYSCALL()'),
# hvc #0x85e5 HVC_EX_EXCEPTION
(b'\xA2\xBC\x10\xD4', 'LLIL_SET_REG.d(syscall_info,LLIL_CONST.d(0x800085E5));' + \
' LLIL_SYSCALL()'),
# smc #0xcfd4 SMC_EX_EXCEPTION
(b'\x83\xFA\x19\xD4', 'LLIL_SET_REG.d(syscall_info,LLIL_CONST.d(0xC000CFD4));' + \
' LLIL_SYSCALL()'),
# smc #0xc2ff SMC_EX_EXCEPTION
(b'\xE3\x5F\x18\xD4', 'LLIL_SET_REG.d(syscall_info,LLIL_CONST.d(0xC000C2FF));' + \
' LLIL_SYSCALL()'),
# smc #0x7dd1 SMC_EX_EXCEPTION
(b'\x23\xBA\x0F\xD4', 'LLIL_SET_REG.d(syscall_info,LLIL_CONST.d(0xC0007DD1));' + \
' LLIL_SYSCALL()'),
# smc #0x7bb1 SMC_EX_EXCEPTION
(b'\x23\x76\x0F\xD4', 'LLIL_SET_REG.d(syscall_info,LLIL_CONST.d(0xC0007BB1));' + \
' LLIL_SYSCALL()'),
]
tests_clrex = [
# clrex #0xe CLREX_BN_BARRIERS
(b'\x5F\x3E\x03\xD5', 'LLIL_INTRINSIC([],__clrex,[])'),
# clrex #0x1 CLREX_BN_BARRIERS
(b'\x5F\x31\x03\xD5', 'LLIL_INTRINSIC([],__clrex,[])'),
# clrex #0xb CLREX_BN_BARRIERS
(b'\x5F\x3B\x03\xD5', 'LLIL_INTRINSIC([],__clrex,[])'),
# clrex #0x2 CLREX_BN_BARRIERS
(b'\x5F\x32\x03\xD5', 'LLIL_INTRINSIC([],__clrex,[])'),
]
tests_xtn_xtn2 = [
# xtn v17.4h, v24.4s XTN_ASIMDMISC_N
(b'\x11\x2B\x61\x0E', 'LLIL_INTRINSIC([v17],vmovn_u32,[LLIL_REG.o(v24)])'),
# xtn v13.4h, v30.4s XTN_ASIMDMISC_N
(b'\xCD\x2B\x61\x0E', 'LLIL_INTRINSIC([v13],vmovn_u32,[LLIL_REG.o(v30)])'),
# xtn v30.4h, v20.4s XTN_ASIMDMISC_N
(b'\x9E\x2A\x61\x0E', 'LLIL_INTRINSIC([v30],vmovn_u32,[LLIL_REG.o(v20)])'),
# xtn v13.2s, v10.2d XTN_ASIMDMISC_N
(b'\x4D\x29\xA1\x0E', 'LLIL_INTRINSIC([v13],vmovn_u64,[LLIL_REG.o(v10)])'),
# xtn2 v27.8h, v19.4s XTN_ASIMDMISC_N
(b'\x7B\x2A\x61\x4E', 'LLIL_INTRINSIC([v27],vmovn_high_u32,[LLIL_REG.o(v19)])'),
# xtn2 v26.4s, v7.2d XTN_ASIMDMISC_N
(b'\xFA\x28\xA1\x4E', 'LLIL_INTRINSIC([v26],vmovn_high_u64,[LLIL_REG.o(v7)])'),
# xtn2 v3.4s, v22.2d XTN_ASIMDMISC_N
(b'\xC3\x2A\xA1\x4E', 'LLIL_INTRINSIC([v3],vmovn_high_u64,[LLIL_REG.o(v22)])'),
# xtn2 v13.8h, v23.4s XTN_ASIMDMISC_N
(b'\xED\x2A\x61\x4E', 'LLIL_INTRINSIC([v13],vmovn_high_u32,[LLIL_REG.o(v23)])'),
]
tests_dc = [
# dc cvadp, x26 DC_SYS_CR_SYSTEMINSTRS
(b'\x3A\x7D\x0B\xD5', 'LLIL_INTRINSIC([],__dc,[LLIL_REG.q(x26)])'),
# dc zva, x24 DC_SYS_CR_SYSTEMINSTRS
(b'\x38\x74\x0B\xD5', 'LLIL_INTRINSIC([],__dc,[LLIL_REG.q(x24)])'),
# dc zva, xzr DC_SYS_CR_SYSTEMINSTRS
(b'\x3F\x74\x0B\xD5', 'LLIL_INTRINSIC([],__dc,[LLIL_CONST.q(0x0)])'),
# dc cisw, x18 DC_SYS_CR_SYSTEMINSTRS
(b'\x52\x7E\x08\xD5', 'LLIL_INTRINSIC([],__dc,[LLIL_REG.q(x18)])'),
]
tests_uxtl_uxtl2 = [
# uxtl v2.2d, v8.2s UXTL_USHLL_ASIMDSHF_L
(b'\x02\xA5\x20\x2F', 'LLIL_SET_REG.q(v2.d[0],LLIL_REG.d(v8.s[0]));' + \
' LLIL_SET_REG.q(v2.d[1],LLIL_REG.d(v8.s[1]))'),
# uxtl v6.8h, v1.8b UXTL_USHLL_ASIMDSHF_L
(b'\x26\xA4\x08\x2F', 'LLIL_SET_REG.w(v6.h[0],LLIL_REG.b(v1.b[0]));' + \
' LLIL_SET_REG.w(v6.h[1],LLIL_REG.b(v1.b[1]));' + \
' LLIL_SET_REG.w(v6.h[2],LLIL_REG.b(v1.b[2]));' + \
' LLIL_SET_REG.w(v6.h[3],LLIL_REG.b(v1.b[3]));' + \
' LLIL_SET_REG.w(v6.h[4],LLIL_REG.b(v1.b[4]));' + \
' LLIL_SET_REG.w(v6.h[5],LLIL_REG.b(v1.b[5]));' + \
' LLIL_SET_REG.w(v6.h[6],LLIL_REG.b(v1.b[6]));' + \
' LLIL_SET_REG.w(v6.h[7],LLIL_REG.b(v1.b[7]))'),
# uxtl v11.8h, v29.8b UXTL_USHLL_ASIMDSHF_L
(b'\xAB\xA7\x08\x2F', 'LLIL_SET_REG.w(v11.h[0],LLIL_REG.b(v29.b[0]));' + \
' LLIL_SET_REG.w(v11.h[1],LLIL_REG.b(v29.b[1]));' + \
' LLIL_SET_REG.w(v11.h[2],LLIL_REG.b(v29.b[2]));' + \
' LLIL_SET_REG.w(v11.h[3],LLIL_REG.b(v29.b[3]));' + \
' LLIL_SET_REG.w(v11.h[4],LLIL_REG.b(v29.b[4]));' + \
' LLIL_SET_REG.w(v11.h[5],LLIL_REG.b(v29.b[5]));' + \
' LLIL_SET_REG.w(v11.h[6],LLIL_REG.b(v29.b[6]));' + \
' LLIL_SET_REG.w(v11.h[7],LLIL_REG.b(v29.b[7]))'),
# uxtl v9.2d, v8.2s UXTL_USHLL_ASIMDSHF_L
(b'\x09\xA5\x20\x2F', 'LLIL_SET_REG.q(v9.d[0],LLIL_REG.d(v8.s[0]));' + \
' LLIL_SET_REG.q(v9.d[1],LLIL_REG.d(v8.s[1]))'),
# uxtl2 v19.2d, v20.4s UXTL_USHLL_ASIMDSHF_L
(b'\x93\xA6\x20\x6F', 'LLIL_SET_REG.q(v19.d[0],LLIL_REG.d(v20.s[2]));' + \
' LLIL_SET_REG.q(v19.d[1],LLIL_REG.d(v20.s[3]))'),
# uxtl2 v11.2d, v18.4s UXTL_USHLL_ASIMDSHF_L
(b'\x4B\xA6\x20\x6F', 'LLIL_SET_REG.q(v11.d[0],LLIL_REG.d(v18.s[2]));' + \
' LLIL_SET_REG.q(v11.d[1],LLIL_REG.d(v18.s[3]))'),
# uxtl2 v11.8h, v10.16b UXTL_USHLL_ASIMDSHF_L
(b'\x4B\xA5\x08\x6F', 'LLIL_SET_REG.w(v11.h[0],LLIL_REG.b(v10.b[8]));' + \
' LLIL_SET_REG.w(v11.h[1],LLIL_REG.b(v10.b[9]));' + \
' LLIL_SET_REG.w(v11.h[2],LLIL_REG.b(v10.b[10]));' + \
' LLIL_SET_REG.w(v11.h[3],LLIL_REG.b(v10.b[11]));' + \
' LLIL_SET_REG.w(v11.h[4],LLIL_REG.b(v10.b[12]));' + \
' LLIL_SET_REG.w(v11.h[5],LLIL_REG.b(v10.b[13]));' + \
' LLIL_SET_REG.w(v11.h[6],LLIL_REG.b(v10.b[14]));' + \
' LLIL_SET_REG.w(v11.h[7],LLIL_REG.b(v10.b[15]))'),
# uxtl2 v0.4s, v13.8h UXTL_USHLL_ASIMDSHF_L
(b'\xA0\xA5\x10\x6F', 'LLIL_SET_REG.d(v0.s[0],LLIL_REG.w(v13.h[4]));' + \
' LLIL_SET_REG.d(v0.s[1],LLIL_REG.w(v13.h[5]));' + \
' LLIL_SET_REG.d(v0.s[2],LLIL_REG.w(v13.h[6]));' + \
' LLIL_SET_REG.d(v0.s[3],LLIL_REG.w(v13.h[7]))'),
]
tests_ldadd = [
# ldaddab w13, w7, [x30] LDADDAB_32_MEMOP
(b'\xC7\x03\xAD\x38', 'LLIL_SET_REG.d(w7,LLIL_LOAD.b(LLIL_REG.q(x30)));' + \
' LLIL_STORE.q(LLIL_REG.q(x30),LLIL_ADD.b(LLIL_LOW_PART.b(LLIL_REG.d(w13)),LLIL_LOW_PART.b(LLIL_REG.d(w7))))'),
# ldaddab w0, w22, [x28] LDADDAB_32_MEMOP
(b'\x96\x03\xA0\x38', 'LLIL_SET_REG.d(w22,LLIL_LOAD.b(LLIL_REG.q(x28)));' + \
' LLIL_STORE.q(LLIL_REG.q(x28),LLIL_ADD.b(LLIL_LOW_PART.b(LLIL_REG.d(w0)),LLIL_LOW_PART.b(LLIL_REG.d(w22))))'),
# ldaddah w9, w16, [x11] LDADDAH_32_MEMOP
(b'\x70\x01\xA9\x78', 'LLIL_SET_REG.d(w16,LLIL_LOAD.w(LLIL_REG.q(x11)));' + \
' LLIL_STORE.q(LLIL_REG.q(x11),LLIL_ADD.w(LLIL_LOW_PART.w(LLIL_REG.d(w9)),LLIL_LOW_PART.w(LLIL_REG.d(w16))))'),
# ldaddah w14, w16, [x28] LDADDAH_32_MEMOP
(b'\x90\x03\xAE\x78', 'LLIL_SET_REG.d(w16,LLIL_LOAD.w(LLIL_REG.q(x28)));' + \
' LLIL_STORE.q(LLIL_REG.q(x28),LLIL_ADD.w(LLIL_LOW_PART.w(LLIL_REG.d(w14)),LLIL_LOW_PART.w(LLIL_REG.d(w16))))'),
# ldaddalb w14, w2, [x14] LDADDALB_32_MEMOP
(b'\xC2\x01\xEE\x38', 'LLIL_SET_REG.d(w2,LLIL_LOAD.b(LLIL_REG.q(x14)));' + \
' LLIL_STORE.q(LLIL_REG.q(x14),LLIL_ADD.b(LLIL_LOW_PART.b(LLIL_REG.d(w14)),LLIL_LOW_PART.b(LLIL_REG.d(w2))))'),
# ldaddalb w0, w24, [x16] LDADDALB_32_MEMOP
(b'\x18\x02\xE0\x38', 'LLIL_SET_REG.d(w24,LLIL_LOAD.b(LLIL_REG.q(x16)));' + \
' LLIL_STORE.q(LLIL_REG.q(x16),LLIL_ADD.b(LLIL_LOW_PART.b(LLIL_REG.d(w0)),LLIL_LOW_PART.b(LLIL_REG.d(w24))))'),
# ldaddalh w21, w30, [sp] LDADDALH_32_MEMOP
(b'\xFE\x03\xF5\x78', 'LLIL_SET_REG.d(w30,LLIL_LOAD.w(LLIL_REG.q(sp)));' + \
' LLIL_STORE.q(LLIL_REG.q(sp),LLIL_ADD.w(LLIL_LOW_PART.w(LLIL_REG.d(w21)),LLIL_LOW_PART.w(LLIL_REG.d(w30))))'),
# ldaddalh w24, wzr, [x19] LDADDALH_32_MEMOP
(b'\x7F\x02\xF8\x78', 'LLIL_LOAD.w(LLIL_REG.q(x19));' + \
' LLIL_STORE.q(LLIL_REG.q(x19),LLIL_ADD.w(LLIL_LOW_PART.w(LLIL_REG.d(w24)),LLIL_LOW_PART.w(LLIL_CONST.d(0x0))))'),
# ldaddal w17, w13, [x7] LDADDAL_32_MEMOP
(b'\xED\x00\xF1\xB8', 'LLIL_SET_REG.d(w13,LLIL_LOAD.d(LLIL_REG.q(x7)));' + \
' LLIL_STORE.q(LLIL_REG.q(x7),LLIL_ADD.d(LLIL_REG.d(w17),LLIL_REG.d(w13)))'),
# ldaddal w7, w27, [x3] LDADDAL_32_MEMOP
(b'\x7B\x00\xE7\xB8', 'LLIL_SET_REG.d(w27,LLIL_LOAD.d(LLIL_REG.q(x3)));' + \
' LLIL_STORE.q(LLIL_REG.q(x3),LLIL_ADD.d(LLIL_REG.d(w7),LLIL_REG.d(w27)))'),
# ldaddal x0, x5, [x1] LDADDAL_64_MEMOP
(b'\x25\x00\xE0\xF8', 'LLIL_SET_REG.q(x5,LLIL_LOAD.q(LLIL_REG.q(x1)));' + \
' LLIL_STORE.q(LLIL_REG.q(x1),LLIL_ADD.q(LLIL_REG.q(x0),LLIL_REG.q(x5)))'),
# ldaddal x6, x13, [x13] LDADDAL_64_MEMOP
(b'\xAD\x01\xE6\xF8', 'LLIL_SET_REG.q(x13,LLIL_LOAD.q(LLIL_REG.q(x13)));' + \
' LLIL_STORE.q(LLIL_REG.q(x13),LLIL_ADD.q(LLIL_REG.q(x6),LLIL_REG.q(x13)))'),
# ldadda w9, w4, [x4] LDADDA_32_MEMOP
(b'\x84\x00\xA9\xB8', 'LLIL_SET_REG.d(w4,LLIL_LOAD.d(LLIL_REG.q(x4)));' + \
' LLIL_STORE.q(LLIL_REG.q(x4),LLIL_ADD.d(LLIL_REG.d(w9),LLIL_REG.d(w4)))'),
# ldadda w17, w29, [x27] LDADDA_32_MEMOP
(b'\x7D\x03\xB1\xB8', 'LLIL_SET_REG.d(w29,LLIL_LOAD.d(LLIL_REG.q(x27)));' + \
' LLIL_STORE.q(LLIL_REG.q(x27),LLIL_ADD.d(LLIL_REG.d(w17),LLIL_REG.d(w29)))'),
# ldadda x5, x9, [x22] LDADDA_64_MEMOP
(b'\xC9\x02\xA5\xF8', 'LLIL_SET_REG.q(x9,LLIL_LOAD.q(LLIL_REG.q(x22)));' + \
' LLIL_STORE.q(LLIL_REG.q(x22),LLIL_ADD.q(LLIL_REG.q(x5),LLIL_REG.q(x9)))'),
# ldadda x6, x2, [x4] LDADDA_64_MEMOP
(b'\x82\x00\xA6\xF8', 'LLIL_SET_REG.q(x2,LLIL_LOAD.q(LLIL_REG.q(x4)));' + \
' LLIL_STORE.q(LLIL_REG.q(x4),LLIL_ADD.q(LLIL_REG.q(x6),LLIL_REG.q(x2)))'),
# ldaddb w16, w24, [x10] LDADDB_32_MEMOP
(b'\x58\x01\x30\x38', 'LLIL_SET_REG.d(w24,LLIL_LOAD.b(LLIL_REG.q(x10)));' + \
' LLIL_STORE.q(LLIL_REG.q(x10),LLIL_ADD.b(LLIL_LOW_PART.b(LLIL_REG.d(w16)),LLIL_LOW_PART.b(LLIL_REG.d(w24))))'),
# ldaddb w4, w0, [x27] LDADDB_32_MEMOP
(b'\x60\x03\x24\x38', 'LLIL_SET_REG.d(w0,LLIL_LOAD.b(LLIL_REG.q(x27)));' + \
' LLIL_STORE.q(LLIL_REG.q(x27),LLIL_ADD.b(LLIL_LOW_PART.b(LLIL_REG.d(w4)),LLIL_LOW_PART.b(LLIL_REG.d(w0))))'),
# ldaddh w30, w28, [x27] LDADDH_32_MEMOP
(b'\x7C\x03\x3E\x78', 'LLIL_SET_REG.d(w28,LLIL_LOAD.w(LLIL_REG.q(x27)));' + \
' LLIL_STORE.q(LLIL_REG.q(x27),LLIL_ADD.w(LLIL_LOW_PART.w(LLIL_REG.d(w30)),LLIL_LOW_PART.w(LLIL_REG.d(w28))))'),
# ldaddh w20, w5, [x24] LDADDH_32_MEMOP
(b'\x05\x03\x34\x78', 'LLIL_SET_REG.d(w5,LLIL_LOAD.w(LLIL_REG.q(x24)));' + \
' LLIL_STORE.q(LLIL_REG.q(x24),LLIL_ADD.w(LLIL_LOW_PART.w(LLIL_REG.d(w20)),LLIL_LOW_PART.w(LLIL_REG.d(w5))))'),
# ldaddlb w9, w24, [x5] LDADDLB_32_MEMOP
(b'\xB8\x00\x69\x38', 'LLIL_SET_REG.d(w24,LLIL_LOAD.b(LLIL_REG.q(x5)));' + \
' LLIL_STORE.q(LLIL_REG.q(x5),LLIL_ADD.b(LLIL_LOW_PART.b(LLIL_REG.d(w9)),LLIL_LOW_PART.b(LLIL_REG.d(w24))))'),
# ldaddlb w3, w9, [x11] LDADDLB_32_MEMOP
(b'\x69\x01\x63\x38', 'LLIL_SET_REG.d(w9,LLIL_LOAD.b(LLIL_REG.q(x11)));' + \
' LLIL_STORE.q(LLIL_REG.q(x11),LLIL_ADD.b(LLIL_LOW_PART.b(LLIL_REG.d(w3)),LLIL_LOW_PART.b(LLIL_REG.d(w9))))'),
# ldaddlh w17, w18, [x1] LDADDLH_32_MEMOP
(b'\x32\x00\x71\x78', 'LLIL_SET_REG.d(w18,LLIL_LOAD.w(LLIL_REG.q(x1)));' + \
' LLIL_STORE.q(LLIL_REG.q(x1),LLIL_ADD.w(LLIL_LOW_PART.w(LLIL_REG.d(w17)),LLIL_LOW_PART.w(LLIL_REG.d(w18))))'),
# ldaddlh w16, w8, [x1] LDADDLH_32_MEMOP
(b'\x28\x00\x70\x78', 'LLIL_SET_REG.d(w8,LLIL_LOAD.w(LLIL_REG.q(x1)));' + \
' LLIL_STORE.q(LLIL_REG.q(x1),LLIL_ADD.w(LLIL_LOW_PART.w(LLIL_REG.d(w16)),LLIL_LOW_PART.w(LLIL_REG.d(w8))))'),
# ldaddl w8, w6, [x4] LDADDL_32_MEMOP
(b'\x86\x00\x68\xB8', 'LLIL_SET_REG.d(w6,LLIL_LOAD.d(LLIL_REG.q(x4)));' + \
' LLIL_STORE.q(LLIL_REG.q(x4),LLIL_ADD.d(LLIL_REG.d(w8),LLIL_REG.d(w6)))'),
# ldaddl w15, w23, [x28] LDADDL_32_MEMOP
(b'\x97\x03\x6F\xB8', 'LLIL_SET_REG.d(w23,LLIL_LOAD.d(LLIL_REG.q(x28)));' + \
' LLIL_STORE.q(LLIL_REG.q(x28),LLIL_ADD.d(LLIL_REG.d(w15),LLIL_REG.d(w23)))'),
# ldaddl x19, x17, [x26] LDADDL_64_MEMOP
(b'\x51\x03\x73\xF8', 'LLIL_SET_REG.q(x17,LLIL_LOAD.q(LLIL_REG.q(x26)));' + \
' LLIL_STORE.q(LLIL_REG.q(x26),LLIL_ADD.q(LLIL_REG.q(x19),LLIL_REG.q(x17)))'),
# ldaddl x4, x17, [x20] LDADDL_64_MEMOP
(b'\x91\x02\x64\xF8', 'LLIL_SET_REG.q(x17,LLIL_LOAD.q(LLIL_REG.q(x20)));' + \
' LLIL_STORE.q(LLIL_REG.q(x20),LLIL_ADD.q(LLIL_REG.q(x4),LLIL_REG.q(x17)))'),
# ldadd w24, w11, [x29] LDADD_32_MEMOP
(b'\xAB\x03\x38\xB8', 'LLIL_SET_REG.d(w11,LLIL_LOAD.d(LLIL_REG.q(x29)));' + \
' LLIL_STORE.q(LLIL_REG.q(x29),LLIL_ADD.d(LLIL_REG.d(w24),LLIL_REG.d(w11)))'),
# ldadd w17, w22, [x12] LDADD_32_MEMOP
(b'\x96\x01\x31\xB8', 'LLIL_SET_REG.d(w22,LLIL_LOAD.d(LLIL_REG.q(x12)));' + \
' LLIL_STORE.q(LLIL_REG.q(x12),LLIL_ADD.d(LLIL_REG.d(w17),LLIL_REG.d(w22)))'),
# ldadd x4, x24, [x5] LDADD_64_MEMOP
(b'\xB8\x00\x24\xF8', 'LLIL_SET_REG.q(x24,LLIL_LOAD.q(LLIL_REG.q(x5)));' + \
' LLIL_STORE.q(LLIL_REG.q(x5),LLIL_ADD.q(LLIL_REG.q(x4),LLIL_REG.q(x24)))'),
# ldadd x25, x4, [x7] LDADD_64_MEMOP
(b'\xE4\x00\x39\xF8', 'LLIL_SET_REG.q(x4,LLIL_LOAD.q(LLIL_REG.q(x7)));' + \
' LLIL_STORE.q(LLIL_REG.q(x7),LLIL_ADD.q(LLIL_REG.q(x25),LLIL_REG.q(x4)))'),
]
tests_swp = [
# swpab w19, wzr, [x25] SWPAB_32_MEMOP
(b'\x3F\x83\xB3\x38', 'LLIL_LOAD.b(LLIL_REG.q(x25));' + \
' LLIL_STORE.b(LLIL_REG.q(x25),LLIL_LOW_PART.b(LLIL_REG.d(w19)))'),
# swpab w24, w2, [x14] SWPAB_32_MEMOP
(b'\xC2\x81\xB8\x38', 'LLIL_SET_REG.d(w2,LLIL_LOAD.b(LLIL_REG.q(x14)));' + \
' LLIL_STORE.b(LLIL_REG.q(x14),LLIL_LOW_PART.b(LLIL_REG.d(w24)))'),
# swpah w18, w25, [x15] SWPAH_32_MEMOP
(b'\xF9\x81\xB2\x78', 'LLIL_SET_REG.d(w25,LLIL_LOAD.w(LLIL_REG.q(x15)));' + \
' LLIL_STORE.w(LLIL_REG.q(x15),LLIL_LOW_PART.w(LLIL_REG.d(w18)))'),
# swpah w13, w25, [x10] SWPAH_32_MEMOP
(b'\x59\x81\xAD\x78', 'LLIL_SET_REG.d(w25,LLIL_LOAD.w(LLIL_REG.q(x10)));' + \
' LLIL_STORE.w(LLIL_REG.q(x10),LLIL_LOW_PART.w(LLIL_REG.d(w13)))'),
# swpalb w21, w3, [x19] SWPALB_32_MEMOP
(b'\x63\x82\xF5\x38', 'LLIL_SET_REG.d(w3,LLIL_LOAD.b(LLIL_REG.q(x19)));' + \
' LLIL_STORE.b(LLIL_REG.q(x19),LLIL_LOW_PART.b(LLIL_REG.d(w21)))'),
# swpalb w21, w28, [x30] SWPALB_32_MEMOP
(b'\xDC\x83\xF5\x38', 'LLIL_SET_REG.d(w28,LLIL_LOAD.b(LLIL_REG.q(x30)));' + \
' LLIL_STORE.b(LLIL_REG.q(x30),LLIL_LOW_PART.b(LLIL_REG.d(w21)))'),
# swpalh w11, w3, [x6] SWPALH_32_MEMOP
(b'\xC3\x80\xEB\x78', 'LLIL_SET_REG.d(w3,LLIL_LOAD.w(LLIL_REG.q(x6)));' + \
' LLIL_STORE.w(LLIL_REG.q(x6),LLIL_LOW_PART.w(LLIL_REG.d(w11)))'),
# swpalh w0, w12, [x26] SWPALH_32_MEMOP
(b'\x4C\x83\xE0\x78', 'LLIL_SET_REG.d(w12,LLIL_LOAD.w(LLIL_REG.q(x26)));' + \
' LLIL_STORE.w(LLIL_REG.q(x26),LLIL_LOW_PART.w(LLIL_REG.d(w0)))'),
# swpal wzr, w24, [x16] SWPAL_32_MEMOP
(b'\x18\x82\xFF\xB8', 'LLIL_SET_REG.d(w24,LLIL_LOAD.d(LLIL_REG.q(x16)));' + \
' LLIL_STORE.d(LLIL_REG.q(x16),LLIL_CONST.d(0x0))'),
# swpal w14, w15, [x0] SWPAL_32_MEMOP
(b'\x0F\x80\xEE\xB8', 'LLIL_SET_REG.d(w15,LLIL_LOAD.d(LLIL_REG.q(x0)));' + \
' LLIL_STORE.d(LLIL_REG.q(x0),LLIL_REG.d(w14))'),
# swpal x26, x16, [x23] SWPAL_64_MEMOP
(b'\xF0\x82\xFA\xF8', 'LLIL_SET_REG.q(x16,LLIL_LOAD.q(LLIL_REG.q(x23)));' + \
' LLIL_STORE.q(LLIL_REG.q(x23),LLIL_REG.q(x26))'),
# swpal x8, x9, [x8] SWPAL_64_MEMOP
(b'\x09\x81\xE8\xF8', 'LLIL_SET_REG.q(x9,LLIL_LOAD.q(LLIL_REG.q(x8)));' + \
' LLIL_STORE.q(LLIL_REG.q(x8),LLIL_REG.q(x8))'),
# swpa w10, w6, [x27] SWPA_32_MEMOP
(b'\x66\x83\xAA\xB8', 'LLIL_SET_REG.d(w6,LLIL_LOAD.d(LLIL_REG.q(x27)));' + \
' LLIL_STORE.d(LLIL_REG.q(x27),LLIL_REG.d(w10))'),
# swpa w0, w24, [x30] SWPA_32_MEMOP
(b'\xD8\x83\xA0\xB8', 'LLIL_SET_REG.d(w24,LLIL_LOAD.d(LLIL_REG.q(x30)));' + \
' LLIL_STORE.d(LLIL_REG.q(x30),LLIL_REG.d(w0))'),
# swpa x15, x1, [x28] SWPA_64_MEMOP
(b'\x81\x83\xAF\xF8', 'LLIL_SET_REG.q(x1,LLIL_LOAD.q(LLIL_REG.q(x28)));' + \
' LLIL_STORE.q(LLIL_REG.q(x28),LLIL_REG.q(x15))'),
# swpa x13, x16, [x29] SWPA_64_MEMOP
(b'\xB0\x83\xAD\xF8', 'LLIL_SET_REG.q(x16,LLIL_LOAD.q(LLIL_REG.q(x29)));' + \
' LLIL_STORE.q(LLIL_REG.q(x29),LLIL_REG.q(x13))'),
# swpb w22, w5, [x21] SWPB_32_MEMOP
(b'\xA5\x82\x36\x38', 'LLIL_SET_REG.d(w5,LLIL_LOAD.b(LLIL_REG.q(x21)));' + \
' LLIL_STORE.b(LLIL_REG.q(x21),LLIL_LOW_PART.b(LLIL_REG.d(w22)))'),
# swpb w7, w30, [x13] SWPB_32_MEMOP
(b'\xBE\x81\x27\x38', 'LLIL_SET_REG.d(w30,LLIL_LOAD.b(LLIL_REG.q(x13)));' + \
' LLIL_STORE.b(LLIL_REG.q(x13),LLIL_LOW_PART.b(LLIL_REG.d(w7)))'),
# swph w0, w26, [x5] SWPH_32_MEMOP
(b'\xBA\x80\x20\x78', 'LLIL_SET_REG.d(w26,LLIL_LOAD.w(LLIL_REG.q(x5)));' + \
' LLIL_STORE.w(LLIL_REG.q(x5),LLIL_LOW_PART.w(LLIL_REG.d(w0)))'),
# swph w10, w13, [x3] SWPH_32_MEMOP
(b'\x6D\x80\x2A\x78', 'LLIL_SET_REG.d(w13,LLIL_LOAD.w(LLIL_REG.q(x3)));' + \
' LLIL_STORE.w(LLIL_REG.q(x3),LLIL_LOW_PART.w(LLIL_REG.d(w10)))'),
# swplb w7, w27, [x3] SWPLB_32_MEMOP
(b'\x7B\x80\x67\x38', 'LLIL_SET_REG.d(w27,LLIL_LOAD.b(LLIL_REG.q(x3)));' + \
' LLIL_STORE.b(LLIL_REG.q(x3),LLIL_LOW_PART.b(LLIL_REG.d(w7)))'),
# swplb w25, w27, [x21] SWPLB_32_MEMOP
(b'\xBB\x82\x79\x38', 'LLIL_SET_REG.d(w27,LLIL_LOAD.b(LLIL_REG.q(x21)));' + \
' LLIL_STORE.b(LLIL_REG.q(x21),LLIL_LOW_PART.b(LLIL_REG.d(w25)))'),
# swplh w13, w19, [x3] SWPLH_32_MEMOP
(b'\x73\x80\x6D\x78', 'LLIL_SET_REG.d(w19,LLIL_LOAD.w(LLIL_REG.q(x3)));' + \
' LLIL_STORE.w(LLIL_REG.q(x3),LLIL_LOW_PART.w(LLIL_REG.d(w13)))'),
# swplh w12, w25, [x12] SWPLH_32_MEMOP
(b'\x99\x81\x6C\x78', 'LLIL_SET_REG.d(w25,LLIL_LOAD.w(LLIL_REG.q(x12)));' + \
' LLIL_STORE.w(LLIL_REG.q(x12),LLIL_LOW_PART.w(LLIL_REG.d(w12)))'),
# swpl w15, w8, [x23] SWPL_32_MEMOP
(b'\xE8\x82\x6F\xB8', 'LLIL_SET_REG.d(w8,LLIL_LOAD.d(LLIL_REG.q(x23)));' + \
' LLIL_STORE.d(LLIL_REG.q(x23),LLIL_REG.d(w15))'),
# swpl w16, w2, [x21] SWPL_32_MEMOP
(b'\xA2\x82\x70\xB8', 'LLIL_SET_REG.d(w2,LLIL_LOAD.d(LLIL_REG.q(x21)));' + \
' LLIL_STORE.d(LLIL_REG.q(x21),LLIL_REG.d(w16))'),
# swpl x13, x14, [sp] SWPL_64_MEMOP
(b'\xEE\x83\x6D\xF8', 'LLIL_SET_REG.q(x14,LLIL_LOAD.q(LLIL_REG.q(sp)));' + \
' LLIL_STORE.q(LLIL_REG.q(sp),LLIL_REG.q(x13))'),
# swpl x4, x19, [x2] SWPL_64_MEMOP
(b'\x53\x80\x64\xF8', 'LLIL_SET_REG.q(x19,LLIL_LOAD.q(LLIL_REG.q(x2)));' + \
' LLIL_STORE.q(LLIL_REG.q(x2),LLIL_REG.q(x4))'),
# swp w1, w0, [x10] SWP_32_MEMOP
(b'\x40\x81\x21\xB8', 'LLIL_SET_REG.d(w0,LLIL_LOAD.d(LLIL_REG.q(x10)));' + \
' LLIL_STORE.d(LLIL_REG.q(x10),LLIL_REG.d(w1))'),
# swp w3, w5, [x11] SWP_32_MEMOP
(b'\x65\x81\x23\xB8', 'LLIL_SET_REG.d(w5,LLIL_LOAD.d(LLIL_REG.q(x11)));' + \
' LLIL_STORE.d(LLIL_REG.q(x11),LLIL_REG.d(w3))'),
# swp x1, x16, [sp] SWP_64_MEMOP
(b'\xF0\x83\x21\xF8', 'LLIL_SET_REG.q(x16,LLIL_LOAD.q(LLIL_REG.q(sp)));' + \
' LLIL_STORE.q(LLIL_REG.q(sp),LLIL_REG.q(x1))'),
# swp x8, x6, [x5] SWP_64_MEMOP
(b'\xA6\x80\x28\xF8', 'LLIL_SET_REG.q(x6,LLIL_LOAD.q(LLIL_REG.q(x5)));' + \
' LLIL_STORE.q(LLIL_REG.q(x5),LLIL_REG.q(x8))'),
]
tests_dup = [
# dup v7.16b, w30 DUP_ASIMDINS_DR_R
(b'\xC7\x0F\x15\x4E', 'LLIL_SET_REG.b(v7.b[0],LLIL_LOW_PART.b(LLIL_REG.d(w30)));' + \
' LLIL_SET_REG.b(v7.b[1],LLIL_LOW_PART.b(LLIL_REG.d(w30)));' + \
' LLIL_SET_REG.b(v7.b[2],LLIL_LOW_PART.b(LLIL_REG.d(w30)));' + \
' LLIL_SET_REG.b(v7.b[3],LLIL_LOW_PART.b(LLIL_REG.d(w30)));' + \
' LLIL_SET_REG.b(v7.b[4],LLIL_LOW_PART.b(LLIL_REG.d(w30)));' + \
' LLIL_SET_REG.b(v7.b[5],LLIL_LOW_PART.b(LLIL_REG.d(w30)));' + \
' LLIL_SET_REG.b(v7.b[6],LLIL_LOW_PART.b(LLIL_REG.d(w30)));' + \
' LLIL_SET_REG.b(v7.b[7],LLIL_LOW_PART.b(LLIL_REG.d(w30)));' + \
' LLIL_SET_REG.b(v7.b[8],LLIL_LOW_PART.b(LLIL_REG.d(w30)));' + \
' LLIL_SET_REG.b(v7.b[9],LLIL_LOW_PART.b(LLIL_REG.d(w30)));' + \
' LLIL_SET_REG.b(v7.b[10],LLIL_LOW_PART.b(LLIL_REG.d(w30)));' + \
' LLIL_SET_REG.b(v7.b[11],LLIL_LOW_PART.b(LLIL_REG.d(w30)));' + \
' LLIL_SET_REG.b(v7.b[12],LLIL_LOW_PART.b(LLIL_REG.d(w30)));' + \
' LLIL_SET_REG.b(v7.b[13],LLIL_LOW_PART.b(LLIL_REG.d(w30)));' + \
' LLIL_SET_REG.b(v7.b[14],LLIL_LOW_PART.b(LLIL_REG.d(w30)));' + \
' LLIL_SET_REG.b(v7.b[15],LLIL_LOW_PART.b(LLIL_REG.d(w30)))'),
# dup v4.8b, w12 DUP_ASIMDINS_DR_R
(b'\x84\x0D\x07\x0E', 'LLIL_SET_REG.b(v4.b[0],LLIL_LOW_PART.b(LLIL_REG.d(w12)));' + \
' LLIL_SET_REG.b(v4.b[1],LLIL_LOW_PART.b(LLIL_REG.d(w12)));' + \
' LLIL_SET_REG.b(v4.b[2],LLIL_LOW_PART.b(LLIL_REG.d(w12)));' + \
' LLIL_SET_REG.b(v4.b[3],LLIL_LOW_PART.b(LLIL_REG.d(w12)));' + \
' LLIL_SET_REG.b(v4.b[4],LLIL_LOW_PART.b(LLIL_REG.d(w12)));' + \
' LLIL_SET_REG.b(v4.b[5],LLIL_LOW_PART.b(LLIL_REG.d(w12)));' + \
' LLIL_SET_REG.b(v4.b[6],LLIL_LOW_PART.b(LLIL_REG.d(w12)));' + \
' LLIL_SET_REG.b(v4.b[7],LLIL_LOW_PART.b(LLIL_REG.d(w12)))'),
# dup v24.4h, w11 DUP_ASIMDINS_DR_R
(b'\x78\x0D\x02\x0E', 'LLIL_SET_REG.w(v24.h[0],LLIL_LOW_PART.w(LLIL_REG.d(w11)));' + \
' LLIL_SET_REG.w(v24.h[1],LLIL_LOW_PART.w(LLIL_REG.d(w11)));' + \
' LLIL_SET_REG.w(v24.h[2],LLIL_LOW_PART.w(LLIL_REG.d(w11)));' + \
' LLIL_SET_REG.w(v24.h[3],LLIL_LOW_PART.w(LLIL_REG.d(w11)))'),
# dup v27.8h, w3 DUP_ASIMDINS_DR_R
(b'\x7B\x0C\x0A\x4E', 'LLIL_SET_REG.w(v27.h[0],LLIL_LOW_PART.w(LLIL_REG.d(w3)));' + \
' LLIL_SET_REG.w(v27.h[1],LLIL_LOW_PART.w(LLIL_REG.d(w3)));' + \
' LLIL_SET_REG.w(v27.h[2],LLIL_LOW_PART.w(LLIL_REG.d(w3)));' + \
' LLIL_SET_REG.w(v27.h[3],LLIL_LOW_PART.w(LLIL_REG.d(w3)));' + \
' LLIL_SET_REG.w(v27.h[4],LLIL_LOW_PART.w(LLIL_REG.d(w3)));' + \
' LLIL_SET_REG.w(v27.h[5],LLIL_LOW_PART.w(LLIL_REG.d(w3)));' + \
' LLIL_SET_REG.w(v27.h[6],LLIL_LOW_PART.w(LLIL_REG.d(w3)));' + \
' LLIL_SET_REG.w(v27.h[7],LLIL_LOW_PART.w(LLIL_REG.d(w3)))'),
# dup v1.16b, v0.b[1]
(b'\x01\x04\x03\x4E', 'LLIL_INTRINSIC([v1],vdupq_laneq_s8,[LLIL_REG.o(v0),LLIL_CONST.b(0x1)])'),
# dup V3.8B, V23.B[2]
(b'\xE3\x06\x05\x0E', 'LLIL_INTRINSIC([v3],vdup_laneq_s8,[LLIL_REG.o(v23),LLIL_CONST.b(0x2)])'),
# dup v5.4s, v3.s[3]
(b'\x65\x04\x1C\x4E', 'LLIL_INTRINSIC([v5],vdupq_laneq_s32,[LLIL_REG.o(v3),LLIL_CONST.b(0x3)])'),
# dup V30.2S, V18.S[0]
(b'\x5E\x06\x04\x0E', 'LLIL_INTRINSIC([v30],vdup_laneq_s32,[LLIL_REG.o(v18),LLIL_CONST.b(0x0)])'),
# dup v16.2d, v16.d[0]
(b'\x10\x06\x08\x4E', 'LLIL_INTRINSIC([v16],vdupq_laneq_s64,[LLIL_REG.o(v16),LLIL_CONST.b(0x0)])'),
# dup V24.4H, V6.H[3]
(b'\xD8\x04\x0E\x0E', 'LLIL_INTRINSIC([v24],vdup_laneq_s16,[LLIL_REG.o(v6),LLIL_CONST.b(0x3)])'),
# dup v24.8h, v6.h[3]
(b'\xd8\x04\x0e\x4e', 'LLIL_INTRINSIC([v24],vdupq_laneq_s16,[LLIL_REG.o(v6),LLIL_CONST.b(0x3)])'),
# dup s6, v8.s[0]
(b'\x06\x05\x04\x5E', 'LLIL_INTRINSIC([s6],vdups_laneq_s32,[LLIL_REG.o(v8),LLIL_CONST.b(0x0)])'),
# dup b1, v4.b[9]
(b'\x81\x04\x13\x5E', 'LLIL_INTRINSIC([b1],vdupb_laneq_s8,[LLIL_REG.o(v4),LLIL_CONST.b(0x9)])'),
# dup h24, v13.h[0]
(b'\xB8\x05\x02\x5E', 'LLIL_INTRINSIC([h24],vduph_laneq_s16,[LLIL_REG.o(v13),LLIL_CONST.b(0x0)])'),
# dup d4, v13.d[0]
(b'\xA4\x05\x08\x5E', 'LLIL_INTRINSIC([d4],vdupd_laneq_s64,[LLIL_REG.o(v13),LLIL_CONST.b(0x0)])')
]
tests_stlr = [
# stlrb w18, [x15] STLRB_SL32_LDSTEXCL
(b'\xF2\xB9\x8C\x08', 'LLIL_STORE.b(LLIL_REG.q(x15),LLIL_LOW_PART.b(LLIL_REG.d(w18)))'),
# stlrb w18, [x24] STLRB_SL32_LDSTEXCL
(b'\x12\xD3\x8F\x08', 'LLIL_STORE.b(LLIL_REG.q(x24),LLIL_LOW_PART.b(LLIL_REG.d(w18)))'),
# stlrh w10, [x12] STLRH_SL32_LDSTEXCL
(b'\x8A\x99\x89\x48', 'LLIL_STORE.w(LLIL_REG.q(x12),LLIL_LOW_PART.w(LLIL_REG.d(w10)))'),
# stlrh w25, [x18] STLRH_SL32_LDSTEXCL
(b'\x59\x86\x8B\x48', 'LLIL_STORE.w(LLIL_REG.q(x18),LLIL_LOW_PART.w(LLIL_REG.d(w25)))'),
# stlr wzr, [x14] STLR_SL32_LDSTEXCL
(b'\xDF\xAD\x8D\x88', 'LLIL_STORE.d(LLIL_REG.q(x14),LLIL_CONST.d(0x0))'),
# stlr w24, [x3] STLR_SL32_LDSTEXCL
(b'\x78\xF8\x9B\x88', 'LLIL_STORE.d(LLIL_REG.q(x3),LLIL_REG.d(w24))'),
# stlr x18, [x25] STLR_SL64_LDSTEXCL
(b'\x32\xD3\x8D\xC8', 'LLIL_STORE.q(LLIL_REG.q(x25),LLIL_REG.q(x18))'),
# stlr x0, [x17] STLR_SL64_LDSTEXCL
(b'\x20\xCE\x82\xC8', 'LLIL_STORE.q(LLIL_REG.q(x17),LLIL_REG.q(x0))'),
]
tests_ldnp = [
# ldnp w28, w5, [x14, #-0xd8] LDNP_32_LDSTNAPAIR_OFFS
(b'\xDC\x15\x65\x28', 'LLIL_SET_REG.d(w28,LLIL_LOAD.d(LLIL_ADD.q(LLIL_REG.q(x14),LLIL_CONST.q(0xFFFFFFFFFFFFFF28))));' + \
' LLIL_SET_REG.d(w5,LLIL_LOAD.d(LLIL_ADD.q(LLIL_REG.q(x14),LLIL_CONST.q(0xFFFFFFFFFFFFFF2C))))'),
# ldnp w0, w17, [x7, #-0xa8] LDNP_32_LDSTNAPAIR_OFFS
(b'\xE0\x44\x6B\x28', 'LLIL_SET_REG.d(w0,LLIL_LOAD.d(LLIL_ADD.q(LLIL_REG.q(x7),LLIL_CONST.q(0xFFFFFFFFFFFFFF58))));' + \
' LLIL_SET_REG.d(w17,LLIL_LOAD.d(LLIL_ADD.q(LLIL_REG.q(x7),LLIL_CONST.q(0xFFFFFFFFFFFFFF5C))))'),
# ldnp x26, x8, [x7, #-0x1b0] LDNP_64_LDSTNAPAIR_OFFS
(b'\xFA\x20\x65\xA8', 'LLIL_SET_REG.q(x26,LLIL_LOAD.q(LLIL_ADD.q(LLIL_REG.q(x7),LLIL_CONST.q(0xFFFFFFFFFFFFFE50))));' + \
' LLIL_SET_REG.q(x8,LLIL_LOAD.q(LLIL_ADD.q(LLIL_REG.q(x7),LLIL_CONST.q(0xFFFFFFFFFFFFFE58))))'),
# ldnp xzr, x1, [x11, #0x170] LDNP_64_LDSTNAPAIR_OFFS
(b'\x7F\x05\x57\xA8', 'LLIL_LOAD.q(LLIL_ADD.q(LLIL_REG.q(x11),LLIL_CONST.q(0x170)));' + \
' LLIL_SET_REG.q(x1,LLIL_LOAD.q(LLIL_ADD.q(LLIL_REG.q(x11),LLIL_CONST.q(0x178))))'),
# ldnp d22, d3, [x15, #-0x88] LDNP_D_LDSTNAPAIR_OFFS