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Now I wanted to look at the hardware utilization and the utilization is surprisingly low and I dont understand why. The generated bitstream and everything works but it seems like the DPU is missing from the BD? Is there a way to find the "real" hardware utilization?
The text was updated successfully, but these errors were encountered:
I assume you are looking at the output of the dpu.tcl script which generates a Vitis platform. The DPU is added in the Vitis flow with V++, that generates a separate Vivado project which you can look at in e.g. boards/ZCU104/binary_container_1/link/vivado/vpl/prj/
There's some similar Xilinx forum posts on this like the one here.
Hello Guys,
I rebuild the Hardware for myself with a few small changes. These changes can be seen here:https://github.com/HenningCode/DPU-PYNQ
Now I wanted to look at the hardware utilization and the utilization is surprisingly low and I dont understand why. The generated bitstream and everything works but it seems like the DPU is missing from the BD? Is there a way to find the "real" hardware utilization?
The text was updated successfully, but these errors were encountered: