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HLS Resize IP code does not compile #3
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Should be fixed in #5 |
Seems like the issue is with the .png file on the added script. When I feed it a jpeg file it works. |
Well the CSIm works but synthesis fails anyways.
|
It doesn't look like you are using that pull request? |
OK, i got it working. |
Resize IP HLS code fails on Vivado HLS 2018.3:
In file included from C:/Xilinx/Vivado/2018.3/include/hls_fpo.h:186:0,
from C:/Xilinx/Vivado/2018.3/include/hls_half.h:44,
from C:/Xilinx/Vivado/2018.3/include/etc/ap_private.h:90,
from C:/Xilinx/Vivado/2018.3/include/ap_common.h:641,
from C:/Xilinx/Vivado/2018.3/include/ap_int.h:54,
from ../../../../xf_resize_config.h:34,
from ../../../../xf_resize_accel.cpp:30:
C:/Xilinx/Vivado/2018.3/include/floating_point_v7_0_bitacc_cmodel.h:135:0: note: this is the location of the previous definition
#define __GMP_LIBGMP_DLL 1
@e Simulation failed.
ERROR: [SIM 211-100] CSim failed with errors.
INFO: [SIM 211-3] *************** CSIM finish ***************
4
while executing
"source hls_script.tcl"
invoked from within
"hls::main hls_script.tcl"
("uplevel" body line 1)
invoked from within
"uplevel 1 hls::main {*}$args"
(procedure "hls_proc" line 5)
invoked from within
"hls_proc $argv"
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