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XilSecure:Fixed RSA client interface key access
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This patch fixes the buffer access of RSA key, so
no alignment is required for 512 bytes(RSA 4096 key size)

Signed-off-by: VNSL Durga Challa <vnsl.durga.challa@xilinx.com>
Acked-by: Mohan Marutirao Dhanawade <mohan.dhanawade@xilinx.com>
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VNSL Durga Challa authored and Siva Addepalli committed Aug 25, 2022
1 parent ac731f3 commit c2dd2eb
Showing 1 changed file with 4 additions and 3 deletions.
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/******************************************************************************
* Copyright (c) 2021 Xilinx, Inc. All rights reserved.
* Copyright (c) 2021-2022 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/

Expand All @@ -20,6 +20,7 @@
* 4.6 gm 07/16/21 Added 64-bit address support
* 4.7 kpt 03/18/21 Replaced XPlmi_DmaXfr with XPlmi_MemCpy64
* 4.9 kpt 07/24/22 Moved XSecure_RsaKat into xsecure_kat_plat_ipihanlder.c
* dc 08/22/22 Fixed RSA key accesses address based on RSA key size
*
* </pre>
*
Expand Down Expand Up @@ -117,7 +118,7 @@ static int XSecure_RsaDecrypt(u32 SrcAddrLow, u32 SrcAddrHigh,
}

u64 Modulus = RsaParams.KeyAddr;
u64 PublicExp = RsaParams.KeyAddr + XSECURE_RSA_4096_KEY_SIZE;
u64 PublicExp = RsaParams.KeyAddr + RsaParams.Size;

Status = XSecure_RsaInitialize_64Bit(XSecureRsaInstPtr, Modulus, 0U,
PublicExp);
Expand Down Expand Up @@ -167,7 +168,7 @@ static int XSecure_RsaEncrypt(u32 SrcAddrLow, u32 SrcAddrHigh,
}

u64 Modulus = RsaParams.KeyAddr;
u64 PublicExp = RsaParams.KeyAddr + XSECURE_RSA_4096_KEY_SIZE;
u64 PublicExp = RsaParams.KeyAddr + RsaParams.Size;

Status = XSecure_RsaInitialize_64Bit(XSecureRsaInstPtr, Modulus, 0U,
PublicExp);
Expand Down

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