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expansion.cpp
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expansion.cpp
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/*
* UAE - The Un*x Amiga Emulator
*
* AutoConfig (tm) Expansions (ZorroII/III)
*
* Copyright 1996,1997 Stefan Reinauer <stepan@linux.de>
* Copyright 1997 Brian King <Brian_King@Mitel.com>
* - added gfxcard code
*
*/
#include "sysconfig.h"
#include "sysdeps.h"
#include "options.h"
#include "uae.h"
#include "traps.h"
#include "memory.h"
#include "rommgr.h"
#include "custom.h"
#include "newcpu.h"
#include "savestate.h"
#include "zfile.h"
#include "catweasel.h"
#include "cdtv.h"
#include "threaddep/thread.h"
#include "a2091.h"
#include "a2065.h"
#include "gfxboard.h"
#include "cd32_fmv.h"
#include "ncr_scsi.h"
#include "ncr9x_scsi.h"
#include "scsi.h"
#include "debug.h"
#include "gayle.h"
#include "idecontrollers.h"
#include "cpuboard.h"
#include "sndboard.h"
#include "uae/ppc.h"
#include "autoconf.h"
#include "specialmonitors.h"
#include "inputdevice.h"
#include "pci.h"
#include "x86.h"
#include "filesys.h"
// More information in first revision HRM Appendix_G
#define BOARD_PROTOAUTOCONFIG 1
#define BOARD_AUTOCONFIG_Z2 2
#define BOARD_AUTOCONFIG_Z3 3
#define BOARD_NONAUTOCONFIG_BEFORE 4
#define BOARD_NONAUTOCONFIG_AFTER_Z2 5
#define BOARD_NONAUTOCONFIG_AFTER_Z3 6
#define BOARD_IGNORE 7
#define KS12_BOOT_HACK 1
#define EXP_DEBUG 0
#define MAX_EXPANSION_BOARD_SPACE 16
/* ********************************************************** */
/* 00 / 02 */
/* er_Type */
#define Z2_MEM_8MB 0x00 /* Size of Memory Block */
#define Z2_MEM_4MB 0x07
#define Z2_MEM_2MB 0x06
#define Z2_MEM_1MB 0x05
#define Z2_MEM_512KB 0x04
#define Z2_MEM_256KB 0x03
#define Z2_MEM_128KB 0x02
#define Z2_MEM_64KB 0x01
/* extended definitions */
#define Z3_MEM_16MB 0x00
#define Z3_MEM_32MB 0x01
#define Z3_MEM_64MB 0x02
#define Z3_MEM_128MB 0x03
#define Z3_MEM_256MB 0x04
#define Z3_MEM_512MB 0x05
#define Z3_MEM_1GB 0x06
#define chainedconfig 0x08 /* Next config is part of the same card */
#define rom_card 0x10 /* ROM vector is valid */
#define add_memory 0x20 /* Link RAM into free memory list */
/* Type of Expansion Card */
#define protoautoconfig 0x40
#define zorroII 0xc0
#define zorroIII 0x80
/* ********************************************************** */
/* 04 - 06 & 10-16 */
/* Manufacturer */
#define commodore_g 513 /* Commodore Braunschweig (Germany) */
#define commodore 514 /* Commodore West Chester */
#define gvp 2017 /* GVP */
#define ass 2102 /* Advanced Systems & Software */
#define hackers_id 2011 /* Special ID for test cards */
/* Card Type */
#define commodore_a2091 3 /* A2091 / A590 Card from C= */
#define commodore_a2091_ram 10 /* A2091 / A590 Ram on HD-Card */
#define commodore_a2232 70 /* A2232 Multiport Expansion */
#define ass_nexus_scsi 1 /* Nexus SCSI Controller */
#define gvp_series_2_scsi 11
#define gvp_iv_24_gfx 32
/* ********************************************************** */
/* 08 - 0A */
/* er_Flags */
#define Z3_SS_MEM_SAME 0x00
#define Z3_SS_MEM_AUTO 0x01
#define Z3_SS_MEM_64KB 0x02
#define Z3_SS_MEM_128KB 0x03
#define Z3_SS_MEM_256KB 0x04
#define Z3_SS_MEM_512KB 0x05
#define Z3_SS_MEM_1MB 0x06 /* Zorro III card subsize */
#define Z3_SS_MEM_2MB 0x07
#define Z3_SS_MEM_4MB 0x08
#define Z3_SS_MEM_6MB 0x09
#define Z3_SS_MEM_8MB 0x0a
#define Z3_SS_MEM_10MB 0x0b
#define Z3_SS_MEM_12MB 0x0c
#define Z3_SS_MEM_14MB 0x0d
#define Z3_SS_MEM_defunct1 0x0e
#define Z3_SS_MEM_defunct2 0x0f
#define force_z3 0x10 /* *MUST* be set if card is Z3 */
#define ext_size 0x20 /* Use extended size table for bits 0-2 of er_Type */
#define no_shutup 0x40 /* Card cannot receive Shut_up_forever */
#define care_addr 0x80 /* Z2=Adress HAS to be $200000-$9fffff Z3=1->mem,0=io */
/* ********************************************************** */
/* 40-42 */
/* ec_interrupt (unused) */
#define enable_irq 0x01 /* enable Interrupt */
#define reset_card 0x04 /* Reset of Expansion Card - must be 0 */
#define card_int2 0x10 /* READ ONLY: IRQ 2 active */
#define card_irq6 0x20 /* READ ONLY: IRQ 6 active */
#define card_irq7 0x40 /* READ ONLY: IRQ 7 active */
#define does_irq 0x80 /* READ ONLY: Card currently throws IRQ */
/* ********************************************************** */
/* ROM defines (DiagVec) */
#define rom_4bit (0x00<<14) /* ROM width */
#define rom_8bit (0x01<<14)
#define rom_16bit (0x02<<14)
#define rom_never (0x00<<12) /* Never run Boot Code */
#define rom_install (0x01<<12) /* run code at install time */
#define rom_binddrv (0x02<<12) /* run code with binddrivers */
uaecptr ROM_filesys_resname, ROM_filesys_resid;
uaecptr ROM_filesys_diagentry;
uaecptr ROM_hardfile_resname, ROM_hardfile_resid;
uaecptr ROM_hardfile_init;
int uae_boot_rom_type;
int uae_boot_rom_size; /* size = code size only */
static bool chipdone;
#define FILESYS_DIAGPOINT 0x01e0
#define FILESYS_BOOTPOINT 0x01e6
#define FILESYS_DIAGAREA 0x2000
/* ********************************************************** */
struct card_data
{
addrbank *(*initrc)(struct romconfig*);
addrbank *(*initnum)(int);
addrbank *(*map)(void);
struct romconfig *rc;
const TCHAR *name;
int flags;
int zorro;
};
static struct card_data cards[MAX_EXPANSION_BOARD_SPACE];
static int ecard, cardno, z3num;
static addrbank *expamem_bank_current;
static uae_u16 uae_id;
static bool isnonautoconfig(int v)
{
return v == BOARD_NONAUTOCONFIG_AFTER_Z2 ||
v == BOARD_NONAUTOCONFIG_AFTER_Z3 ||
v == BOARD_NONAUTOCONFIG_BEFORE;
}
static bool ks12orolder(void)
{
/* check if Kickstart version is below 1.3 */
return kickstart_version && kickstart_version < 34;
}
static bool ks11orolder(void)
{
return kickstart_version && kickstart_version < 33;
}
/* ********************************************************** */
/* Please note: ZorroIII implementation seems to work different
* than described in the HRM. This claims that ZorroIII config
* address is 0xff000000 while the ZorroII config space starts
* at 0x00e80000. In reality, both, Z2 and Z3 cards are
* configured in the ZorroII config space. Kickstart 3.1 doesn't
* even do a single read or write access to the ZorroIII space.
* The original Amiga include files tell the same as the HRM.
* ZorroIII: If you set ext_size in er_Flags and give a Z2-size
* in er_Type you can very likely add some ZorroII address space
* to a ZorroIII card on a real Amiga. This is not implemented
* yet.
* -- Stefan
*
* Surprising that 0xFF000000 isn't used. Maybe it depends on the
* ROM. Anyway, the HRM says that Z3 cards may appear in Z2 config
* space, so what we are doing here is correct.
* -- Bernd
*/
/* Autoconfig address space at 0xE80000 */
static uae_u8 expamem[65536];
static uae_u8 expamem_lo;
static uae_u16 expamem_hi;
static uaecptr expamem_z3_sum;
uaecptr expamem_z3_pointer;
uaecptr expamem_z2_pointer;
uae_u32 expamem_z3_size;
uae_u32 expamem_z2_size;
static uae_u32 expamem_board_size;
static uae_u32 expamem_board_pointer;
static bool z3hack_override;
void set_expamem_z3_hack_override(bool overridenoz3hack)
{
z3hack_override = overridenoz3hack;
}
bool expamem_z3hack(struct uae_prefs *p)
{
if (z3hack_override)
return false;
#ifdef WITH_PPC
if (regs.halted && ppc_state)
return false;
#endif
return p->z3_mapping_mode == Z3MAPPING_AUTO || p->z3_mapping_mode == Z3MAPPING_UAE || cpuboard_memorytype(p) == BOARD_MEMORY_BLIZZARD_12xx;
}
/* Ugly hack for >2M chip RAM in single pool
* We can't add it any later or early boot menu
* stops working because it sets kicktag at the end
* of chip ram...
*/
static void addextrachip (uae_u32 sysbase)
{
if (currprefs.chipmem_size <= 0x00200000)
return;
if (sysbase & 0x80000001)
return;
if (!valid_address (sysbase, 1000))
return;
uae_u32 ml = get_long (sysbase + 322);
if (!valid_address (ml, 32))
return;
uae_u32 next;
while ((next = get_long (ml))) {
if (!valid_address (ml, 32))
return;
uae_u32 upper = get_long (ml + 24);
uae_u32 lower = get_long (ml + 20);
if (lower & ~0xffff) {
ml = next;
continue;
}
uae_u16 attr = get_word (ml + 14);
if ((attr & 0x8002) != 2) {
ml = next;
continue;
}
if (upper >= currprefs.chipmem_size)
return;
uae_u32 added = currprefs.chipmem_size - upper;
uae_u32 first = get_long (ml + 16);
put_long (ml + 24, currprefs.chipmem_size); // mh_Upper
put_long (ml + 28, get_long (ml + 28) + added); // mh_Free
uae_u32 next;
while (first) {
next = first;
first = get_long (next);
}
uae_u32 bytes = get_long (next + 4);
if (next + bytes == 0x00200000) {
put_long (next + 4, currprefs.chipmem_size - next);
} else {
put_long (0x00200000 + 0, 0);
put_long (0x00200000 + 4, added);
put_long (next, 0x00200000);
}
return;
}
}
addrbank expamem_null, expamem_none;
DECLARE_MEMORY_FUNCTIONS(expamem);
addrbank expamem_bank = {
expamem_lget, expamem_wget, expamem_bget,
expamem_lput, expamem_wput, expamem_bput,
default_xlate, default_check, NULL, NULL, _T("Autoconfig Z2"),
dummy_lgeti, dummy_wgeti,
ABFLAG_IO | ABFLAG_SAFE | ABFLAG_PPCIOSPACE, S_READ, S_WRITE
};
DECLARE_MEMORY_FUNCTIONS(expamemz3);
static addrbank expamemz3_bank = {
expamemz3_lget, expamemz3_wget, expamemz3_bget,
expamemz3_lput, expamemz3_wput, expamemz3_bput,
default_xlate, default_check, NULL, NULL, _T("Autoconfig Z3"),
dummy_lgeti, dummy_wgeti,
ABFLAG_IO | ABFLAG_SAFE | ABFLAG_PPCIOSPACE, S_READ, S_WRITE
};
static addrbank *expamem_map_clear (void)
{
write_log (_T("expamem_map_clear() got called. Shouldn't happen.\n"));
return NULL;
}
static void expamem_init_clear (void)
{
memset (expamem, 0xff, sizeof expamem);
}
/* autoconfig area is "non-existing" after last device */
static void expamem_init_clear_zero (void)
{
map_banks(&dummy_bank, 0xe8, 1, 0);
if (!currprefs.address_space_24)
map_banks(&dummy_bank, 0xff000000 >> 16, 1, 0);
}
static void expamem_init_clear2 (void)
{
expamem_bank.name = _T("Autoconfig Z2");
expamemz3_bank.name = _T("Autoconfig Z3");
expamem_init_clear_zero ();
ecard = cardno;
}
static addrbank *expamem_init_last (void)
{
expamem_init_clear2 ();
write_log (_T("Memory map after autoconfig:\n"));
memory_map_dump ();
return NULL;
}
static uae_u8 REGPARAM2 expamem_read(int addr)
{
uae_u8 b = (expamem[addr] & 0xf0) | (expamem[addr + 2] >> 4);
if (addr == 0 || addr == 2 || addr == 0x40 || addr == 0x42)
return b;
b = ~b;
return b;
}
static void REGPARAM2 expamem_write(uaecptr addr, uae_u32 value)
{
addr &= 0xffff;
if (addr == 00 || addr == 02 || addr == 0x40 || addr == 0x42) {
expamem[addr] = (value & 0xf0);
expamem[addr + 2] = (value & 0x0f) << 4;
} else {
expamem[addr] = ~(value & 0xf0);
expamem[addr + 2] = ~((value & 0x0f) << 4);
}
}
static int REGPARAM2 expamem_type (void)
{
return expamem_read(0) & 0xc0;
}
static void call_card_init(int index)
{
addrbank *ab, *abe;
uae_u8 code;
uae_u32 expamem_z3_pointer_old;
card_data *cd = &cards[ecard];
expamem_bank.name = cd->name ? cd->name : _T("None");
if (cd->initnum)
ab = cd->initnum(0);
else
ab = cd->initrc(cd->rc);
expamem_z3_size = 0;
if (ab == &expamem_none) {
expamem_init_clear();
expamem_init_clear_zero();
map_banks(&expamem_bank, 0xE8, 1, 0);
if (!currprefs.address_space_24)
map_banks(&dummy_bank, 0xff000000 >> 16, 1, 0);
expamem_bank_current = NULL;
return;
}
if (ab == &expamem_null) {
expamem_next(NULL, NULL);
return;
}
abe = ab;
if (!abe)
abe = &expamem_bank;
if (abe != &expamem_bank) {
for (int i = 0; i < 16 * 4; i++)
expamem[i] = abe->bget(i);
}
code = expamem_read(0);
if ((code & 0xc0) == zorroII) {
// Z2
code &= 7;
if (code == 0)
expamem_z2_size = 8 * 1024 * 1024;
else
expamem_z2_size = 32768 << code;
expamem_board_size = expamem_z2_size;
expamem_board_pointer = expamem_z2_pointer;
} else if ((code & 0xc0) == zorroIII) {
// Z3
if (expamem_z3_sum < Z3BASE_UAE) {
expamem_z3_sum = currprefs.z3autoconfig_start;
if (currprefs.mbresmem_high_size >= 128 * 1024 * 1024 && expamem_z3_sum == Z3BASE_UAE)
expamem_z3_sum += (currprefs.mbresmem_high_size - 128 * 1024 * 1024) + 16 * 1024 * 1024;
if (!expamem_z3hack(&currprefs))
expamem_z3_sum = Z3BASE_REAL;
if (expamem_z3_sum == Z3BASE_UAE) {
expamem_z3_sum += currprefs.z3chipmem_size;
}
}
expamem_z3_pointer = expamem_z3_sum;
code &= 7;
if (expamem_read(8) & ext_size)
expamem_z3_size = (16 * 1024 * 1024) << code;
else
expamem_z3_size = 16 * 1024 * 1024;
expamem_z3_sum += expamem_z3_size;
expamem_z3_pointer_old = expamem_z3_pointer;
// align non-UAE 32M boards (FastLane is 32M and needs to be aligned)
if (expamem_z3_size <= 32 * 1024 * 1024 && !(cd->flags & 16))
expamem_z3_pointer = (expamem_z3_pointer + expamem_z3_size - 1) & ~(expamem_z3_size - 1);
expamem_z3_sum += expamem_z3_pointer - expamem_z3_pointer_old;
expamem_board_size = expamem_z3_size;
expamem_board_pointer = expamem_z3_pointer;
} else if ((code & 0xc0) == 0x40) {
// 0x40 = "Box without init/diagnostic code"
// proto autoconfig "box" size.
//expamem_z2_size = (1 << ((code >> 3) & 7)) * 4096;
// much easier this way, all old-style boards were made for
// A1000 and didn't have passthrough connector.
expamem_z2_size = 65536;
expamem_board_size = expamem_z2_size;
expamem_board_pointer = expamem_z2_pointer;
}
if (ab) {
// non-NULL: not using expamem_bank
expamem_bank_current = ab;
if ((cd->flags & 1) && currprefs.cs_z3autoconfig && !currprefs.address_space_24) {
map_banks(&expamemz3_bank, 0xff000000 >> 16, 1, 0);
map_banks(&dummy_bank, 0xE8, 1, 0);
} else {
map_banks(&expamem_bank, 0xE8, 1, 0);
if (!currprefs.address_space_24)
map_banks(&dummy_bank, 0xff000000 >> 16, 1, 0);
}
} else {
if ((cd->flags & 1) && currprefs.cs_z3autoconfig && !currprefs.address_space_24) {
map_banks(&expamemz3_bank, 0xff000000 >> 16, 1, 0);
map_banks(&dummy_bank, 0xE8, 1, 0);
expamem_bank_current = &expamem_bank;
} else {
map_banks(&expamem_bank, 0xE8, 1, 0);
if (!currprefs.address_space_24)
map_banks(&dummy_bank, 0xff000000 >> 16, 1, 0);
expamem_bank_current = NULL;
}
}
}
static void boardmessage(addrbank *mapped, bool success)
{
uae_u8 type = expamem_read(0);
int size = expamem_board_size;
TCHAR sizemod = 'K';
size /= 1024;
if (size > 8 * 1024) {
sizemod = 'M';
size /= 1024;
}
write_log (_T("Card %d: Z%d 0x%08x %4d%c %s %s%s\n"),
ecard + 1, (type & 0xc0) == zorroII ? 2 : ((type & 0xc0) == zorroIII ? 3 : 1),
expamem_board_pointer, size, sizemod,
type & rom_card ? _T("ROM") : (type & add_memory ? _T("RAM") : _T("IO ")),
mapped->name,
success ? _T("") : _T(" SHUT UP"));
#if 0
for (int i = 0; i < 16; i++) {
write_log(_T("%s%02X"), i > 0 ? _T(".") : _T(""), expamem_read(i * 4));
}
write_log(_T("\n"));
#endif
}
void expamem_shutup(addrbank *mapped)
{
if (mapped)
boardmessage(mapped, false);
}
void expamem_next (addrbank *mapped, addrbank *next)
{
if (mapped)
boardmessage(mapped, true);
expamem_init_clear();
expamem_init_clear_zero();
for (;;) {
++ecard;
if (ecard >= cardno)
break;
struct card_data *ec = &cards[ecard];
if (ec->initrc && isnonautoconfig(ec->zorro)) {
ec->initrc(cards[ecard].rc);
} else {
call_card_init(ecard);
break;
}
}
if (ecard >= cardno) {
expamem_init_clear2();
expamem_init_last();
}
}
static uae_u32 REGPARAM2 expamem_lget (uaecptr addr)
{
if (expamem_bank_current && expamem_bank_current != &expamem_bank)
return expamem_bank_current->lget(addr);
write_log (_T("warning: Z2 READ.L from address $%08x PC=%x\n"), addr, M68K_GETPC);
return (expamem_wget (addr) << 16) | expamem_wget (addr + 2);
}
static uae_u32 REGPARAM2 expamem_wget (uaecptr addr)
{
if (expamem_bank_current && expamem_bank_current != &expamem_bank)
return expamem_bank_current->wget(addr);
if (expamem_type() != zorroIII) {
if (expamem_bank_current && expamem_bank_current != &expamem_bank)
return expamem_bank_current->bget(addr) << 8;
}
uae_u32 v = (expamem_bget (addr) << 8) | expamem_bget (addr + 1);
if (cpuboards[currprefs.cpuboard_type].subtypes[currprefs.cpuboard_subtype].e8) {
uae_u32 val = v;
cpuboards[currprefs.cpuboard_type].subtypes[currprefs.cpuboard_subtype].e8(addr, &val, 2, false);
v = val;
}
write_log (_T("warning: READ.W from address $%08x=%04x PC=%x\n"), addr, v & 0xffff, M68K_GETPC);
return v;
}
static uae_u32 REGPARAM2 expamem_bget (uaecptr addr)
{
uae_u8 b;
if (!chipdone) {
chipdone = true;
addextrachip (get_long (4));
}
if (expamem_bank_current && expamem_bank_current != &expamem_bank)
return expamem_bank_current->bget(addr);
addr &= 0xFFFF;
b = expamem[addr];
if (cpuboards[currprefs.cpuboard_type].subtypes[currprefs.cpuboard_subtype].e8) {
uae_u32 val = b;
cpuboards[currprefs.cpuboard_type].subtypes[currprefs.cpuboard_subtype].e8(addr, &val, 1, false);
b = val;
}
#if EXP_DEBUG
write_log (_T("expamem_bget %x %x\n"), addr, b);
#endif
return b;
}
static void REGPARAM2 expamem_lput (uaecptr addr, uae_u32 value)
{
if (expamem_bank_current && expamem_bank_current != &expamem_bank) {
expamem_bank_current->lput(addr, value);
return;
}
write_log (_T("warning: Z2 WRITE.L to address $%08x : value $%08x\n"), addr, value);
}
static void REGPARAM2 expamem_wput (uaecptr addr, uae_u32 value)
{
#if EXP_DEBUG
write_log (_T("expamem_wput %x %x\n"), addr, value);
#endif
value &= 0xffff;
if (cpuboards[currprefs.cpuboard_type].subtypes[currprefs.cpuboard_subtype].e8) {
if (cpuboards[currprefs.cpuboard_type].subtypes[currprefs.cpuboard_subtype].e8(addr, &value, 2, true))
return;
}
if (ecard >= cardno)
return;
if (expamem_type () != zorroIII) {
write_log (_T("warning: WRITE.W to address $%08x : value $%x PC=%08x\n"), addr, value, M68K_GETPC);
}
switch (addr & 0xff) {
case 0x48:
// A2630 boot rom writes WORDs to Z2 boards!
if (expamem_type() == zorroII) {
expamem_lo = 0;
expamem_hi = (value >> 8) & 0xff;
expamem_z2_pointer = (expamem_hi | (expamem_lo >> 4)) << 16;
expamem_board_pointer = expamem_z2_pointer;
if (cards[ecard].map) {
expamem_next(cards[ecard].map(), NULL);
return;
}
if (expamem_bank_current && expamem_bank_current != &expamem_bank) {
expamem_bank_current->bput(addr, value >> 8);
return;
}
}
break;
case 0x44:
if (expamem_type() == zorroIII) {
uaecptr addr;
expamem_hi = value & 0xff00;
addr = (expamem_hi | (expamem_lo >> 4)) << 16;
if (!expamem_z3hack(&currprefs)) {
expamem_z3_pointer = addr;
} else {
if (addr != expamem_z3_pointer) {
put_word (regs.regs[11] + 0x20, expamem_z3_pointer >> 16);
put_word (regs.regs[11] + 0x28, expamem_z3_pointer >> 16);
}
}
expamem_board_pointer = expamem_z3_pointer;
}
if (cards[ecard].map) {
expamem_next(cards[ecard].map(), NULL);
return;
}
break;
case 0x4c:
if (cards[ecard].map) {
expamem_next (NULL, NULL);
return;
}
break;
}
if (expamem_bank_current && expamem_bank_current != &expamem_bank)
expamem_bank_current->wput(addr, value);
}
static void REGPARAM2 expamem_bput (uaecptr addr, uae_u32 value)
{
#if EXP_DEBUG
write_log (_T("expamem_bput %x %x\n"), addr, value);
#endif
value &= 0xff;
if (cpuboards[currprefs.cpuboard_type].subtypes[currprefs.cpuboard_subtype].e8) {
if (cpuboards[currprefs.cpuboard_type].subtypes[currprefs.cpuboard_subtype].e8(addr, &value, 1, true))
return;
}
if (ecard >= cardno)
return;
if (expamem_type() == protoautoconfig) {
switch (addr & 0xff) {
case 0x22:
expamem_hi = value & 0x7f;
expamem_z2_pointer = 0xe80000 | (expamem_hi * 4096);
expamem_board_pointer = expamem_z2_pointer;
if (cards[ecard].map) {
expamem_next(cards[ecard].map(), NULL);
return;
}
break;
}
} else {
switch (addr & 0xff) {
case 0x48:
if (expamem_type() == zorroII) {
expamem_hi = value & 0xff;
expamem_z2_pointer = (expamem_hi | (expamem_lo >> 4)) << 16;
expamem_board_pointer = expamem_z2_pointer;
if (cards[ecard].map) {
expamem_next(cards[ecard].map(), NULL);
return;
}
} else {
expamem_lo = value & 0xff;
}
break;
case 0x4a:
if (expamem_type () == zorroII)
expamem_lo = value & 0xff;
break;
case 0x4c:
if (cards[ecard].map) {
expamem_next(expamem_bank_current, NULL);
return;
}
break;
}
}
if (expamem_bank_current && expamem_bank_current != &expamem_bank)
expamem_bank_current->bput(addr, value);
}
static uae_u32 REGPARAM2 expamemz3_bget (uaecptr addr)
{
int reg = addr & 0xff;
if (!expamem_bank_current)
return 0;
if (addr & 0x100)
reg += 2;
return expamem_bank_current->bget(reg + 0);
}
static uae_u32 REGPARAM2 expamemz3_wget (uaecptr addr)
{
uae_u32 v = (expamemz3_bget (addr) << 8) | expamemz3_bget (addr + 1);
write_log (_T("warning: Z3 READ.W from address $%08x=%04x PC=%x\n"), addr, v & 0xffff, M68K_GETPC);
return v;
}
static uae_u32 REGPARAM2 expamemz3_lget (uaecptr addr)
{
write_log (_T("warning: Z3 READ.L from address $%08x PC=%x\n"), addr, M68K_GETPC);
return (expamemz3_wget (addr) << 16) | expamemz3_wget (addr + 2);
}
static void REGPARAM2 expamemz3_bput (uaecptr addr, uae_u32 value)
{
int reg = addr & 0xff;
if (!expamem_bank_current)
return;
if (addr & 0x100)
reg += 2;
if (reg == 0x48) {
if (expamem_type() == zorroII) {
expamem_hi = value & 0xff;
expamem_z2_pointer = (expamem_hi | (expamem_lo >> 4)) << 16;
expamem_board_pointer = expamem_z2_pointer;
} else {
expamem_lo = value & 0xff;
}
} else if (reg == 0x4a) {
if (expamem_type() == zorroII)
expamem_lo = value & 0xff;
}
expamem_bank_current->bput(reg, value);
}
static void REGPARAM2 expamemz3_wput (uaecptr addr, uae_u32 value)
{
int reg = addr & 0xff;
if (!expamem_bank_current)
return;
if (addr & 0x100)
reg += 2;
if (reg == 0x44) {
if (expamem_type() == zorroIII) {
uaecptr addr;
expamem_hi = value & 0xff00;
addr = (expamem_hi | (expamem_lo >> 4)) << 16;;
if (!expamem_z3hack(&currprefs)) {
expamem_z3_pointer = addr;
} else {
if (addr != expamem_z3_pointer) {
put_word (regs.regs[11] + 0x20, expamem_z3_pointer >> 16);
put_word (regs.regs[11] + 0x28, expamem_z3_pointer >> 16);
}
}
expamem_board_pointer = expamem_z3_pointer;
}
}
expamem_bank_current->wput(reg, value);
}
static void REGPARAM2 expamemz3_lput (uaecptr addr, uae_u32 value)
{
write_log (_T("warning: Z3 WRITE.L to address $%08x : value $%08x\n"), addr, value);
}
#ifdef CD32
static addrbank *expamem_map_cd32fmv (void)
{
return cd32_fmv_init (expamem_z2_pointer);
}
static addrbank *expamem_init_cd32fmv (int devnum)
{
int ids[] = { 23, -1 };
struct romlist *rl = getromlistbyids (ids, NULL);
struct romdata *rd;
struct zfile *z;
expamem_init_clear ();
if (!rl)
return NULL;
write_log (_T("CD32 FMV ROM '%s' %d.%d\n"), rl->path, rl->rd->ver, rl->rd->rev);
rd = rl->rd;
z = read_rom (rd);
if (z) {
zfile_fread (expamem, 128, 1, z);
zfile_fclose (z);
}
return NULL;
}
#endif
/* ********************************************************** */
/*
* Fast Memory
*/
MEMORY_FUNCTIONS(fastmem);
MEMORY_FUNCTIONS(fastmem_nojit);
MEMORY_FUNCTIONS(fastmem2);
MEMORY_FUNCTIONS(fastmem2_nojit);
addrbank fastmem_bank = {
fastmem_lget, fastmem_wget, fastmem_bget,
fastmem_lput, fastmem_wput, fastmem_bput,
fastmem_xlate, fastmem_check, NULL, _T("fast"), _T("Fast memory"),
fastmem_lget, fastmem_wget,
ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
addrbank fastmem_nojit_bank = {
fastmem_nojit_lget, fastmem_nojit_wget, fastmem_bget,
fastmem_nojit_lput, fastmem_nojit_wput, fastmem_bput,
fastmem_nojit_xlate, fastmem_nojit_check, NULL, NULL, _T("Fast memory (nojit)"),
fastmem_nojit_lget, fastmem_nojit_wget,
ABFLAG_RAM | ABFLAG_THREADSAFE, S_READ, S_WRITE
};
addrbank fastmem2_bank = {
fastmem2_lget, fastmem2_wget, fastmem2_bget,
fastmem2_lput, fastmem2_wput, fastmem2_bput,
fastmem2_xlate, fastmem2_check, NULL,_T("fast2"), _T("Fast memory 2"),
fastmem2_lget, fastmem2_wget,
ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
addrbank fastmem2_nojit_bank = {
fastmem2_nojit_lget, fastmem2_nojit_wget, fastmem2_nojit_bget,
fastmem2_nojit_lput, fastmem2_nojit_wput, fastmem2_nojit_bput,
fastmem2_nojit_xlate, fastmem2_nojit_check, NULL, NULL, _T("Fast memory #2 (nojit)"),
fastmem2_nojit_lget, fastmem2_nojit_wget,
ABFLAG_RAM | ABFLAG_THREADSAFE, S_READ, S_WRITE
};
static addrbank *fastbanks[] =
{
&fastmem_bank,
&fastmem_nojit_bank,
&fastmem2_bank,
&fastmem2_nojit_bank
};
#ifdef CATWEASEL
/*
* Catweasel ZorroII
*/
DECLARE_MEMORY_FUNCTIONS(catweasel);
static uae_u32 catweasel_mask;
static uae_u32 catweasel_start;
static uae_u32 REGPARAM2 catweasel_lget (uaecptr addr)
{
write_log (_T("catweasel_lget @%08X!\n"),addr);
return 0;
}
static uae_u32 REGPARAM2 catweasel_wget (uaecptr addr)
{
write_log (_T("catweasel_wget @%08X!\n"),addr);
return 0;
}
static uae_u32 REGPARAM2 catweasel_bget (uaecptr addr)
{
addr -= catweasel_start & catweasel_mask;
addr &= catweasel_mask;
return catweasel_do_bget (addr);
}
static void REGPARAM2 catweasel_lput (uaecptr addr, uae_u32 l)
{
write_log (_T("catweasel_lput @%08X=%08X!\n"),addr,l);
}
static void REGPARAM2 catweasel_wput (uaecptr addr, uae_u32 w)
{
write_log (_T("catweasel_wput @%08X=%04X!\n"),addr,w);
}
static void REGPARAM2 catweasel_bput (uaecptr addr, uae_u32 b)
{
addr -= catweasel_start & catweasel_mask;
addr &= catweasel_mask;
catweasel_do_bput (addr, b);
}
static int REGPARAM2 catweasel_check (uaecptr addr, uae_u32 size)
{
return 0;
}
static uae_u8 *REGPARAM2 catweasel_xlate (uaecptr addr)
{
write_log (_T("catweasel_xlate @%08X size %08X\n"), addr);
return 0;
}
static addrbank catweasel_bank = {
catweasel_lget, catweasel_wget, catweasel_bget,
catweasel_lput, catweasel_wput, catweasel_bput,
catweasel_xlate, catweasel_check, NULL, NULL, _T("Catweasel"),
dummy_lgeti, dummy_wgeti,
ABFLAG_IO, S_READ, S_WRITE
};
static addrbank *expamem_map_catweasel (void)
{
catweasel_start = expamem_z2_pointer;
map_banks_z2(&catweasel_bank, catweasel_start >> 16, 1);
return &catweasel_bank;
}
static addrbank *expamem_init_catweasel (int devnum)
{
uae_u8 productid = cwc.type >= CATWEASEL_TYPE_MK3 ? 66 : 200;
uae_u16 vendorid = cwc.type >= CATWEASEL_TYPE_MK3 ? 4626 : 5001;
catweasel_mask = (cwc.type >= CATWEASEL_TYPE_MK3) ? 0xffff : 0x1ffff;
expamem_init_clear ();
expamem_write (0x00, (cwc.type >= CATWEASEL_TYPE_MK3 ? Z2_MEM_64KB : Z2_MEM_128KB) | zorroII);
expamem_write (0x04, productid);
expamem_write (0x08, 0);
expamem_write (0x10, vendorid >> 8);
expamem_write (0x14, vendorid & 0xff);
expamem_write (0x18, 0x00); /* ser.no. Byte 0 */
expamem_write (0x1c, 0x00); /* ser.no. Byte 1 */
expamem_write (0x20, 0x00); /* ser.no. Byte 2 */
expamem_write (0x24, 0x00); /* ser.no. Byte 3 */
expamem_write (0x28, 0x00); /* Rom-Offset hi */
expamem_write (0x2c, 0x00); /* ROM-Offset lo */
expamem_write (0x40, 0x00); /* Ctrl/Statusreg.*/
return NULL;
}
#endif