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Maybe that could open for refining as well. Like some definition of a pin at the lowest level (and a lowest level pindef pcf file for the actual board) and functionality next level (like in a usagedef pcf file). Like io_icore_p54 at the lowest level and then when used as external_i2c_sda at the next. I learned in https://forum.mystorm.uk/t/hard-to-find-p16-p17-p20-p21-in-blackice-mx-pcf/771/5 that this is not possible with arachne-pnr at least. So I want multiple pcf files plus this hierarchical type system. I am surprised that Verlig does not need this info and surprised that it's not already defined? Or is it?