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actbl1.h
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actbl1.h
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/******************************************************************************
*
* Name: actbl1.h - Additional ACPI table definitions
*
*****************************************************************************/
/******************************************************************************
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
* All rights reserved.
*
* 2. License
*
* 2.1. This is your license from Intel Corp. under its intellectual property
* rights. You may have additional license terms from the party that provided
* you this software, covering your right to use that party's intellectual
* property rights.
*
* 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
* copy of the source code appearing in this file ("Covered Code") an
* irrevocable, perpetual, worldwide license under Intel's copyrights in the
* base code distributed originally by Intel ("Original Intel Code") to copy,
* make derivatives, distribute, use and display any portion of the Covered
* Code in any form, with the right to sublicense such rights; and
*
* 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
* license (with the right to sublicense), under only those claims of Intel
* patents that are infringed by the Original Intel Code, to make, use, sell,
* offer to sell, and import the Covered Code and derivative works thereof
* solely to the minimum extent necessary to exercise the above copyright
* license, and in no event shall the patent license extend to any additions
* to or modifications of the Original Intel Code. No other license or right
* is granted directly or by implication, estoppel or otherwise;
*
* The above copyright and patent license is granted only if the following
* conditions are met:
*
* 3. Conditions
*
* 3.1. Redistribution of Source with Rights to Further Distribute Source.
* Redistribution of source code of any substantial portion of the Covered
* Code or modification with rights to further distribute source must include
* the above Copyright Notice, the above License, this list of Conditions,
* and the following Disclaimer and Export Compliance provision. In addition,
* Licensee must cause all Covered Code to which Licensee contributes to
* contain a file documenting the changes Licensee made to create that Covered
* Code and the date of any change. Licensee must include in that file the
* documentation of any changes made by any predecessor Licensee. Licensee
* must include a prominent statement that the modification is derived,
* directly or indirectly, from Original Intel Code.
*
* 3.2. Redistribution of Source with no Rights to Further Distribute Source.
* Redistribution of source code of any substantial portion of the Covered
* Code or modification without rights to further distribute source must
* include the following Disclaimer and Export Compliance provision in the
* documentation and/or other materials provided with distribution. In
* addition, Licensee may not authorize further sublicense of source of any
* portion of the Covered Code, and must include terms to the effect that the
* license from Licensee to its licensee is limited to the intellectual
* property embodied in the software Licensee provides to its licensee, and
* not to intellectual property embodied in modifications its licensee may
* make.
*
* 3.3. Redistribution of Executable. Redistribution in executable form of any
* substantial portion of the Covered Code or modification must reproduce the
* above Copyright Notice, and the following Disclaimer and Export Compliance
* provision in the documentation and/or other materials provided with the
* distribution.
*
* 3.4. Intel retains all right, title, and interest in and to the Original
* Intel Code.
*
* 3.5. Neither the name Intel nor any other trademark owned or controlled by
* Intel shall be used in advertising or otherwise to promote the sale, use or
* other dealings in products derived from or relating to the Covered Code
* without prior written authorization from Intel.
*
* 4. Disclaimer and Export Compliance
*
* 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
* HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
* IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
* INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
* UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
* IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
* PARTICULAR PURPOSE.
*
* 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
* OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
* COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
* SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
* CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
* HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
* SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
* LIMITED REMEDY.
*
* 4.3. Licensee shall not export, either directly or indirectly, any of this
* software or system incorporating such software without first obtaining any
* required license or other approval from the U. S. Department of Commerce or
* any other agency or department of the United States Government. In the
* event Licensee exports any such software from the United States or
* re-exports any such software from a foreign destination, Licensee shall
* ensure that the distribution and export/re-export of the software is in
* compliance with all laws, regulations, orders, or other restrictions of the
* U.S. Export Administration Regulations. Licensee agrees that neither it nor
* any of its subsidiaries will export/re-export any technical data, process,
* software, or service, directly or indirectly, to any country for which the
* United States government or any agency thereof requires an export license,
* other governmental approval, or letter of assurance, without first obtaining
* such license, approval or letter.
*
*****************************************************************************
*
* Alternatively, you may choose to be licensed under the terms of the
* following license:
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer,
* without modification.
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
* substantially similar to the "NO WARRANTY" disclaimer below
* ("Disclaimer") and any redistribution must be conditioned upon
* including a substantially similar Disclaimer requirement for further
* binary redistribution.
* 3. Neither the names of the above-listed copyright holders nor the names
* of any contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Alternatively, you may choose to be licensed under the terms of the
* GNU General Public License ("GPL") version 2 as published by the Free
* Software Foundation.
*
*****************************************************************************/
#ifndef __ACTBL1_H__
#define __ACTBL1_H__
/*******************************************************************************
*
* Additional ACPI Tables
*
* These tables are not consumed directly by the ACPICA subsystem, but are
* included here to support device drivers and the AML disassembler.
*
******************************************************************************/
/*
* Values for description table header signatures for tables defined in this
* file. Useful because they make it more difficult to inadvertently type in
* the wrong signature.
*/
#define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */
#define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */
#define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */
#define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */
#define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */
#define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */
#define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */
#define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */
#define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */
#define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */
#define ACPI_SIG_DBGP "DBGP" /* Debug Port table */
#define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */
#define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */
#define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */
#define ACPI_SIG_EINJ "EINJ" /* Error Injection table */
#define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */
#define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */
#define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */
#define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */
#define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */
#define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */
#define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */
#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table*/
#define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */
#define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */
/* Reserved table signatures */
#define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */
#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
/*
* These tables have been seen in the field, but no definition has been found
*/
#ifdef ACPI_UNDEFINED_TABLES
#define ACPI_SIG_ATKG "ATKG"
#define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */
#define ACPI_SIG_IEIT "IEIT"
#endif
/*
* All tables must be byte-packed to match the ACPI specification, since
* the tables are provided by the system BIOS.
*/
#pragma pack(1)
/*
* Note: C bitfields are not used for this reason:
*
* "Bitfields are great and easy to read, but unfortunately the C language
* does not specify the layout of bitfields in memory, which means they are
* essentially useless for dealing with packed data in on-disk formats or
* binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
* this decision was a design error in C. Ritchie could have picked an order
* and stuck with it." Norman Ramsey.
* See http://stackoverflow.com/a/1053662/41661
*/
/*******************************************************************************
*
* Common subtable headers
*
******************************************************************************/
/* Generic subtable header (used in MADT, SRAT, etc.) */
typedef struct acpi_subtable_header
{
UINT8 Type;
UINT8 Length;
} ACPI_SUBTABLE_HEADER;
/* Subtable header for WHEA tables (EINJ, ERST, WDAT) */
typedef struct acpi_whea_header
{
UINT8 Action;
UINT8 Instruction;
UINT8 Flags;
UINT8 Reserved;
ACPI_GENERIC_ADDRESS RegisterRegion;
UINT64 Value; /* Value used with Read/Write register */
UINT64 Mask; /* Bitmask required for this register instruction */
} ACPI_WHEA_HEADER;
/*******************************************************************************
*
* ASF - Alert Standard Format table (Signature "ASF!")
* Revision 0x10
*
* Conforms to the Alert Standard Format Specification V2.0, 23 April 2003
*
******************************************************************************/
typedef struct acpi_table_asf
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
} ACPI_TABLE_ASF;
/* ASF subtable header */
typedef struct acpi_asf_header
{
UINT8 Type;
UINT8 Reserved;
UINT16 Length;
} ACPI_ASF_HEADER;
/* Values for Type field above */
enum AcpiAsfType
{
ACPI_ASF_TYPE_INFO = 0,
ACPI_ASF_TYPE_ALERT = 1,
ACPI_ASF_TYPE_CONTROL = 2,
ACPI_ASF_TYPE_BOOT = 3,
ACPI_ASF_TYPE_ADDRESS = 4,
ACPI_ASF_TYPE_RESERVED = 5
};
/*
* ASF subtables
*/
/* 0: ASF Information */
typedef struct acpi_asf_info
{
ACPI_ASF_HEADER Header;
UINT8 MinResetValue;
UINT8 MinPollInterval;
UINT16 SystemId;
UINT32 MfgId;
UINT8 Flags;
UINT8 Reserved2[3];
} ACPI_ASF_INFO;
/* Masks for Flags field above */
#define ACPI_ASF_SMBUS_PROTOCOLS (1)
/* 1: ASF Alerts */
typedef struct acpi_asf_alert
{
ACPI_ASF_HEADER Header;
UINT8 AssertMask;
UINT8 DeassertMask;
UINT8 Alerts;
UINT8 DataLength;
} ACPI_ASF_ALERT;
typedef struct acpi_asf_alert_data
{
UINT8 Address;
UINT8 Command;
UINT8 Mask;
UINT8 Value;
UINT8 SensorType;
UINT8 Type;
UINT8 Offset;
UINT8 SourceType;
UINT8 Severity;
UINT8 SensorNumber;
UINT8 Entity;
UINT8 Instance;
} ACPI_ASF_ALERT_DATA;
/* 2: ASF Remote Control */
typedef struct acpi_asf_remote
{
ACPI_ASF_HEADER Header;
UINT8 Controls;
UINT8 DataLength;
UINT16 Reserved2;
} ACPI_ASF_REMOTE;
typedef struct acpi_asf_control_data
{
UINT8 Function;
UINT8 Address;
UINT8 Command;
UINT8 Value;
} ACPI_ASF_CONTROL_DATA;
/* 3: ASF RMCP Boot Options */
typedef struct acpi_asf_rmcp
{
ACPI_ASF_HEADER Header;
UINT8 Capabilities[7];
UINT8 CompletionCode;
UINT32 EnterpriseId;
UINT8 Command;
UINT16 Parameter;
UINT16 BootOptions;
UINT16 OemParameters;
} ACPI_ASF_RMCP;
/* 4: ASF Address */
typedef struct acpi_asf_address
{
ACPI_ASF_HEADER Header;
UINT8 EpromAddress;
UINT8 Devices;
} ACPI_ASF_ADDRESS;
/*******************************************************************************
*
* ASPT - AMD Secure Processor Table (Signature "ASPT")
* Revision 0x1
*
* Conforms to AMD Socket SP5/SP6 Platform ASPT Rev1 Specification,
* 12 September 2022
*
******************************************************************************/
typedef struct acpi_table_aspt
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
UINT32 NumEntries;
} ACPI_TABLE_ASPT;
/* ASPT subtable header */
typedef struct acpi_aspt_header
{
UINT16 Type;
UINT16 Length;
} ACPI_ASPT_HEADER;
/* Values for Type field above */
enum AcpiAsptType
{
ACPI_ASPT_TYPE_GLOBAL_REGS = 0,
ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1,
ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2,
ACPI_ASPT_TYPE_UNKNOWN = 3,
};
/*
* ASPT subtables
*/
/* 0: ASPT Global Registers */
typedef struct acpi_aspt_global_regs
{
ACPI_ASPT_HEADER Header;
UINT32 Reserved;
UINT64 FeatureRegAddr;
UINT64 IrqEnRegAddr;
UINT64 IrqStRegAddr;
} ACPI_ASPT_GLOBAL_REGS;
/* 1: ASPT SEV Mailbox Registers */
typedef struct acpi_aspt_sev_mbox_regs
{
ACPI_ASPT_HEADER Header;
UINT8 MboxIrqId;
UINT8 Reserved[3];
UINT64 CmdRespRegAddr;
UINT64 CmdBufLoRegAddr;
UINT64 CmdBufHiRegAddr;
} ACPI_ASPT_SEV_MBOX_REGS;
/* 2: ASPT ACPI Mailbox Registers */
typedef struct acpi_aspt_acpi_mbox_regs
{
ACPI_ASPT_HEADER Header;
UINT32 Reserved1;
UINT64 CmdRespRegAddr;
UINT64 Reserved2[2];
} ACPI_ASPT_ACPI_MBOX_REGS;
/*******************************************************************************
*
* BERT - Boot Error Record Table (ACPI 4.0)
* Version 1
*
******************************************************************************/
typedef struct acpi_table_bert
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
UINT32 RegionLength; /* Length of the boot error region */
UINT64 Address; /* Physical address of the error region */
} ACPI_TABLE_BERT;
/* Boot Error Region (not a subtable, pointed to by Address field above) */
typedef struct acpi_bert_region
{
UINT32 BlockStatus; /* Type of error information */
UINT32 RawDataOffset; /* Offset to raw error data */
UINT32 RawDataLength; /* Length of raw error data */
UINT32 DataLength; /* Length of generic error data */
UINT32 ErrorSeverity; /* Severity code */
} ACPI_BERT_REGION;
/* Values for BlockStatus flags above */
#define ACPI_BERT_UNCORRECTABLE (1)
#define ACPI_BERT_CORRECTABLE (1<<1)
#define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2)
#define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3)
#define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */
/* Values for ErrorSeverity above */
enum AcpiBertErrorSeverity
{
ACPI_BERT_ERROR_CORRECTABLE = 0,
ACPI_BERT_ERROR_FATAL = 1,
ACPI_BERT_ERROR_CORRECTED = 2,
ACPI_BERT_ERROR_NONE = 3,
ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */
};
/*
* Note: The generic error data that follows the ErrorSeverity field above
* uses the ACPI_HEST_GENERIC_DATA defined under the HEST table below
*/
/*******************************************************************************
*
* BGRT - Boot Graphics Resource Table (ACPI 5.0)
* Version 1
*
******************************************************************************/
typedef struct acpi_table_bgrt
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
UINT16 Version;
UINT8 Status;
UINT8 ImageType;
UINT64 ImageAddress;
UINT32 ImageOffsetX;
UINT32 ImageOffsetY;
} ACPI_TABLE_BGRT;
/* Flags for Status field above */
#define ACPI_BGRT_DISPLAYED (1)
#define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1)
/*******************************************************************************
*
* BOOT - Simple Boot Flag Table
* Version 1
*
* Conforms to the "Simple Boot Flag Specification", Version 2.1
*
******************************************************************************/
typedef struct acpi_table_boot
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
UINT8 CmosIndex; /* Index in CMOS RAM for the boot register */
UINT8 Reserved[3];
} ACPI_TABLE_BOOT;
/*******************************************************************************
*
* CDAT - Coherent Device Attribute Table
* Version 1
*
* Conforms to the "Coherent Device Attribute Table (CDAT) Specification
" (Revision 1.01, October 2020.)
*
******************************************************************************/
typedef struct acpi_table_cdat
{
UINT32 Length; /* Length of table in bytes, including this header */
UINT8 Revision; /* ACPI Specification minor version number */
UINT8 Checksum; /* To make sum of entire table == 0 */
UINT8 Reserved[6];
UINT32 Sequence; /* Used to detect runtime CDAT table changes */
} ACPI_TABLE_CDAT;
/* CDAT common subtable header */
typedef struct acpi_cdat_header
{
UINT8 Type;
UINT8 Reserved;
UINT16 Length;
} ACPI_CDAT_HEADER;
/* Values for Type field above */
enum AcpiCdatType
{
ACPI_CDAT_TYPE_DSMAS = 0,
ACPI_CDAT_TYPE_DSLBIS = 1,
ACPI_CDAT_TYPE_DSMSCIS = 2,
ACPI_CDAT_TYPE_DSIS = 3,
ACPI_CDAT_TYPE_DSEMTS = 4,
ACPI_CDAT_TYPE_SSLBIS = 5,
ACPI_CDAT_TYPE_RESERVED = 6 /* 6 through 0xFF are reserved */
};
/* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */
typedef struct acpi_cdat_dsmas
{
UINT8 DsmadHandle;
UINT8 Flags;
UINT16 Reserved;
UINT64 DpaBaseAddress;
UINT64 DpaLength;
} ACPI_CDAT_DSMAS;
/* Flags for subtable above */
#define ACPI_CDAT_DSMAS_NON_VOLATILE (1 << 2)
/* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */
typedef struct acpi_cdat_dslbis
{
UINT8 Handle;
UINT8 Flags; /* If Handle matches a DSMAS handle, the definition of this field matches
* Flags field in HMAT System Locality Latency */
UINT8 DataType;
UINT8 Reserved;
UINT64 EntryBaseUnit;
UINT16 Entry[3];
UINT16 Reserved2;
} ACPI_CDAT_DSLBIS;
/* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */
typedef struct acpi_cdat_dsmscis
{
UINT8 DsmasHandle;
UINT8 Reserved[3];
UINT64 SideCacheSize;
UINT32 CacheAttributes;
} ACPI_CDAT_DSMSCIS;
/* Subtable 3: Device Scoped Initiator Structure (DSIS) */
typedef struct acpi_cdat_dsis
{
UINT8 Flags;
UINT8 Handle;
UINT16 Reserved;
} ACPI_CDAT_DSIS;
/* Flags for above subtable */
#define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0)
/* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */
typedef struct acpi_cdat_dsemts
{
UINT8 DsmasHandle;
UINT8 MemoryType;
UINT16 Reserved;
UINT64 DpaOffset;
UINT64 RangeLength;
} ACPI_CDAT_DSEMTS;
/* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */
typedef struct acpi_cdat_sslbis
{
UINT8 DataType;
UINT8 Reserved[3];
UINT64 EntryBaseUnit;
} ACPI_CDAT_SSLBIS;
/* Sub-subtable for above, SslbeEntries field */
typedef struct acpi_cdat_sslbe
{
UINT16 PortxId;
UINT16 PortyId;
UINT16 LatencyOrBandwidth;
UINT16 Reserved;
} ACPI_CDAT_SSLBE;
#define ACPI_CDAT_SSLBIS_US_PORT 0x0100
#define ACPI_CDAT_SSLBIS_ANY_PORT 0xffff
/*******************************************************************************
*
* CEDT - CXL Early Discovery Table
* Version 1
*
* Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020)
*
******************************************************************************/
typedef struct acpi_table_cedt
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
} ACPI_TABLE_CEDT;
/* CEDT subtable header (Performance Record Structure) */
typedef struct acpi_cedt_header
{
UINT8 Type;
UINT8 Reserved;
UINT16 Length;
} ACPI_CEDT_HEADER;
/* Values for Type field above */
enum AcpiCedtType
{
ACPI_CEDT_TYPE_CHBS = 0,
ACPI_CEDT_TYPE_CFMWS = 1,
ACPI_CEDT_TYPE_CXIMS = 2,
ACPI_CEDT_TYPE_RDPAS = 3,
ACPI_CEDT_TYPE_RESERVED = 4,
};
/* Values for version field above */
#define ACPI_CEDT_CHBS_VERSION_CXL11 (0)
#define ACPI_CEDT_CHBS_VERSION_CXL20 (1)
/* Values for length field above */
#define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000)
#define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000)
/*
* CEDT subtables
*/
/* 0: CXL Host Bridge Structure */
typedef struct acpi_cedt_chbs
{
ACPI_CEDT_HEADER Header;
UINT32 Uid;
UINT32 CxlVersion;
UINT32 Reserved;
UINT64 Base;
UINT64 Length;
} ACPI_CEDT_CHBS;
/* 1: CXL Fixed Memory Window Structure */
typedef struct acpi_cedt_cfmws
{
ACPI_CEDT_HEADER Header;
UINT32 Reserved1;
UINT64 BaseHpa;
UINT64 WindowSize;
UINT8 InterleaveWays;
UINT8 InterleaveArithmetic;
UINT16 Reserved2;
UINT32 Granularity;
UINT16 Restrictions;
UINT16 QtgId;
UINT32 InterleaveTargets[];
} ACPI_CEDT_CFMWS;
typedef struct acpi_cedt_cfmws_target_element
{
UINT32 InterleaveTarget;
} ACPI_CEDT_CFMWS_TARGET_ELEMENT;
/* Values for Interleave Arithmetic field above */
#define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0)
#define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1)
/* Values for Restrictions field above */
#define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1)
#define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1<<1)
#define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2)
#define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3)
#define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4)
/* 2: CXL XOR Interleave Math Structure */
typedef struct acpi_cedt_cxims {
ACPI_CEDT_HEADER Header;
UINT16 Reserved1;
UINT8 Hbig;
UINT8 NrXormaps;
UINT64 XormapList[];
} ACPI_CEDT_CXIMS;
typedef struct acpi_cedt_cxims_target_element
{
UINT64 Xormap;
} ACPI_CEDT_CXIMS_TARGET_ELEMENT;
/* 3: CXL RCEC Downstream Port Association Structure */
struct acpi_cedt_rdpas {
ACPI_CEDT_HEADER Header;
UINT16 Segment;
UINT16 Bdf;
UINT8 Protocol;
UINT64 Address;
};
/* Masks for bdf field above */
#define ACPI_CEDT_RDPAS_BUS_MASK 0xff00
#define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8
#define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007
#define ACPI_CEDT_RDPAS_PROTOCOL_IO (0)
#define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1)
/*******************************************************************************
*
* CPEP - Corrected Platform Error Polling table (ACPI 4.0)
* Version 1
*
******************************************************************************/
typedef struct acpi_table_cpep
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
UINT64 Reserved;
} ACPI_TABLE_CPEP;
/* Subtable */
typedef struct acpi_cpep_polling
{
ACPI_SUBTABLE_HEADER Header;
UINT8 Id; /* Processor ID */
UINT8 Eid; /* Processor EID */
UINT32 Interval; /* Polling interval (msec) */
} ACPI_CPEP_POLLING;
/*******************************************************************************
*
* CSRT - Core System Resource Table
* Version 0
*
* Conforms to the "Core System Resource Table (CSRT)", November 14, 2011
*
******************************************************************************/
typedef struct acpi_table_csrt
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
} ACPI_TABLE_CSRT;
/* Resource Group subtable */
typedef struct acpi_csrt_group
{
UINT32 Length;
UINT32 VendorId;
UINT32 SubvendorId;
UINT16 DeviceId;
UINT16 SubdeviceId;
UINT16 Revision;
UINT16 Reserved;
UINT32 SharedInfoLength;
/* Shared data immediately follows (Length = SharedInfoLength) */
} ACPI_CSRT_GROUP;
/* Shared Info subtable */
typedef struct acpi_csrt_shared_info
{
UINT16 MajorVersion;
UINT16 MinorVersion;
UINT32 MmioBaseLow;
UINT32 MmioBaseHigh;
UINT32 GsiInterrupt;
UINT8 InterruptPolarity;
UINT8 InterruptMode;
UINT8 NumChannels;
UINT8 DmaAddressWidth;
UINT16 BaseRequestLine;
UINT16 NumHandshakeSignals;
UINT32 MaxBlockSize;
/* Resource descriptors immediately follow (Length = Group Length - SharedInfoLength) */
} ACPI_CSRT_SHARED_INFO;
/* Resource Descriptor subtable */
typedef struct acpi_csrt_descriptor
{
UINT32 Length;
UINT16 Type;
UINT16 Subtype;
UINT32 Uid;
/* Resource-specific information immediately follows */
} ACPI_CSRT_DESCRIPTOR;
/* Resource Types */
#define ACPI_CSRT_TYPE_INTERRUPT 0x0001
#define ACPI_CSRT_TYPE_TIMER 0x0002
#define ACPI_CSRT_TYPE_DMA 0x0003
/* Resource Subtypes */
#define ACPI_CSRT_XRUPT_LINE 0x0000
#define ACPI_CSRT_XRUPT_CONTROLLER 0x0001
#define ACPI_CSRT_TIMER 0x0000
#define ACPI_CSRT_DMA_CHANNEL 0x0000
#define ACPI_CSRT_DMA_CONTROLLER 0x0001
/*******************************************************************************
*
* DBG2 - Debug Port Table 2
* Version 0 (Both main table and subtables)
*
* Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020
*
******************************************************************************/
typedef struct acpi_table_dbg2
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
UINT32 InfoOffset;
UINT32 InfoCount;
} ACPI_TABLE_DBG2;
typedef struct acpi_dbg2_header
{
UINT32 InfoOffset;
UINT32 InfoCount;
} ACPI_DBG2_HEADER;
/* Debug Device Information Subtable */
typedef struct acpi_dbg2_device
{
UINT8 Revision;
UINT16 Length;
UINT8 RegisterCount; /* Number of BaseAddress registers */