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Invalid Vcomh deselect level register value 0x40 #42
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Erriez, A[6:4] V COMH deselect level As you say writing '40h' (0x40) to this address doesn't appear to be 'an option'. Based on lack of clarity and as you suggest, I would stick to one of the three levels given as reference, only write to A5 and A4, leave A6 out. But that makes you wonder what the Regulator output would be for other settings with A6 set. We can make several assumptions and one would be based on the entry in Table 11-1 Here, we see that the maximum VCOM == VCOMH is given as 0.9 x VCC which is not one of three in the examples in datasheet you refer to. The maximum shown there is 0.83xVCC. It's not difficult to imagine '100b 40h' next, on that list for 0.9xVCC, but there is no evidence to support this, unless someone has the ability to set it and take direct measurement from the circuit board. I would imagine 99% of LCD panels out there are going to work with one of three levels shown that the SSD1306 is able to generate for the high logic state of the Common rail of the LCD's drive signal level, VCOMH. I'm sure who ever carried the bug from one library to another has adhered to the appropriate GPL terms. Which coincidently shows the benefit of making it know where the source of our information comes from so that we can trace problems to their roots. If I were testing this system I would stick to the following; // If and only if that doesn't work, you could conditionally build your code depending on which setting you want to give a go... (note that #ifdefined, #elif and #endif may be different format in your compiler.) // ...continue your code here. What is probably most interesting here is that Figure 2 : Software Initialization Flow Chart does not refer to the 0xDB register for setting the VCOMH levels as part of the mandatory IC initialisation or Power up sequence. This could mean that the other option during start-up or initializing the LCD is not to write anything to register 0x40 and let the chip select the default value for this register (may be 0.65xVCC ??). So if you have a very common glass panel (LCD) then you could save yourself one instruction and processing time. |
Hi TamerTemel, Thanks for your detailed explanation. I did not notice the missing VCOMH initialization in the Software Initialization Flow Chart. Good catch. For now I choose the highest "official" value 011b 30h ~ 0.83 x VCC. I don't want to damage many display's after a long operation time. I'll send an email to Solomon Systech about this. |
Sorry for necroing an old issue but @Erriez have you got any response from them? In my testing with 2 SPI and 4 I2C SSD1306 display modules (purchased from various sellers from China), 40h gives maximum brightness. Going beyond 40h makes no brighter (I tried up to 70h, which is maximum possible). |
Hi Hazarkarabay, Thanks for your info. I received an answer from TamerTemel on 21 Nov 2015 (see above), but not from the manufacturer. Good to hear that it works for your displays. |
for everyone stumbling on this issue like I did, and who would like to know more about the subject: https://www.osram-os.com/Graphics/XPic2/00032223_0.pdf/4-Bit%20Driver%20Basic%20Register%20Setup.pdf |
SSD1306 datasheet https://www.adafruit.com/datasheets/SSD1306.pdf describes on page 32:
"Set VCOMH Deselect Level" register describes for bits [6:4]:
000b 00h ~ 0.65 x VCC
010b 20h ~ 0.77 x VCC (RESET)
011b 30h ~ 0.83 x VCC
The SSD1306 display initialization configures Vcomh register value 0x40 which is invalid:
ssd1306_command(SSD1306_SETVCOMDETECT); // 0xDB
ssd1306_command(0x40); // <- Invalid
This is copied to/from many other drivers such as u8glib. What's the reason to use value 0x40?
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