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So, I'm interpreting this to mean that, you create an 8 bit register m_axi_awlen_reg, and assign it the value of m_axi_awlen_next. However, I'm not sure what the 8'd0, does? I'm guessing it does something like assert the number of bits in m_axi_awlen_next? (I looked through verilog-std-1364-2005.pdf, eg section 6.2, 9.2, but wasn't able to find the relevant syntax).
The text was updated successfully, but these errors were encountered:
Hi, this isnt an issue, it's a question, about verilog, since you're using a notation I haven't seen before, and not quite sure how to Google.
At e.g.
verilog-axi/rtl/axi_fifo_wr.v
Line 183 in 25912d4
So, I'm interpreting this to mean that, you create an 8 bit register
m_axi_awlen_reg
, and assign it the value ofm_axi_awlen_next
. However, I'm not sure what the8'd0,
does? I'm guessing it does something like assert the number of bits inm_axi_awlen_next
? (I looked through verilog-std-1364-2005.pdf, eg section 6.2, 9.2, but wasn't able to find the relevant syntax).The text was updated successfully, but these errors were encountered: