forked from nwidger/nintengo
/
cnrom.go
122 lines (102 loc) · 2.32 KB
/
cnrom.go
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
package nes
import (
"fmt"
"github.com/nwidger/nintengo/rp2ago3"
)
type CNROMRegisters struct {
BankSelect uint8
}
type CNROM struct {
*ROMFile
Registers CNROMRegisters
}
func (reg *CNROMRegisters) Reset() {
reg.BankSelect = 0x00
}
func NewCNROM(romf *ROMFile) *CNROM {
cnrom := &CNROM{
ROMFile: romf,
}
cnrom.Registers.Reset()
return cnrom
}
func (cnrom *CNROM) String() string {
return cnrom.ROMFile.String() +
fmt.Sprintf("Mapper: 3 (CNROM)")
}
func (cnrom *CNROM) Mappings(which rp2ago3.Mapping) (fetch, store []uint16) {
fetch = []uint16{}
store = []uint16{}
switch which {
case rp2ago3.PPU:
if cnrom.CHRBanks > 0 {
// CHR bank 1
for i := uint32(0x0000); i <= 0x0fff; i++ {
fetch = append(fetch, uint16(i))
store = append(store, uint16(i))
}
// CHR bank 2
for i := uint32(0x1000); i <= 0x1fff; i++ {
fetch = append(fetch, uint16(i))
store = append(store, uint16(i))
}
}
case rp2ago3.CPU:
if cnrom.PRGBanks > 0 {
// PRG bank 1
for i := uint32(0x8000); i <= 0xbfff; i++ {
fetch = append(fetch, uint16(i))
store = append(store, uint16(i))
}
// PRG bank 2
for i := uint32(0xc000); i <= 0xffff; i++ {
fetch = append(fetch, uint16(i))
store = append(store, uint16(i))
}
}
}
return
}
func (cnrom *CNROM) Reset() {
cnrom.Registers.BankSelect = 0x00
}
func (cnrom *CNROM) Fetch(address uint16) (value uint8) {
switch {
// PPU only
case address >= 0x0000 && address <= 0x1fff:
if cnrom.CHRBanks > 0 {
value = cnrom.VROMBanks[cnrom.Registers.BankSelect][address]
}
// CPU only
case address >= 0x8000 && address <= 0xffff:
index := address & 0x3fff
switch {
// PRG bank 1
case address >= 0x8000 && address <= 0xbfff:
if cnrom.PRGBanks > 0 {
value = cnrom.ROMBanks[0][index]
}
// PRG bank 2
case address >= 0xc000 && address <= 0xffff:
if cnrom.PRGBanks > 0 {
value = cnrom.ROMBanks[cnrom.PRGBanks-1][index]
}
}
}
return
}
func (cnrom *CNROM) Store(address uint16, value uint8) (oldValue uint8) {
// PPU only
switch {
// CHR banks 1 & 2
case address >= 0x0000 && address <= 0x1fff:
if cnrom.CHRBanks > 0 {
cnrom.VROMBanks[cnrom.Registers.BankSelect][address] = value
}
// CPU only
// PRG banks 1 & 2
case address >= 0x8000 && address <= 0xffff:
cnrom.Registers.BankSelect = value & 0x03
}
return
}