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practical-minimum-2019-students
practical-minimum-2019-students PublicForked from panslava/practical-minimum-2019-students
practical-minimum-2019-students created by GitHub Classroom
Python
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scr1
scr1 PublicForked from syntacore/scr1
SCR1 is a high-quality open-source RISC-V MCU core in Verilog
SystemVerilog
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