tlsr82/serial: clear tx index also when uart_reset called. #7133
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FLY @LingaoM |
Otherwise, after the rx error occur, the tx output will be out of sequence, for example: normal log: [ 30.163000] 12345678abcdefgh [ 30.666000] 12345678abcdefgh [ 31.169000] 12345678abcdefgh [ 31.672000] 12345678abcdefgh [ 32.175000] 12345678abcdefgh [ 32.678000] 12345678abcdefgh [ 33.181000] 12345678abcdefgh error log: he 7 .20]0003 127456c8abgdefch gde [6.707002] 16345b78afcde fcde fghe10010] 5234a678ebcd 77 713 00]41238567dabchefgd che 7 .21]0003 127456c8abgdefch gde [8.709002] 16345b78afcde fcde Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
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xiaoxiang781216
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Sep 19, 2022
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Summary
Clear software tx index when uart_reset called.
Otherwise, after the rx error occur, the tx output will be out of sequence, for example:
normal log:
[ 30.163000] 12345678abcdefgh
[ 30.666000] 12345678abcdefgh
[ 31.169000] 12345678abcdefgh
[ 31.672000] 12345678abcdefgh
[ 32.175000] 12345678abcdefgh
[ 32.678000] 12345678abcdefgh
[ 33.181000] 12345678abcdefgh
error log:
he 7 .20]0003 127456c8abgdefch
gde [6.707002] 16345b78afcde
fcde
fghe10010] 5234a678ebcd
77 713 00]41238567dabchefgd
che 7 .21]0003 127456c8abgdefch
gde [8.709002] 16345b78afcde
fcde
Impact
tlsr82 serial
Testing
test with tlsr8278adk80d:nsh