STM32WL System Clock differs at boot/reset and after deepsleep

[hallard]

Description of defect

When the board is booting up of after a reset button push, sysclock is set to 4Mhz and immediately atfer first deepsleep Sysclock is back to 48MHz, I don't know if it is intentional, issue or just normal behavior.

Anyway it could be cause of my previous issue a boot #15463

Target(s) affected by this defect ?

STM32WL, may be others

Toolchain(s) (name and version) displaying this defect ?

What version of Mbed-os are you using (tag or sha) ?

mbed-os-99.99.99

What version(s) of tools are you using. List all that apply (E.g. mbed-cli)

MBED Studio V1.4.5

How is this defect reproduced ?

build an run following code

#include "mbed.h"
using namespace std::chrono;

EventQueue ev_queue(16 * EVENTS_EVENT_SIZE);

void show_sysclocks_freq()
{
  printf("SysClk=%dMHz  PCLK1=%dMHz  PCLK2=%dMHz\r\n", 
    (uint32_t) HAL_RCC_GetSysClockFreq() / 1000000, 
    (uint32_t) HAL_RCC_GetPCLK1Freq() / 1000000 , 
    (uint32_t) HAL_RCC_GetPCLK2Freq() / 1000000 );
}

int main()
{
  printf("\r\nStarting\r\n");
  show_sysclocks_freq();

  for (int i=0; i< 4 ; i++) {
    printf("Sleeping\r\n");
    ThisThread::sleep_for(1s);
    show_sysclocks_freq();
  }
  ev_queue.dispatch_forever();
}

result is as follow

Starting
SysClk=4MHz  PCLK1=4MHz  PCLK2=4MHz
Sleeping
SysClk=48MHz  PCLK1=48MHz  PCLK2=48MHz
Sleeping
SysClk=48MHz  PCLK1=48MHz  PCLK2=48MHz
Sleeping
SysClk=48MHz  PCLK1=48MHz  PCLK2=48MHz
Sleeping
SysClk=48MHz  PCLK1=48MHz  PCLK2=48MHz

Starting with a small deepsleep fix the issue

int main()
{
  ThisThread::sleep_for(10ms);
  printf("\r\nStarting\r\n");
  show_sysclocks_freq();

  for (int i=0; i< 4 ; i++) {
    printf("Sleeping\r\n");
    ThisThread::sleep_for(1s);
    show_sysclocks_freq();
  }
  ev_queue.dispatch_forever();
}

result is as follow

Starting
SysClk=48MHz  PCLK1=48MHz  PCLK2=48MHz
Sleeping
SysClk=48MHz  PCLK1=48MHz  PCLK2=48MHz
Sleeping
SysClk=48MHz  PCLK1=48MHz  PCLK2=48MHz
Sleeping
SysClk=48MHz  PCLK1=48MHz  PCLK2=48MHz
Sleeping
SysClk=48MHz  PCLK1=48MHz  PCLK2=48MHz

Please not that sleeping less than 8ms when starting does not resolve the issue, looks like some time is needed for clock going to 48MHz

[0xc0170]

cc @ARMmbed/team-st-mcd

[hallard]

In the meanwhile, I found the reason

On init, clock is setup to 4MHz see STM32Cube_FW/system_stm32wlxx.c

and After deepsleep, ForceOscOutofDeepSleep() is called and on this one, the clock is set back to 48MHz with RCC_MSIRANGE_11

RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11;

So I don't think it's a bug or whatsoever, but worth mentioning because running at 4MHz can have some side effect see #15463

I tried to slow down frequency (8Mhz, 16MHz, 24MHz, ...) to lower consumption in ForceOscOutofDeepSleep() but in this case for example, I2C Secure Element is unable to wake (ATECC608a) from sleep in mbed-cryptoauthlib, only way is to set to 48MHz

So quick and dirty fix is going to deepsleep at startup.

int main()
{
  // Go go speed cruise, Don't go below 8ms 
  // because it could stay at 4MHz (time to setup ?)
  ThisThread::sleep_for(10ms);
 ....
}