/
mini-codegen.c
2555 lines (2222 loc) · 69.1 KB
/
mini-codegen.c
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/*
* mini-codegen.c: Arch independent code generation functionality
*
* (C) 2003 Ximian, Inc.
*/
#include <string.h>
#include <math.h>
#ifdef HAVE_UNISTD_H
#include <unistd.h>
#endif
#include <mono/metadata/appdomain.h>
#include <mono/metadata/debug-helpers.h>
#include <mono/metadata/threads.h>
#include <mono/metadata/profiler-private.h>
#include <mono/utils/mono-math.h>
#include "mini.h"
#include "trace.h"
#include "mini-arch.h"
#ifndef MONO_MAX_XREGS
#define MONO_MAX_XREGS 0
#define MONO_ARCH_CALLEE_SAVED_XREGS 0
#define MONO_ARCH_CALLEE_XREGS 0
#endif
#define MONO_ARCH_BANK_MIRRORED -2
#ifdef MONO_ARCH_USE_SHARED_FP_SIMD_BANK
#ifndef MONO_ARCH_NEED_SIMD_BANK
#error "MONO_ARCH_USE_SHARED_FP_SIMD_BANK needs MONO_ARCH_NEED_SIMD_BANK to work"
#endif
#define get_mirrored_bank(bank) (((bank) == MONO_REG_SIMD ) ? MONO_REG_DOUBLE : (((bank) == MONO_REG_DOUBLE ) ? MONO_REG_SIMD : -1))
#define is_hreg_mirrored(rs, bank, hreg) ((rs)->symbolic [(bank)] [(hreg)] == MONO_ARCH_BANK_MIRRORED)
#else
#define get_mirrored_bank(bank) (-1)
#define is_hreg_mirrored(rs, bank, hreg) (0)
#endif
/* If the bank is mirrored return the true logical bank that the register in the
* physical register bank is allocated to.
*/
static inline int translate_bank (MonoRegState *rs, int bank, int hreg) {
return is_hreg_mirrored (rs, bank, hreg) ? get_mirrored_bank (bank) : bank;
}
/*
* Every hardware register belongs to a register type or register bank. bank 0
* contains the int registers, bank 1 contains the fp registers.
* int registers are used 99% of the time, so they are special cased in a lot of
* places.
*/
static const int regbank_size [] = {
MONO_MAX_IREGS,
MONO_MAX_FREGS,
MONO_MAX_XREGS
};
static const int regbank_load_ops [] = {
OP_LOADR_MEMBASE,
OP_LOADR8_MEMBASE,
OP_LOADX_MEMBASE
};
static const int regbank_store_ops [] = {
OP_STORER_MEMBASE_REG,
OP_STORER8_MEMBASE_REG,
OP_STOREX_MEMBASE
};
static const int regbank_move_ops [] = {
OP_MOVE,
OP_FMOVE,
OP_XMOVE
};
#define regmask(reg) (((regmask_t)1) << (reg))
static const regmask_t regbank_callee_saved_regs [] = {
MONO_ARCH_CALLEE_SAVED_REGS,
MONO_ARCH_CALLEE_SAVED_FREGS,
MONO_ARCH_CALLEE_SAVED_XREGS,
};
static const regmask_t regbank_callee_regs [] = {
MONO_ARCH_CALLEE_REGS,
MONO_ARCH_CALLEE_FREGS,
MONO_ARCH_CALLEE_XREGS,
};
static const int regbank_spill_var_size[] = {
sizeof (mgreg_t),
sizeof (double),
16 /*FIXME make this a constant. Maybe MONO_ARCH_SIMD_VECTOR_SIZE? */
};
#define DEBUG(a) MINI_DEBUG(cfg->verbose_level, 3, a;)
static inline GSList*
g_slist_append_mempool (MonoMemPool *mp, GSList *list, gpointer data)
{
GSList *new_list;
GSList *last;
new_list = mono_mempool_alloc (mp, sizeof (GSList));
new_list->data = data;
new_list->next = NULL;
if (list) {
last = list;
while (last->next)
last = last->next;
last->next = new_list;
return list;
} else
return new_list;
}
static inline void
mono_regstate_assign (MonoRegState *rs)
{
#ifdef MONO_ARCH_USE_SHARED_FP_SIMD_BANK
/* The regalloc may fail if fp and simd logical regbanks share the same physical reg bank and
* if the values here are not the same.
*/
g_assert(regbank_callee_regs [MONO_REG_SIMD] == regbank_callee_regs [MONO_REG_DOUBLE]);
g_assert(regbank_callee_saved_regs [MONO_REG_SIMD] == regbank_callee_saved_regs [MONO_REG_DOUBLE]);
g_assert(regbank_size [MONO_REG_SIMD] == regbank_size [MONO_REG_DOUBLE]);
#endif
if (rs->next_vreg > rs->vassign_size) {
g_free (rs->vassign);
rs->vassign_size = MAX (rs->next_vreg, 256);
rs->vassign = g_malloc (rs->vassign_size * sizeof (gint32));
}
memset (rs->isymbolic, 0, MONO_MAX_IREGS * sizeof (rs->isymbolic [0]));
memset (rs->fsymbolic, 0, MONO_MAX_FREGS * sizeof (rs->fsymbolic [0]));
rs->symbolic [0] = rs->isymbolic;
rs->symbolic [1] = rs->fsymbolic;
#ifdef MONO_ARCH_NEED_SIMD_BANK
memset (rs->xsymbolic, 0, MONO_MAX_XREGS * sizeof (rs->xsymbolic [0]));
rs->symbolic [2] = rs->xsymbolic;
#endif
}
static inline int
mono_regstate_alloc_int (MonoRegState *rs, regmask_t allow)
{
regmask_t mask = allow & rs->ifree_mask;
#if defined(__x86_64__) && defined(__GNUC__)
{
guint64 i;
if (mask == 0)
return -1;
__asm__("bsfq %1,%0\n\t"
: "=r" (i) : "rm" (mask));
rs->ifree_mask &= ~ ((regmask_t)1 << i);
return i;
}
#else
int i;
for (i = 0; i < MONO_MAX_IREGS; ++i) {
if (mask & ((regmask_t)1 << i)) {
rs->ifree_mask &= ~ ((regmask_t)1 << i);
return i;
}
}
return -1;
#endif
}
static inline void
mono_regstate_free_int (MonoRegState *rs, int reg)
{
if (reg >= 0) {
rs->ifree_mask |= (regmask_t)1 << reg;
rs->isymbolic [reg] = 0;
}
}
static inline int
mono_regstate_alloc_general (MonoRegState *rs, regmask_t allow, int bank)
{
int i;
int mirrored_bank;
regmask_t mask = allow & rs->free_mask [bank];
for (i = 0; i < regbank_size [bank]; ++i) {
if (mask & ((regmask_t)1 << i)) {
rs->free_mask [bank] &= ~ ((regmask_t)1 << i);
mirrored_bank = get_mirrored_bank (bank);
if (mirrored_bank == -1)
return i;
rs->free_mask [mirrored_bank] = rs->free_mask [bank];
return i;
}
}
return -1;
}
static inline void
mono_regstate_free_general (MonoRegState *rs, int reg, int bank)
{
int mirrored_bank;
if (reg >= 0) {
rs->free_mask [bank] |= (regmask_t)1 << reg;
rs->symbolic [bank][reg] = 0;
mirrored_bank = get_mirrored_bank (bank);
if (mirrored_bank == -1)
return;
rs->free_mask [mirrored_bank] = rs->free_mask [bank];
rs->symbolic [mirrored_bank][reg] = 0;
}
}
const char*
mono_regname_full (int reg, int bank)
{
if (G_UNLIKELY (bank)) {
#if MONO_ARCH_NEED_SIMD_BANK
if (bank == 2)
return mono_arch_xregname (reg);
#endif
g_assert (bank == 1);
return mono_arch_fregname (reg);
} else {
return mono_arch_regname (reg);
}
}
void
mono_call_inst_add_outarg_reg (MonoCompile *cfg, MonoCallInst *call, int vreg, int hreg, int bank)
{
guint32 regpair;
regpair = (((guint32)hreg) << 24) + vreg;
if (G_UNLIKELY (bank)) {
g_assert (vreg >= regbank_size [bank]);
g_assert (hreg < regbank_size [bank]);
call->used_fregs |= 1 << hreg;
call->out_freg_args = g_slist_append_mempool (cfg->mempool, call->out_freg_args, (gpointer)(gssize)(regpair));
} else {
g_assert (vreg >= MONO_MAX_IREGS);
g_assert (hreg < MONO_MAX_IREGS);
call->used_iregs |= 1 << hreg;
call->out_ireg_args = g_slist_append_mempool (cfg->mempool, call->out_ireg_args, (gpointer)(gssize)(regpair));
}
}
static void
resize_spill_info (MonoCompile *cfg, int bank)
{
MonoSpillInfo *orig_info = cfg->spill_info [bank];
int orig_len = cfg->spill_info_len [bank];
int new_len = orig_len ? orig_len * 2 : 16;
MonoSpillInfo *new_info;
int i;
g_assert (bank < MONO_NUM_REGBANKS);
new_info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo) * new_len);
if (orig_info)
memcpy (new_info, orig_info, sizeof (MonoSpillInfo) * orig_len);
for (i = orig_len; i < new_len; ++i)
new_info [i].offset = -1;
cfg->spill_info [bank] = new_info;
cfg->spill_info_len [bank] = new_len;
}
/*
* returns the offset used by spillvar. It allocates a new
* spill variable if necessary.
*/
static inline int
mono_spillvar_offset (MonoCompile *cfg, int spillvar, int bank)
{
MonoSpillInfo *info;
int size;
if (G_UNLIKELY (spillvar >= (cfg->spill_info_len [bank]))) {
while (spillvar >= cfg->spill_info_len [bank])
resize_spill_info (cfg, bank);
}
/*
* Allocate separate spill slots for fp/non-fp variables since most processors prefer it.
*/
info = &cfg->spill_info [bank][spillvar];
if (info->offset == -1) {
cfg->stack_offset += sizeof (mgreg_t) - 1;
cfg->stack_offset &= ~(sizeof (mgreg_t) - 1);
g_assert (bank < MONO_NUM_REGBANKS);
if (G_UNLIKELY (bank))
size = regbank_spill_var_size [bank];
else
size = sizeof (mgreg_t);
if (cfg->flags & MONO_CFG_HAS_SPILLUP) {
cfg->stack_offset += size - 1;
cfg->stack_offset &= ~(size - 1);
info->offset = cfg->stack_offset;
cfg->stack_offset += size;
} else {
cfg->stack_offset += size - 1;
cfg->stack_offset &= ~(size - 1);
cfg->stack_offset += size;
info->offset = - cfg->stack_offset;
}
}
return info->offset;
}
#define is_hard_ireg(r) ((r) >= 0 && (r) < MONO_MAX_IREGS)
#define is_hard_freg(r) ((r) >= 0 && (r) < MONO_MAX_FREGS)
#define is_global_ireg(r) (is_hard_ireg ((r)) && (MONO_ARCH_CALLEE_SAVED_REGS & (regmask (r))))
#define is_local_ireg(r) (is_hard_ireg ((r)) && (MONO_ARCH_CALLEE_REGS & (regmask (r))))
#define is_global_freg(r) (is_hard_freg ((r)) && (MONO_ARCH_CALLEE_SAVED_FREGS & (regmask (r))))
#define is_local_freg(r) (is_hard_freg ((r)) && (MONO_ARCH_CALLEE_FREGS & (regmask (r))))
#define is_hard_reg(r,bank) (G_UNLIKELY (bank) ? ((r) >= 0 && (r) < regbank_size [bank]) : ((r) < MONO_MAX_IREGS))
#define is_soft_reg(r,bank) (!is_hard_reg((r),(bank)))
#define is_global_reg(r,bank) (G_UNLIKELY (bank) ? (is_hard_reg ((r), (bank)) && (regbank_callee_saved_regs [bank] & regmask (r))) : is_global_ireg (r))
#define is_local_reg(r,bank) (G_UNLIKELY (bank) ? (is_hard_reg ((r), (bank)) && (regbank_callee_regs [bank] & regmask (r))) : is_local_ireg (r))
#define reg_is_freeable(r,bank) (G_UNLIKELY (bank) ? is_local_reg ((r), (bank)) : is_local_ireg ((r)))
#ifndef MONO_ARCH_INST_IS_FLOAT
#define MONO_ARCH_INST_IS_FLOAT(desc) ((desc) == 'f')
#endif
#define reg_is_fp(desc) (MONO_ARCH_INST_IS_FLOAT (desc))
#define dreg_is_fp(spec) (MONO_ARCH_INST_IS_FLOAT (spec [MONO_INST_DEST]))
#define sreg_is_fp(n,spec) (MONO_ARCH_INST_IS_FLOAT (spec [MONO_INST_SRC1+(n)]))
#define sreg1_is_fp(spec) sreg_is_fp (0,(spec))
#define sreg2_is_fp(spec) sreg_is_fp (1,(spec))
#define reg_is_simd(desc) ((desc) == 'x')
#ifdef MONO_ARCH_NEED_SIMD_BANK
#define reg_bank(desc) (G_UNLIKELY (reg_is_fp (desc)) ? MONO_REG_DOUBLE : G_UNLIKELY (reg_is_simd(desc)) ? MONO_REG_SIMD : MONO_REG_INT)
#else
#define reg_bank(desc) reg_is_fp ((desc))
#endif
#define sreg_bank(n,spec) reg_bank ((spec)[MONO_INST_SRC1+(n)])
#define sreg1_bank(spec) sreg_bank (0, (spec))
#define sreg2_bank(spec) sreg_bank (1, (spec))
#define dreg_bank(spec) reg_bank ((spec)[MONO_INST_DEST])
#define sreg_bank_ins(n,ins) sreg_bank ((n), ins_get_spec ((ins)->opcode))
#define sreg1_bank_ins(ins) sreg_bank_ins (0, (ins))
#define sreg2_bank_ins(ins) sreg_bank_ins (1, (ins))
#define dreg_bank_ins(ins) dreg_bank (ins_get_spec ((ins)->opcode))
#define regpair_reg2_mask(desc,hreg1) ((MONO_ARCH_INST_REGPAIR_REG2 (desc,hreg1) != -1) ? (regmask (MONO_ARCH_INST_REGPAIR_REG2 (desc,hreg1))) : MONO_ARCH_CALLEE_REGS)
#ifdef MONO_ARCH_IS_GLOBAL_IREG
#undef is_global_ireg
#define is_global_ireg(reg) MONO_ARCH_IS_GLOBAL_IREG ((reg))
#endif
typedef struct {
int born_in;
int killed_in;
/* Not (yet) used */
//int last_use;
//int prev_use;
regmask_t preferred_mask; /* the hreg where the register should be allocated, or 0 */
} RegTrack;
#ifndef DISABLE_LOGGING
void
mono_print_ins_index (int i, MonoInst *ins)
{
const char *spec = ins_get_spec (ins->opcode);
int num_sregs, j;
int sregs [MONO_MAX_SRC_REGS];
if (i != -1)
printf ("\t%-2d %s", i, mono_inst_name (ins->opcode));
else
printf (" %s", mono_inst_name (ins->opcode));
if (spec == MONO_ARCH_CPU_SPEC) {
/* This is a lowered opcode */
if (ins->dreg != -1)
printf (" R%d <-", ins->dreg);
if (ins->sreg1 != -1)
printf (" R%d", ins->sreg1);
if (ins->sreg2 != -1)
printf (" R%d", ins->sreg2);
if (ins->sreg3 != -1)
printf (" R%d", ins->sreg3);
switch (ins->opcode) {
case OP_LBNE_UN:
case OP_LBEQ:
case OP_LBLT:
case OP_LBLT_UN:
case OP_LBGT:
case OP_LBGT_UN:
case OP_LBGE:
case OP_LBGE_UN:
case OP_LBLE:
case OP_LBLE_UN:
if (!ins->inst_false_bb)
printf (" [B%d]", ins->inst_true_bb->block_num);
else
printf (" [B%dB%d]", ins->inst_true_bb->block_num, ins->inst_false_bb->block_num);
break;
case OP_PHI:
case OP_VPHI:
case OP_XPHI:
case OP_FPHI: {
int i;
printf (" [%d (", (int)ins->inst_c0);
for (i = 0; i < ins->inst_phi_args [0]; i++) {
if (i)
printf (", ");
printf ("R%d", ins->inst_phi_args [i + 1]);
}
printf (")]");
break;
}
case OP_LDADDR:
case OP_OUTARG_VTRETADDR:
printf (" R%d", ((MonoInst*)ins->inst_p0)->dreg);
break;
case OP_REGOFFSET:
printf (" + 0x%lx", (long)ins->inst_offset);
break;
default:
break;
}
printf ("\n");
//g_error ("Unknown opcode: %s\n", mono_inst_name (ins->opcode));
return;
}
if (spec [MONO_INST_DEST]) {
int bank = dreg_bank (spec);
if (is_soft_reg (ins->dreg, bank)) {
if (spec [MONO_INST_DEST] == 'b') {
if (ins->inst_offset == 0)
printf (" [R%d] <-", ins->dreg);
else
printf (" [R%d + 0x%lx] <-", ins->dreg, (long)ins->inst_offset);
}
else
printf (" R%d <-", ins->dreg);
} else if (spec [MONO_INST_DEST] == 'b') {
if (ins->inst_offset == 0)
printf (" [%s] <-", mono_arch_regname (ins->dreg));
else
printf (" [%s + 0x%lx] <-", mono_arch_regname (ins->dreg), (long)ins->inst_offset);
} else
printf (" %s <-", mono_regname_full (ins->dreg, bank));
}
if (spec [MONO_INST_SRC1]) {
int bank = sreg1_bank (spec);
if (is_soft_reg (ins->sreg1, bank)) {
if (spec [MONO_INST_SRC1] == 'b')
printf (" [R%d + 0x%lx]", ins->sreg1, (long)ins->inst_offset);
else
printf (" R%d", ins->sreg1);
} else if (spec [MONO_INST_SRC1] == 'b')
printf (" [%s + 0x%lx]", mono_arch_regname (ins->sreg1), (long)ins->inst_offset);
else
printf (" %s", mono_regname_full (ins->sreg1, bank));
}
num_sregs = mono_inst_get_src_registers (ins, sregs);
for (j = 1; j < num_sregs; ++j) {
int bank = sreg_bank (j, spec);
if (is_soft_reg (sregs [j], bank))
printf (" R%d", sregs [j]);
else
printf (" %s", mono_regname_full (sregs [j], bank));
}
switch (ins->opcode) {
case OP_ICONST:
printf (" [%d]", (int)ins->inst_c0);
break;
#if defined(TARGET_X86) || defined(TARGET_AMD64)
case OP_X86_PUSH_IMM:
#endif
case OP_ICOMPARE_IMM:
case OP_COMPARE_IMM:
case OP_IADD_IMM:
case OP_ISUB_IMM:
case OP_IAND_IMM:
case OP_IOR_IMM:
case OP_IXOR_IMM:
printf (" [%d]", (int)ins->inst_imm);
break;
case OP_ADD_IMM:
case OP_LADD_IMM:
printf (" [%d]", (int)(gssize)ins->inst_p1);
break;
case OP_I8CONST:
printf (" [%lld]", (long long)ins->inst_l);
break;
case OP_R8CONST:
printf (" [%f]", *(double*)ins->inst_p0);
break;
case OP_R4CONST:
printf (" [%f]", *(float*)ins->inst_p0);
break;
case CEE_CALL:
case CEE_CALLVIRT:
case OP_CALL:
case OP_CALL_MEMBASE:
case OP_CALL_REG:
case OP_FCALL:
case OP_FCALLVIRT:
case OP_LCALL:
case OP_LCALLVIRT:
case OP_VCALL:
case OP_VCALLVIRT:
case OP_VCALL_REG:
case OP_VCALL_MEMBASE:
case OP_VCALL2:
case OP_VCALL2_REG:
case OP_VCALL2_MEMBASE:
case OP_VOIDCALL:
case OP_VOIDCALL_MEMBASE:
case OP_VOIDCALLVIRT: {
MonoCallInst *call = (MonoCallInst*)ins;
GSList *list;
if (ins->opcode == OP_VCALL || ins->opcode == OP_VCALL_REG || ins->opcode == OP_VCALL_MEMBASE) {
/*
* These are lowered opcodes, but they are in the .md files since the old
* JIT passes them to backends.
*/
if (ins->dreg != -1)
printf (" R%d <-", ins->dreg);
}
if (call->method) {
char *full_name = mono_method_full_name (call->method, TRUE);
printf (" [%s]", full_name);
g_free (full_name);
} else if (call->fptr) {
MonoJitICallInfo *info = mono_find_jit_icall_by_addr (call->fptr);
if (info)
printf (" [%s]", info->name);
}
list = call->out_ireg_args;
while (list) {
guint32 regpair;
int reg, hreg;
regpair = (guint32)(gssize)(list->data);
hreg = regpair >> 24;
reg = regpair & 0xffffff;
printf (" [%s <- R%d]", mono_arch_regname (hreg), reg);
list = g_slist_next (list);
}
break;
}
case OP_BR:
case OP_CALL_HANDLER:
printf (" [B%d]", ins->inst_target_bb->block_num);
break;
case CEE_BNE_UN:
case CEE_BEQ:
case CEE_BLT:
case CEE_BLT_UN:
case CEE_BGT:
case CEE_BGT_UN:
case CEE_BGE:
case CEE_BGE_UN:
case CEE_BLE:
case CEE_BLE_UN:
case OP_IBNE_UN:
case OP_IBEQ:
case OP_IBLT:
case OP_IBLT_UN:
case OP_IBGT:
case OP_IBGT_UN:
case OP_IBGE:
case OP_IBGE_UN:
case OP_IBLE:
case OP_IBLE_UN:
case OP_LBNE_UN:
case OP_LBEQ:
case OP_LBLT:
case OP_LBLT_UN:
case OP_LBGT:
case OP_LBGT_UN:
case OP_LBGE:
case OP_LBGE_UN:
case OP_LBLE:
case OP_LBLE_UN:
if (!ins->inst_false_bb)
printf (" [B%d]", ins->inst_true_bb->block_num);
else
printf (" [B%dB%d]", ins->inst_true_bb->block_num, ins->inst_false_bb->block_num);
break;
case OP_LIVERANGE_START:
case OP_LIVERANGE_END:
printf (" R%d", (int)ins->inst_c1);
break;
default:
break;
}
if (spec [MONO_INST_CLOB])
printf (" clobbers: %c", spec [MONO_INST_CLOB]);
printf ("\n");
}
static void
print_regtrack (RegTrack *t, int num)
{
int i;
char buf [32];
const char *r;
for (i = 0; i < num; ++i) {
if (!t [i].born_in)
continue;
if (i >= MONO_MAX_IREGS) {
g_snprintf (buf, sizeof(buf), "R%d", i);
r = buf;
} else
r = mono_arch_regname (i);
printf ("liveness: %s [%d - %d]\n", r, t [i].born_in, t[i].killed_in);
}
}
#else
void
mono_print_ins_index (int i, MonoInst *ins)
{
}
#endif /* DISABLE_LOGGING */
void
mono_print_ins (MonoInst *ins)
{
mono_print_ins_index (-1, ins);
}
static inline void
insert_before_ins (MonoBasicBlock *bb, MonoInst *ins, MonoInst* to_insert)
{
/*
* If this function is called multiple times, the new instructions are inserted
* in the proper order.
*/
mono_bblock_insert_before_ins (bb, ins, to_insert);
}
static inline void
insert_after_ins (MonoBasicBlock *bb, MonoInst *ins, MonoInst **last, MonoInst* to_insert)
{
/*
* If this function is called multiple times, the new instructions are inserted in
* proper order.
*/
mono_bblock_insert_after_ins (bb, *last, to_insert);
*last = to_insert;
}
/*
* Force the spilling of the variable in the symbolic register 'reg'.
*/
static int
get_register_force_spilling (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, int reg, int bank)
{
MonoInst *load;
int i, sel, spill;
int *symbolic;
MonoRegState *rs = cfg->rs;
symbolic = rs->symbolic [bank];
sel = rs->vassign [reg];
/* the vreg we need to spill lives in another logical reg bank */
bank = translate_bank (cfg->rs, bank, sel);
/*i = rs->isymbolic [sel];
g_assert (i == reg);*/
i = reg;
spill = ++cfg->spill_count;
rs->vassign [i] = -spill - 1;
if (G_UNLIKELY (bank))
mono_regstate_free_general (rs, sel, bank);
else
mono_regstate_free_int (rs, sel);
/* we need to create a spill var and insert a load to sel after the current instruction */
MONO_INST_NEW (cfg, load, regbank_load_ops [bank]);
load->dreg = sel;
load->inst_basereg = cfg->frame_reg;
load->inst_offset = mono_spillvar_offset (cfg, spill, bank);
insert_after_ins (bb, ins, last, load);
DEBUG (printf ("SPILLED LOAD (%d at 0x%08lx(%%ebp)) R%d (freed %s)\n", spill, (long)load->inst_offset, i, mono_regname_full (sel, bank)));
if (G_UNLIKELY (bank))
i = mono_regstate_alloc_general (rs, regmask (sel), bank);
else
i = mono_regstate_alloc_int (rs, regmask (sel));
g_assert (i == sel);
return sel;
}
/* This isn't defined on older glib versions and on some platforms */
#ifndef G_GUINT64_FORMAT
#define G_GUINT64_FORMAT "ul"
#endif
static int
get_register_spilling (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, regmask_t regmask, int reg, int bank)
{
MonoInst *load;
int i, sel, spill, num_sregs;
int sregs [MONO_MAX_SRC_REGS];
int *symbolic;
MonoRegState *rs = cfg->rs;
symbolic = rs->symbolic [bank];
g_assert (bank < MONO_NUM_REGBANKS);
DEBUG (printf ("\tstart regmask to assign R%d: 0x%08" G_GUINT64_FORMAT " (R%d <- R%d R%d R%d)\n", reg, (guint64)regmask, ins->dreg, ins->sreg1, ins->sreg2, ins->sreg3));
/* exclude the registers in the current instruction */
num_sregs = mono_inst_get_src_registers (ins, sregs);
for (i = 0; i < num_sregs; ++i) {
if ((sreg_bank_ins (i, ins) == bank) && (reg != sregs [i]) && (reg_is_freeable (sregs [i], bank) || (is_soft_reg (sregs [i], bank) && rs->vassign [sregs [i]] >= 0))) {
if (is_soft_reg (sregs [i], bank))
regmask &= ~ (regmask (rs->vassign [sregs [i]]));
else
regmask &= ~ (regmask (sregs [i]));
DEBUG (printf ("\t\texcluding sreg%d %s %d\n", i + 1, mono_regname_full (sregs [i], bank), sregs [i]));
}
}
if ((dreg_bank_ins (ins) == bank) && (reg != ins->dreg) && reg_is_freeable (ins->dreg, bank)) {
regmask &= ~ (regmask (ins->dreg));
DEBUG (printf ("\t\texcluding dreg %s\n", mono_regname_full (ins->dreg, bank)));
}
DEBUG (printf ("\t\tavailable regmask: 0x%08" G_GUINT64_FORMAT "\n", (guint64)regmask));
g_assert (regmask); /* need at least a register we can free */
sel = 0;
/* we should track prev_use and spill the register that's farther */
if (G_UNLIKELY (bank)) {
for (i = 0; i < regbank_size [bank]; ++i) {
if (regmask & (regmask (i))) {
sel = i;
/* the vreg we need to load lives in another logical bank */
bank = translate_bank (cfg->rs, bank, sel);
DEBUG (printf ("\t\tselected register %s has assignment %d\n", mono_regname_full (sel, bank), rs->symbolic [bank] [sel]));
break;
}
}
i = rs->symbolic [bank] [sel];
spill = ++cfg->spill_count;
rs->vassign [i] = -spill - 1;
mono_regstate_free_general (rs, sel, bank);
}
else {
for (i = 0; i < MONO_MAX_IREGS; ++i) {
if (regmask & (regmask (i))) {
sel = i;
DEBUG (printf ("\t\tselected register %s has assignment %d\n", mono_arch_regname (sel), rs->isymbolic [sel]));
break;
}
}
i = rs->isymbolic [sel];
spill = ++cfg->spill_count;
rs->vassign [i] = -spill - 1;
mono_regstate_free_int (rs, sel);
}
/* we need to create a spill var and insert a load to sel after the current instruction */
MONO_INST_NEW (cfg, load, regbank_load_ops [bank]);
load->dreg = sel;
load->inst_basereg = cfg->frame_reg;
load->inst_offset = mono_spillvar_offset (cfg, spill, bank);
insert_after_ins (bb, ins, last, load);
DEBUG (printf ("\tSPILLED LOAD (%d at 0x%08lx(%%ebp)) R%d (freed %s)\n", spill, (long)load->inst_offset, i, mono_regname_full (sel, bank)));
if (G_UNLIKELY (bank))
i = mono_regstate_alloc_general (rs, regmask (sel), bank);
else
i = mono_regstate_alloc_int (rs, regmask (sel));
g_assert (i == sel);
return sel;
}
static void
free_up_reg (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, int hreg, int bank)
{
if (G_UNLIKELY (bank)) {
if (!(cfg->rs->free_mask [1] & (regmask (hreg)))) {
bank = translate_bank (cfg->rs, bank, hreg);
DEBUG (printf ("\tforced spill of R%d\n", cfg->rs->symbolic [bank] [hreg]));
get_register_force_spilling (cfg, bb, last, ins, cfg->rs->symbolic [bank] [hreg], bank);
mono_regstate_free_general (cfg->rs, hreg, bank);
}
}
else {
if (!(cfg->rs->ifree_mask & (regmask (hreg)))) {
DEBUG (printf ("\tforced spill of R%d\n", cfg->rs->isymbolic [hreg]));
get_register_force_spilling (cfg, bb, last, ins, cfg->rs->isymbolic [hreg], bank);
mono_regstate_free_int (cfg->rs, hreg);
}
}
}
static MonoInst*
create_copy_ins (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, int dest, int src, MonoInst *ins, const unsigned char *ip, int bank)
{
MonoInst *copy;
MONO_INST_NEW (cfg, copy, regbank_move_ops [bank]);
copy->dreg = dest;
copy->sreg1 = src;
copy->cil_code = ip;
if (ins) {
mono_bblock_insert_after_ins (bb, ins, copy);
*last = copy;
}
DEBUG (printf ("\tforced copy from %s to %s\n", mono_regname_full (src, bank), mono_regname_full (dest, bank)));
return copy;
}
static MonoInst*
create_spilled_store (MonoCompile *cfg, MonoBasicBlock *bb, int spill, int reg, int prev_reg, MonoInst **last, MonoInst *ins, int bank)
{
MonoInst *store;
MONO_INST_NEW (cfg, store, regbank_store_ops [bank]);
store->sreg1 = reg;
store->inst_destbasereg = cfg->frame_reg;
store->inst_offset = mono_spillvar_offset (cfg, spill, bank);
if (ins) {
mono_bblock_insert_after_ins (bb, ins, store);
*last = store;
}
DEBUG (printf ("\tSPILLED STORE (%d at 0x%08lx(%%ebp)) R%d (from %s)\n", spill, (long)store->inst_offset, prev_reg, mono_regname_full (reg, bank)));
return store;
}
/* flags used in reginfo->flags */
enum {
MONO_FP_NEEDS_LOAD_SPILL = regmask (0),
MONO_FP_NEEDS_SPILL = regmask (1),
MONO_FP_NEEDS_LOAD = regmask (2)
};
static inline int
alloc_int_reg (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, regmask_t dest_mask, int sym_reg, RegTrack *info)
{
int val;
if (info && info->preferred_mask) {
val = mono_regstate_alloc_int (cfg->rs, info->preferred_mask & dest_mask);
if (val >= 0) {
DEBUG (printf ("\tallocated preferred reg R%d to %s\n", sym_reg, mono_arch_regname (val)));
return val;
}
}
val = mono_regstate_alloc_int (cfg->rs, dest_mask);
if (val < 0)
val = get_register_spilling (cfg, bb, last, ins, dest_mask, sym_reg, 0);
return val;
}
static inline int
alloc_general_reg (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, regmask_t dest_mask, int sym_reg, int bank)
{
int val;
val = mono_regstate_alloc_general (cfg->rs, dest_mask, bank);
if (val < 0)
val = get_register_spilling (cfg, bb, last, ins, dest_mask, sym_reg, bank);
return val;
}
static inline int
alloc_reg (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, regmask_t dest_mask, int sym_reg, RegTrack *info, int bank)
{
if (G_UNLIKELY (bank))
return alloc_general_reg (cfg, bb, last, ins, dest_mask, sym_reg, bank);
else
return alloc_int_reg (cfg, bb, last, ins, dest_mask, sym_reg, info);
}
static inline void
assign_reg (MonoCompile *cfg, MonoRegState *rs, int reg, int hreg, int bank)
{
if (G_UNLIKELY (bank)) {
int mirrored_bank;
g_assert (reg >= regbank_size [bank]);
g_assert (hreg < regbank_size [bank]);
g_assert (! is_global_freg (hreg));
rs->vassign [reg] = hreg;
rs->symbolic [bank] [hreg] = reg;
rs->free_mask [bank] &= ~ (regmask (hreg));
mirrored_bank = get_mirrored_bank (bank);
if (mirrored_bank == -1)
return;
/* Make sure the other logical reg bank that this bank shares
* a single hard reg bank knows that this hard reg is not free.
*/
rs->free_mask [mirrored_bank] = rs->free_mask [bank];
/* Mark the other logical bank that the this bank shares
* a single hard reg bank with as mirrored.
*/
rs->symbolic [mirrored_bank] [hreg] = MONO_ARCH_BANK_MIRRORED;
}
else {
g_assert (reg >= MONO_MAX_IREGS);
g_assert (hreg < MONO_MAX_IREGS);
#ifndef TARGET_ARM
/* this seems to trigger a gcc compilation bug sometime (hreg is 0) */
g_assert (! is_global_ireg (hreg));
#endif
rs->vassign [reg] = hreg;
rs->isymbolic [hreg] = reg;
rs->ifree_mask &= ~ (regmask (hreg));
}
}
static inline regmask_t
get_callee_mask (const char spec)
{
if (G_UNLIKELY (reg_bank (spec)))
return regbank_callee_regs [reg_bank (spec)];
return MONO_ARCH_CALLEE_REGS;
}
static gint8 desc_to_fixed_reg [256];
static gboolean desc_to_fixed_reg_inited = FALSE;
#ifndef DISABLE_JIT
/*
* Local register allocation.
* We first scan the list of instructions and we save the liveness info of
* each register (when the register is first used, when it's value is set etc.).
* We also reverse the list of instructions because assigning registers backwards allows
* for more tricks to be used.
*/
void