CS110 (Computer Architecture I) Course

This repository contains the homeworks, labs, and projects done during the course CS110 (Computer Architecture I) spring 2022, at ShanghaiTech University. For more detailed information, including the slides, homework requirements, you may refer to the course page.

WARNING: You may utilize our implementations for reference or inspiration, but DO NOT violate the academic integrity requirements by copying any part of our code or assignments. We are NOT responsible for any potential penalities due to your plagiarism.

Homeworks

• Homework 1

• logistics, not included in this repo

• Homework 2 (programming)

  • Ringbuffer implementation in C89
  • Static lib and dynamic lib

• Homework 3 (programming)

  • Longest common substring implementation in RISC-V assembly

• Homework 4 (handwritten)

  • SDS and FSM

• Homework 5 (programming)

  • Use pthread (multi-threads with POSIX threads) to speed up a ray trancing algorithm

• Homework 6 (handwritten)

  • CPU cache

• Homework 7 (programming)

  • Ringbuffer implementation in C++
  • Template, iterator, function object concepts in C++

• Homework 8 (handwritten)

  • Virtual memory

Labs

• Lab 1

  • Setup of Linux environment
  • Number representations and basic C programming

• Lab 2

  • Bitwise operations
  • C debugger (gdb)
  • Memory management in C

• Lab 3

  • Write, run, and debug RISC-V assembly code

• Lab 4

  • Practice with function calls and manipulating pointers in RISC-V

• Lab 5

  • Design and debug basic logic circuits in Logisim
  • Design FSMs (finite state machines) and implement them as a digital logic

• Lab 6

  • Extension for Lab 5

• Lab 7

  • Calculate the maximum clock rate of a given circuit
  • Pipeline a circuit to enable higher clock rate

• Lab 8

  • Cache hit rate visualization
  • Loop ordering and matrix multiplication
  • Cache blocking and matrix transposition

• Lab 9

  • Familiarize with SIMD intrinsics

• Lab 10

  • Basic OpenMP programming

• Lab 11

  • Get familiar with Longan Nano
  • Programming with RISC-V on a real machine

• Lab 12

  • Spark
  • Get a deeper understanding of MapReduce paradigm

• Lab 13

  • Virtual memory, TLB and Page Table visualization
  • Analyze TLB hit rate and page table hit rate

(Note: Lab 13 is not in included in this repo)

Projects

Project 1: RV32I-RVC Bidirectional Translator

• Project 1.1: RISC-V instructions to RVC instructions implemented in C89
• Project 1.2: RVC instructions to RISC-V instructions implemented in RISC-V assembly

Project 2: RISC-V CPU

• Project 2.1: ALU and Regfile (Register file)
• Project 2.2: Two-stage RISC-V CPU

Project 3: Gaussian Blur Optimization

• Gaussian Blur algorithm optimization in C

Project 4: Longan Nano Minigame

• A chrome dino runner game running on Longan Nano board