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i386-tdep.c
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i386-tdep.c
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/* Intel 386 target-dependent stuff.
Copyright (C) 1988-2024 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "defs.h"
#include "opcode/i386.h"
#include "arch-utils.h"
#include "command.h"
#include "dummy-frame.h"
#include "dwarf2/frame.h"
#include "frame.h"
#include "frame-base.h"
#include "frame-unwind.h"
#include "inferior.h"
#include "infrun.h"
#include "gdbcmd.h"
#include "gdbcore.h"
#include "gdbtypes.h"
#include "objfiles.h"
#include "osabi.h"
#include "regcache.h"
#include "reggroups.h"
#include "regset.h"
#include "symfile.h"
#include "symtab.h"
#include "target.h"
#include "target-float.h"
#include "value.h"
#include "dis-asm.h"
#include "disasm.h"
#include "remote.h"
#include "i386-tdep.h"
#include "i387-tdep.h"
#include "gdbsupport/x86-xstate.h"
#include "x86-tdep.h"
#include "expop.h"
#include "record.h"
#include "record-full.h"
#include "target-descriptions.h"
#include "arch/i386.h"
#include "ax.h"
#include "ax-gdb.h"
#include "stap-probe.h"
#include "user-regs.h"
#include "cli/cli-utils.h"
#include "expression.h"
#include "parser-defs.h"
#include <ctype.h>
#include <algorithm>
#include <unordered_set>
#include "producer.h"
#include "infcall.h"
#include "maint.h"
/* Register names. */
static const char * const i386_register_names[] =
{
"eax", "ecx", "edx", "ebx",
"esp", "ebp", "esi", "edi",
"eip", "eflags", "cs", "ss",
"ds", "es", "fs", "gs",
"st0", "st1", "st2", "st3",
"st4", "st5", "st6", "st7",
"fctrl", "fstat", "ftag", "fiseg",
"fioff", "foseg", "fooff", "fop",
"xmm0", "xmm1", "xmm2", "xmm3",
"xmm4", "xmm5", "xmm6", "xmm7",
"mxcsr"
};
static const char * const i386_zmm_names[] =
{
"zmm0", "zmm1", "zmm2", "zmm3",
"zmm4", "zmm5", "zmm6", "zmm7"
};
static const char * const i386_zmmh_names[] =
{
"zmm0h", "zmm1h", "zmm2h", "zmm3h",
"zmm4h", "zmm5h", "zmm6h", "zmm7h"
};
static const char * const i386_k_names[] =
{
"k0", "k1", "k2", "k3",
"k4", "k5", "k6", "k7"
};
static const char * const i386_ymm_names[] =
{
"ymm0", "ymm1", "ymm2", "ymm3",
"ymm4", "ymm5", "ymm6", "ymm7",
};
static const char * const i386_ymmh_names[] =
{
"ymm0h", "ymm1h", "ymm2h", "ymm3h",
"ymm4h", "ymm5h", "ymm6h", "ymm7h",
};
static const char * const i386_mpx_names[] =
{
"bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
};
static const char * const i386_pkeys_names[] =
{
"pkru"
};
/* Register names for MPX pseudo-registers. */
static const char * const i386_bnd_names[] =
{
"bnd0", "bnd1", "bnd2", "bnd3"
};
/* Register names for MMX pseudo-registers. */
static const char * const i386_mmx_names[] =
{
"mm0", "mm1", "mm2", "mm3",
"mm4", "mm5", "mm6", "mm7"
};
/* Register names for byte pseudo-registers. */
static const char * const i386_byte_names[] =
{
"al", "cl", "dl", "bl",
"ah", "ch", "dh", "bh"
};
/* Register names for word pseudo-registers. */
static const char * const i386_word_names[] =
{
"ax", "cx", "dx", "bx",
"", "bp", "si", "di"
};
/* Constant used for reading/writing pseudo registers. In 64-bit mode, we have
16 lower ZMM regs that extend corresponding xmm/ymm registers. In addition,
we have 16 upper ZMM regs that have to be handled differently. */
const int num_lower_zmm_regs = 16;
/* MMX register? */
static int
i386_mmx_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
int mm0_regnum = tdep->mm0_regnum;
if (mm0_regnum < 0)
return 0;
regnum -= mm0_regnum;
return regnum >= 0 && regnum < tdep->num_mmx_regs;
}
/* Byte register? */
int
i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
regnum -= tdep->al_regnum;
return regnum >= 0 && regnum < tdep->num_byte_regs;
}
/* Word register? */
int
i386_word_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
regnum -= tdep->ax_regnum;
return regnum >= 0 && regnum < tdep->num_word_regs;
}
/* Dword register? */
int
i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
int eax_regnum = tdep->eax_regnum;
if (eax_regnum < 0)
return 0;
regnum -= eax_regnum;
return regnum >= 0 && regnum < tdep->num_dword_regs;
}
/* AVX512 register? */
int
i386_zmmh_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
int zmm0h_regnum = tdep->zmm0h_regnum;
if (zmm0h_regnum < 0)
return 0;
regnum -= zmm0h_regnum;
return regnum >= 0 && regnum < tdep->num_zmm_regs;
}
int
i386_zmm_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
int zmm0_regnum = tdep->zmm0_regnum;
if (zmm0_regnum < 0)
return 0;
regnum -= zmm0_regnum;
return regnum >= 0 && regnum < tdep->num_zmm_regs;
}
int
i386_k_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
int k0_regnum = tdep->k0_regnum;
if (k0_regnum < 0)
return 0;
regnum -= k0_regnum;
return regnum >= 0 && regnum < I387_NUM_K_REGS;
}
static int
i386_ymmh_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
int ymm0h_regnum = tdep->ymm0h_regnum;
if (ymm0h_regnum < 0)
return 0;
regnum -= ymm0h_regnum;
return regnum >= 0 && regnum < tdep->num_ymm_regs;
}
/* AVX register? */
int
i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
int ymm0_regnum = tdep->ymm0_regnum;
if (ymm0_regnum < 0)
return 0;
regnum -= ymm0_regnum;
return regnum >= 0 && regnum < tdep->num_ymm_regs;
}
static int
i386_ymmh_avx512_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
int ymm16h_regnum = tdep->ymm16h_regnum;
if (ymm16h_regnum < 0)
return 0;
regnum -= ymm16h_regnum;
return regnum >= 0 && regnum < tdep->num_ymm_avx512_regs;
}
int
i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
int ymm16_regnum = tdep->ymm16_regnum;
if (ymm16_regnum < 0)
return 0;
regnum -= ymm16_regnum;
return regnum >= 0 && regnum < tdep->num_ymm_avx512_regs;
}
/* BND register? */
int
i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
int bnd0_regnum = tdep->bnd0_regnum;
if (bnd0_regnum < 0)
return 0;
regnum -= bnd0_regnum;
return regnum >= 0 && regnum < I387_NUM_BND_REGS;
}
/* SSE register? */
int
i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
int num_xmm_regs = I387_NUM_XMM_REGS (tdep);
if (num_xmm_regs == 0)
return 0;
regnum -= I387_XMM0_REGNUM (tdep);
return regnum >= 0 && regnum < num_xmm_regs;
}
/* XMM_512 register? */
int
i386_xmm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
int num_xmm_avx512_regs = I387_NUM_XMM_AVX512_REGS (tdep);
if (num_xmm_avx512_regs == 0)
return 0;
regnum -= I387_XMM16_REGNUM (tdep);
return regnum >= 0 && regnum < num_xmm_avx512_regs;
}
static int
i386_mxcsr_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
if (I387_NUM_XMM_REGS (tdep) == 0)
return 0;
return (regnum == I387_MXCSR_REGNUM (tdep));
}
/* FP register? */
int
i386_fp_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
if (I387_ST0_REGNUM (tdep) < 0)
return 0;
return (I387_ST0_REGNUM (tdep) <= regnum
&& regnum < I387_FCTRL_REGNUM (tdep));
}
int
i386_fpc_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
if (I387_ST0_REGNUM (tdep) < 0)
return 0;
return (I387_FCTRL_REGNUM (tdep) <= regnum
&& regnum < I387_XMM0_REGNUM (tdep));
}
/* BNDr (raw) register? */
static int
i386_bndr_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
if (I387_BND0R_REGNUM (tdep) < 0)
return 0;
regnum -= tdep->bnd0r_regnum;
return regnum >= 0 && regnum < I387_NUM_BND_REGS;
}
/* BND control register? */
static int
i386_mpx_ctrl_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
if (I387_BNDCFGU_REGNUM (tdep) < 0)
return 0;
regnum -= I387_BNDCFGU_REGNUM (tdep);
return regnum >= 0 && regnum < I387_NUM_MPX_CTRL_REGS;
}
/* PKRU register? */
bool
i386_pkru_regnum_p (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
int pkru_regnum = tdep->pkru_regnum;
if (pkru_regnum < 0)
return false;
regnum -= pkru_regnum;
return regnum >= 0 && regnum < I387_NUM_PKEYS_REGS;
}
/* Return the name of register REGNUM, or the empty string if it is
an anonymous register. */
static const char *
i386_register_name (struct gdbarch *gdbarch, int regnum)
{
/* Hide the upper YMM registers. */
if (i386_ymmh_regnum_p (gdbarch, regnum))
return "";
/* Hide the upper YMM16-31 registers. */
if (i386_ymmh_avx512_regnum_p (gdbarch, regnum))
return "";
/* Hide the upper ZMM registers. */
if (i386_zmmh_regnum_p (gdbarch, regnum))
return "";
return tdesc_register_name (gdbarch, regnum);
}
/* Return the name of register REGNUM. */
const char *
i386_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
if (i386_bnd_regnum_p (gdbarch, regnum))
return i386_bnd_names[regnum - tdep->bnd0_regnum];
if (i386_mmx_regnum_p (gdbarch, regnum))
return i386_mmx_names[regnum - I387_MM0_REGNUM (tdep)];
else if (i386_ymm_regnum_p (gdbarch, regnum))
return i386_ymm_names[regnum - tdep->ymm0_regnum];
else if (i386_zmm_regnum_p (gdbarch, regnum))
return i386_zmm_names[regnum - tdep->zmm0_regnum];
else if (i386_byte_regnum_p (gdbarch, regnum))
return i386_byte_names[regnum - tdep->al_regnum];
else if (i386_word_regnum_p (gdbarch, regnum))
return i386_word_names[regnum - tdep->ax_regnum];
internal_error (_("invalid regnum"));
}
/* Convert a dbx register number REG to the appropriate register
number used by GDB. */
static int
i386_dbx_reg_to_regnum (struct gdbarch *gdbarch, int reg)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
/* This implements what GCC calls the "default" register map
(dbx_register_map[]). */
if (reg >= 0 && reg <= 7)
{
/* General-purpose registers. The debug info calls %ebp
register 4, and %esp register 5. */
if (reg == 4)
return 5;
else if (reg == 5)
return 4;
else return reg;
}
else if (reg >= 12 && reg <= 19)
{
/* Floating-point registers. */
return reg - 12 + I387_ST0_REGNUM (tdep);
}
else if (reg >= 21 && reg <= 28)
{
/* SSE registers. */
int ymm0_regnum = tdep->ymm0_regnum;
if (ymm0_regnum >= 0
&& i386_xmm_regnum_p (gdbarch, reg))
return reg - 21 + ymm0_regnum;
else
return reg - 21 + I387_XMM0_REGNUM (tdep);
}
else if (reg >= 29 && reg <= 36)
{
/* MMX registers. */
return reg - 29 + I387_MM0_REGNUM (tdep);
}
/* This will hopefully provoke a warning. */
return gdbarch_num_cooked_regs (gdbarch);
}
/* Convert SVR4 DWARF register number REG to the appropriate register number
used by GDB. */
static int
i386_svr4_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
{
i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
/* This implements the GCC register map that tries to be compatible
with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
/* The SVR4 register numbering includes %eip and %eflags, and
numbers the floating point registers differently. */
if (reg >= 0 && reg <= 9)
{
/* General-purpose registers. */
return reg;
}
else if (reg >= 11 && reg <= 18)
{
/* Floating-point registers. */
return reg - 11 + I387_ST0_REGNUM (tdep);
}
else if (reg >= 21 && reg <= 36)
{
/* The SSE and MMX registers have the same numbers as with dbx. */
return i386_dbx_reg_to_regnum (gdbarch, reg);
}
switch (reg)
{
case 37: return I387_FCTRL_REGNUM (tdep);
case 38: return I387_FSTAT_REGNUM (tdep);
case 39: return I387_MXCSR_REGNUM (tdep);
case 40: return I386_ES_REGNUM;
case 41: return I386_CS_REGNUM;
case 42: return I386_SS_REGNUM;
case 43: return I386_DS_REGNUM;
case 44: return I386_FS_REGNUM;
case 45: return I386_GS_REGNUM;
}
return -1;
}
/* Wrapper on i386_svr4_dwarf_reg_to_regnum to return
num_regs + num_pseudo_regs for other debug formats. */
int
i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg)
{
int regnum = i386_svr4_dwarf_reg_to_regnum (gdbarch, reg);
if (regnum == -1)
return gdbarch_num_cooked_regs (gdbarch);
return regnum;
}
/* This is the variable that is set with "set disassembly-flavor", and
its legitimate values. */
static const char att_flavor[] = "att";
static const char intel_flavor[] = "intel";
static const char *const valid_flavors[] =
{
att_flavor,
intel_flavor,
NULL
};
static const char *disassembly_flavor = att_flavor;
/* Use the program counter to determine the contents and size of a
breakpoint instruction. Return a pointer to a string of bytes that
encode a breakpoint instruction, store the length of the string in
*LEN and optionally adjust *PC to point to the correct memory
location for inserting the breakpoint.
On the i386 we have a single breakpoint that fits in a single byte
and can be inserted anywhere.
This function is 64-bit safe. */
constexpr gdb_byte i386_break_insn[] = { 0xcc }; /* int 3 */
typedef BP_MANIPULATION (i386_break_insn) i386_breakpoint;
/* Displaced instruction handling. */
/* Skip the legacy instruction prefixes in INSN.
Not all prefixes are valid for any particular insn
but we needn't care, the insn will fault if it's invalid.
The result is a pointer to the first opcode byte,
or NULL if we run off the end of the buffer. */
static gdb_byte *
i386_skip_prefixes (gdb_byte *insn, size_t max_len)
{
gdb_byte *end = insn + max_len;
while (insn < end)
{
switch (*insn)
{
case DATA_PREFIX_OPCODE:
case ADDR_PREFIX_OPCODE:
case CS_PREFIX_OPCODE:
case DS_PREFIX_OPCODE:
case ES_PREFIX_OPCODE:
case FS_PREFIX_OPCODE:
case GS_PREFIX_OPCODE:
case SS_PREFIX_OPCODE:
case LOCK_PREFIX_OPCODE:
case REPE_PREFIX_OPCODE:
case REPNE_PREFIX_OPCODE:
++insn;
continue;
default:
return insn;
}
}
return NULL;
}
static int
i386_absolute_jmp_p (const gdb_byte *insn)
{
/* jmp far (absolute address in operand). */
if (insn[0] == 0xea)
return 1;
if (insn[0] == 0xff)
{
/* jump near, absolute indirect (/4). */
if ((insn[1] & 0x38) == 0x20)
return 1;
/* jump far, absolute indirect (/5). */
if ((insn[1] & 0x38) == 0x28)
return 1;
}
return 0;
}
/* Return non-zero if INSN is a jump, zero otherwise. */
static int
i386_jmp_p (const gdb_byte *insn)
{
/* jump short, relative. */
if (insn[0] == 0xeb)
return 1;
/* jump near, relative. */
if (insn[0] == 0xe9)
return 1;
return i386_absolute_jmp_p (insn);
}
static int
i386_absolute_call_p (const gdb_byte *insn)
{
/* call far, absolute. */
if (insn[0] == 0x9a)
return 1;
if (insn[0] == 0xff)
{
/* Call near, absolute indirect (/2). */
if ((insn[1] & 0x38) == 0x10)
return 1;
/* Call far, absolute indirect (/3). */
if ((insn[1] & 0x38) == 0x18)
return 1;
}
return 0;
}
static int
i386_ret_p (const gdb_byte *insn)
{
switch (insn[0])
{
case 0xc2: /* ret near, pop N bytes. */
case 0xc3: /* ret near */
case 0xca: /* ret far, pop N bytes. */
case 0xcb: /* ret far */
case 0xcf: /* iret */
return 1;
default:
return 0;
}
}
static int
i386_call_p (const gdb_byte *insn)
{
if (i386_absolute_call_p (insn))
return 1;
/* call near, relative. */
if (insn[0] == 0xe8)
return 1;
return 0;
}
/* Return non-zero if INSN is a system call, and set *LENGTHP to its
length in bytes. Otherwise, return zero. */
static int
i386_syscall_p (const gdb_byte *insn, int *lengthp)
{
/* Is it 'int $0x80'? */
if ((insn[0] == 0xcd && insn[1] == 0x80)
/* Or is it 'sysenter'? */
|| (insn[0] == 0x0f && insn[1] == 0x34)
/* Or is it 'syscall'? */
|| (insn[0] == 0x0f && insn[1] == 0x05))
{
*lengthp = 2;
return 1;
}
return 0;
}
/* The gdbarch insn_is_call method. */
static int
i386_insn_is_call (struct gdbarch *gdbarch, CORE_ADDR addr)
{
gdb_byte buf[I386_MAX_INSN_LEN], *insn;
read_code (addr, buf, I386_MAX_INSN_LEN);
insn = i386_skip_prefixes (buf, I386_MAX_INSN_LEN);
return i386_call_p (insn);
}
/* The gdbarch insn_is_ret method. */
static int
i386_insn_is_ret (struct gdbarch *gdbarch, CORE_ADDR addr)
{
gdb_byte buf[I386_MAX_INSN_LEN], *insn;
read_code (addr, buf, I386_MAX_INSN_LEN);
insn = i386_skip_prefixes (buf, I386_MAX_INSN_LEN);
return i386_ret_p (insn);
}
/* The gdbarch insn_is_jump method. */
static int
i386_insn_is_jump (struct gdbarch *gdbarch, CORE_ADDR addr)
{
gdb_byte buf[I386_MAX_INSN_LEN], *insn;
read_code (addr, buf, I386_MAX_INSN_LEN);
insn = i386_skip_prefixes (buf, I386_MAX_INSN_LEN);
return i386_jmp_p (insn);
}
/* Some kernels may run one past a syscall insn, so we have to cope. */
displaced_step_copy_insn_closure_up
i386_displaced_step_copy_insn (struct gdbarch *gdbarch,
CORE_ADDR from, CORE_ADDR to,
struct regcache *regs)
{
size_t len = gdbarch_max_insn_length (gdbarch);
std::unique_ptr<i386_displaced_step_copy_insn_closure> closure
(new i386_displaced_step_copy_insn_closure (len));
gdb_byte *buf = closure->buf.data ();
read_memory (from, buf, len);
/* GDB may get control back after the insn after the syscall.
Presumably this is a kernel bug.
If this is a syscall, make sure there's a nop afterwards. */
{
int syscall_length;
gdb_byte *insn;
insn = i386_skip_prefixes (buf, len);
if (insn != NULL && i386_syscall_p (insn, &syscall_length))
insn[syscall_length] = NOP_OPCODE;
}
write_memory (to, buf, len);
displaced_debug_printf ("%s->%s: %s",
paddress (gdbarch, from), paddress (gdbarch, to),
bytes_to_string (buf, len).c_str ());
/* This is a work around for a problem with g++ 4.8. */
return displaced_step_copy_insn_closure_up (closure.release ());
}
/* Fix up the state of registers and memory after having single-stepped
a displaced instruction. */
void
i386_displaced_step_fixup (struct gdbarch *gdbarch,
struct displaced_step_copy_insn_closure *closure_,
CORE_ADDR from, CORE_ADDR to,
struct regcache *regs, bool completed_p)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
/* The offset we applied to the instruction's address.
This could well be negative (when viewed as a signed 32-bit
value), but ULONGEST won't reflect that, so take care when
applying it. */
ULONGEST insn_offset = to - from;
i386_displaced_step_copy_insn_closure *closure
= (i386_displaced_step_copy_insn_closure *) closure_;
gdb_byte *insn = closure->buf.data ();
/* The start of the insn, needed in case we see some prefixes. */
gdb_byte *insn_start = insn;
displaced_debug_printf ("fixup (%s, %s), insn = 0x%02x 0x%02x ...",
paddress (gdbarch, from), paddress (gdbarch, to),
insn[0], insn[1]);
/* The list of issues to contend with here is taken from
resume_execution in arch/i386/kernel/kprobes.c, Linux 2.6.20.
Yay for Free Software! */
/* Relocate the %eip, if necessary. */
/* The instruction recognizers we use assume any leading prefixes
have been skipped. */
{
/* This is the size of the buffer in closure. */
size_t max_insn_len = gdbarch_max_insn_length (gdbarch);
gdb_byte *opcode = i386_skip_prefixes (insn, max_insn_len);
/* If there are too many prefixes, just ignore the insn.
It will fault when run. */
if (opcode != NULL)
insn = opcode;
}
/* Except in the case of absolute or indirect jump or call
instructions, or a return instruction, the new eip is relative to
the displaced instruction; make it relative. Well, signal
handler returns don't need relocation either, but we use the
value of %eip to recognize those; see below. */
if (!completed_p
|| (!i386_absolute_jmp_p (insn)
&& !i386_absolute_call_p (insn)
&& !i386_ret_p (insn)))
{
int insn_len;
CORE_ADDR pc = regcache_read_pc (regs);
/* A signal trampoline system call changes the %eip, resuming
execution of the main program after the signal handler has
returned. That makes them like 'return' instructions; we
shouldn't relocate %eip.
But most system calls don't, and we do need to relocate %eip.
Our heuristic for distinguishing these cases: if stepping
over the system call instruction left control directly after
the instruction, the we relocate --- control almost certainly
doesn't belong in the displaced copy. Otherwise, we assume
the instruction has put control where it belongs, and leave
it unrelocated. Goodness help us if there are PC-relative
system calls. */
if (i386_syscall_p (insn, &insn_len)
&& pc != to + (insn - insn_start) + insn_len
/* GDB can get control back after the insn after the syscall.
Presumably this is a kernel bug.
i386_displaced_step_copy_insn ensures it's a nop,
we add one to the length for it. */
&& pc != to + (insn - insn_start) + insn_len + 1)
displaced_debug_printf ("syscall changed %%eip; not relocating");
else
{
ULONGEST eip = (pc - insn_offset) & 0xffffffffUL;
/* If we just stepped over a breakpoint insn, we don't backup
the pc on purpose; this is to match behaviour without
stepping. */
regcache_write_pc (regs, eip);
displaced_debug_printf ("relocated %%eip from %s to %s",
paddress (gdbarch, pc),
paddress (gdbarch, eip));
}
}
/* If the instruction was PUSHFL, then the TF bit will be set in the
pushed value, and should be cleared. We'll leave this for later,
since GDB already messes up the TF flag when stepping over a
pushfl. */
/* If the instruction was a call, the return address now atop the
stack is the address following the copied instruction. We need
to make it the address following the original instruction. */
if (completed_p && i386_call_p (insn))
{
ULONGEST esp;
ULONGEST retaddr;
const ULONGEST retaddr_len = 4;
regcache_cooked_read_unsigned (regs, I386_ESP_REGNUM, &esp);
retaddr = read_memory_unsigned_integer (esp, retaddr_len, byte_order);
retaddr = (retaddr - insn_offset) & 0xffffffffUL;
write_memory_unsigned_integer (esp, retaddr_len, byte_order, retaddr);
displaced_debug_printf ("relocated return addr at %s to %s",
paddress (gdbarch, esp),
paddress (gdbarch, retaddr));
}
}
static void
append_insns (CORE_ADDR *to, ULONGEST len, const gdb_byte *buf)
{
target_write_memory (*to, buf, len);
*to += len;
}
static void
i386_relocate_instruction (struct gdbarch *gdbarch,
CORE_ADDR *to, CORE_ADDR oldloc)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte buf[I386_MAX_INSN_LEN];
int offset = 0, rel32, newrel;
int insn_length;
gdb_byte *insn = buf;
read_memory (oldloc, buf, I386_MAX_INSN_LEN);
insn_length = gdb_buffered_insn_length (gdbarch, insn,
I386_MAX_INSN_LEN, oldloc);
/* Get past the prefixes. */
insn = i386_skip_prefixes (insn, I386_MAX_INSN_LEN);
/* Adjust calls with 32-bit relative addresses as push/jump, with
the address pushed being the location where the original call in
the user program would return to. */
if (insn[0] == 0xe8)
{
gdb_byte push_buf[16];
unsigned int ret_addr;
/* Where "ret" in the original code will return to. */
ret_addr = oldloc + insn_length;
push_buf[0] = 0x68; /* pushq $... */
store_unsigned_integer (&push_buf[1], 4, byte_order, ret_addr);
/* Push the push. */
append_insns (to, 5, push_buf);