/
board-mx6q_sabrelite.c
1392 lines (1208 loc) · 36.4 KB
/
board-mx6q_sabrelite.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*
* Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#include <linux/types.h>
#include <linux/sched.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/init.h>
#include <linux/input.h>
#include <linux/nodemask.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/fsl_devices.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/i2c.h>
#include <linux/i2c/pca953x.h>
#include <linux/ata.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
#include <linux/regulator/consumer.h>
#include <linux/pmic_external.h>
#include <linux/pmic_status.h>
#include <linux/ipu.h>
#include <linux/mxcfb.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/fec.h>
#include <linux/memblock.h>
#include <linux/gpio.h>
#include <linux/etherdevice.h>
#include <linux/regulator/anatop-regulator.h>
#include <linux/regulator/consumer.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/mxc_dvfs.h>
#include <mach/memory.h>
#include <mach/iomux-mx6q.h>
#include <mach/iomux-mx6dl.h>
#include <mach/imx-uart.h>
#include <mach/viv_gpu.h>
#include <mach/ahci_sata.h>
#include <mach/ipu-v3.h>
#include <mach/mxc_hdmi.h>
#include <mach/mxc_asrc.h>
#include <linux/i2c/tsc2007.h>
#include <linux/wl12xx.h>
#include <asm/irq.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include "usb.h"
#include "devices-imx6q.h"
#include "crm_regs.h"
#include "cpu_op-mx6.h"
#define MX6_SABRELITE_SD3_CD IMX_GPIO_NR(7, 0)
#define MX6_SABRELITE_SD3_WP IMX_GPIO_NR(7, 1)
#define MX6_SABRELITE_SD4_CD IMX_GPIO_NR(2, 6)
#define MX6_SABRELITE_SD4_WP IMX_GPIO_NR(2, 7)
#define MX6_SABRELITE_ECSPI1_CS1 IMX_GPIO_NR(3, 19)
#define MX6_SABRELITE_USB_OTG_PWR IMX_GPIO_NR(3, 22)
#define MX6_SABRELITE_CAP_TCH_INT1 IMX_GPIO_NR(1, 9)
#define MX6_SABRELITE_DRGB_IRQGPIO IMX_GPIO_NR(4, 20)
#define MX6_SABRELITE_USB_HUB_RESET IMX_GPIO_NR(7, 12)
#define MX6_SABRELITE_CAN1_STBY IMX_GPIO_NR(1, 2)
#define MX6_SABRELITE_CAN1_EN IMX_GPIO_NR(1, 4)
#define MX6_SABRELITE_CAN1_ERR IMX_GPIO_NR(1, 7)
#define MX6_SABRELITE_MENU_KEY IMX_GPIO_NR(2, 1)
#define MX6_SABRELITE_BACK_KEY IMX_GPIO_NR(2, 2)
#define MX6_SABRELITE_ONOFF_KEY IMX_GPIO_NR(2, 3)
#define MX6_SABRELITE_HOME_KEY IMX_GPIO_NR(2, 4)
#define MX6_SABRELITE_VOL_UP_KEY IMX_GPIO_NR(7, 13)
#define MX6_SABRELITE_VOL_DOWN_KEY IMX_GPIO_NR(4, 5)
#define MX6_SABRELITE_CSI0_RST IMX_GPIO_NR(1, 8)
#define MX6_SABRELITE_CSI0_PWN IMX_GPIO_NR(1, 6)
#define MX6_SABRELITE_ENET_PHY_INT IMX_GPIO_NR(1, 28)
#define N6_WL1271_WL_IRQ IMX_GPIO_NR(6, 14)
#define N6_WL1271_WL_EN IMX_GPIO_NR(6, 15)
#define N6_WL1271_BT_EN IMX_GPIO_NR(6, 16)
#define MX6_SABRELITE_CAN1_ERR_TEST_PADCFG (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
#define MX6_SABRELITE_CAN1_ERR_PADCFG (PAD_CTL_PUE | \
PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
#define MX6_SABRELITE_SD3_WP_PADCFG (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
#define WEAK_PULLUP (PAD_CTL_HYS | PAD_CTL_PKE \
| PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
#define N6_IRQ_PADCFG (PAD_CTL_PUE | PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
#define N6_IRQ_TEST_PADCFG (PAD_CTL_PKE | N6_IRQ_PADCFG)
#define N6_EN_PADCFG (PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)
#include "pads-mx6_sabrelite.h"
#define FOR_DL_SOLO
#include "pads-mx6_sabrelite.h"
void __init early_console_setup(unsigned long base, struct clk *clk);
static struct clk *sata_clk;
extern char *gp_reg_id;
extern char *soc_reg_id;
extern char *pu_reg_id;
static int caam_enabled;
extern struct regulator *(*get_cpu_regulator)(void);
extern void (*put_cpu_regulator)(void);
#define IOMUX_SETUP(pad_list) mxc_iomux_v3_setup_pads(mx6q_##pad_list, \
mx6dl_solo_##pad_list)
int mxc_iomux_v3_setup_pads(iomux_v3_cfg_t *mx6q_pad_list,
iomux_v3_cfg_t *mx6dl_solo_pad_list)
{
iomux_v3_cfg_t *p = cpu_is_mx6q() ? mx6q_pad_list : mx6dl_solo_pad_list;
int ret;
while (*p) {
ret = mxc_iomux_v3_setup_pad(*p);
if (ret)
return ret;
p++;
}
return 0;
}
struct gpio n6w_wl1271_gpios[] __initdata = {
{.label = "wl1271_int", .gpio = N6_WL1271_WL_IRQ, .flags = GPIOF_DIR_IN},
{.label = "wl1271_bt_en", .gpio = N6_WL1271_BT_EN, .flags = 0},
{.label = "wl1271_wl_en", .gpio = N6_WL1271_WL_EN, .flags = 0},
};
int is_nitrogen6w(void)
{
int ret = gpio_request_array(n6w_wl1271_gpios,
ARRAY_SIZE(n6w_wl1271_gpios));
if (ret) {
printk(KERN_ERR "%s gpio_request_array failed("
"%d) for n6w_wl1271_gpios\n", __func__, ret);
return ret;
}
ret = gpio_get_value(N6_WL1271_WL_IRQ);
if (ret <= 0) {
/* Sabrelite, not nitrogen6w */
gpio_free(N6_WL1271_WL_IRQ);
gpio_free(N6_WL1271_WL_EN);
gpio_free(N6_WL1271_BT_EN);
ret = 0;
}
return ret;
}
enum sd_pad_mode {
SD_PAD_MODE_LOW_SPEED,
SD_PAD_MODE_MED_SPEED,
SD_PAD_MODE_HIGH_SPEED,
};
static int plt_sd_pad_change(unsigned int index, int clock)
{
/* LOW speed is the default state of SD pads */
static enum sd_pad_mode pad_mode = SD_PAD_MODE_LOW_SPEED;
int i = (index - 1) * SD_SPEED_CNT;
if ((index < 1) || (index > 3)) {
printk(KERN_ERR "no such SD host controller index %d\n", index);
return -EINVAL;
}
if (clock > 100000000) {
if (pad_mode == SD_PAD_MODE_HIGH_SPEED)
return 0;
pad_mode = SD_PAD_MODE_HIGH_SPEED;
i += _200MHZ;
} else if (clock > 52000000) {
if (pad_mode == SD_PAD_MODE_MED_SPEED)
return 0;
pad_mode = SD_PAD_MODE_MED_SPEED;
i += _100MHZ;
} else {
if (pad_mode == SD_PAD_MODE_LOW_SPEED)
return 0;
pad_mode = SD_PAD_MODE_LOW_SPEED;
i += _50MHZ;
}
return IOMUX_SETUP(sd_pads[i]);
}
#ifdef CONFIG_WL12XX_PLATFORM_DATA
static struct esdhc_platform_data mx6_sabrelite_sd2_data = {
.always_present = 1,
.cd_gpio = -1,
.wp_gpio = -1,
.keep_power_at_suspend = 0,
.caps = MMC_CAP_POWER_OFF_CARD,
.platform_pad_change = plt_sd_pad_change,
};
#endif
static struct esdhc_platform_data mx6_sabrelite_sd3_data = {
.cd_gpio = MX6_SABRELITE_SD3_CD,
.wp_gpio = MX6_SABRELITE_SD3_WP,
.keep_power_at_suspend = 1,
.platform_pad_change = plt_sd_pad_change,
};
static const struct esdhc_platform_data mx6_sabrelite_sd4_data __initconst = {
.cd_gpio = MX6_SABRELITE_SD4_CD,
.wp_gpio = -1,
.keep_power_at_suspend = 1,
.platform_pad_change = plt_sd_pad_change,
};
static const struct anatop_thermal_platform_data
mx6_sabrelite_anatop_thermal_data __initconst = {
.name = "anatop_thermal",
};
static const struct imxuart_platform_data mx6_arm2_uart2_data __initconst = {
.flags = IMXUART_HAVE_RTSCTS | IMXUART_SDMA,
.dma_req_rx = MX6Q_DMA_REQ_UART3_RX,
.dma_req_tx = MX6Q_DMA_REQ_UART3_TX,
};
#if !(defined(CONFIG_MXC_CAMERA_OV5642) || defined(CONFIG_MXC_CAMERA_OV5642_MODULE))
static const struct imxuart_platform_data mx6_arm2_uart3_data __initconst = {
.flags = IMXUART_HAVE_RTSCTS | IMXUART_SDMA,
.dma_req_rx = MX6Q_DMA_REQ_UART4_RX,
.dma_req_tx = MX6Q_DMA_REQ_UART4_TX,
};
static const struct imxuart_platform_data mx6_arm2_uart4_data __initconst = {
.flags = IMXUART_HAVE_RTSCTS | IMXUART_SDMA,
.dma_req_rx = MX6Q_DMA_REQ_UART5_RX,
.dma_req_tx = MX6Q_DMA_REQ_UART5_TX,
};
#endif
static int mx6_sabrelite_fec_phy_init(struct phy_device *phydev)
{
/* prefer master mode */
phy_write(phydev, 0x9, 0x1f00);
/* min rx data delay */
phy_write(phydev, 0x0b, 0x8105);
phy_write(phydev, 0x0c, 0x0000);
/* min tx data delay */
phy_write(phydev, 0x0b, 0x8106);
phy_write(phydev, 0x0c, 0x0000);
/* max rx/tx clock delay, min rx/tx control delay */
phy_write(phydev, 0x0b, 0x8104);
phy_write(phydev, 0x0c, 0xf0f0);
phy_write(phydev, 0x0b, 0x104);
return 0;
}
static struct fec_platform_data fec_data __initdata = {
.init = mx6_sabrelite_fec_phy_init,
.phy = PHY_INTERFACE_MODE_RGMII,
.phy_irq = gpio_to_irq(MX6_SABRELITE_ENET_PHY_INT)
};
static int mx6_sabrelite_spi_cs[] = {
MX6_SABRELITE_ECSPI1_CS1,
};
static const struct spi_imx_master mx6_sabrelite_spi_data __initconst = {
.chipselect = mx6_sabrelite_spi_cs,
.num_chipselect = ARRAY_SIZE(mx6_sabrelite_spi_cs),
};
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition imx6_sabrelite_spi_nor_partitions[] = {
{
.name = "bootloader",
.offset = 0,
.size = 768*1024,
},
{
.name = "ubparams",
.offset = MTDPART_OFS_APPEND,
.size = 8*1024,
},
{
.name = "unused",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static struct flash_platform_data imx6_sabrelite__spi_flash_data = {
.name = "m25p80",
.parts = imx6_sabrelite_spi_nor_partitions,
.nr_parts = ARRAY_SIZE(imx6_sabrelite_spi_nor_partitions),
.type = "sst25vf016b",
};
#endif
static struct spi_board_info imx6_sabrelite_spi_nor_device[] __initdata = {
#if defined(CONFIG_MTD_M25P80)
{
.modalias = "m25p80",
.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
.chip_select = 0,
.platform_data = &imx6_sabrelite__spi_flash_data,
},
#endif
};
static void spi_device_init(void)
{
spi_register_board_info(imx6_sabrelite_spi_nor_device,
ARRAY_SIZE(imx6_sabrelite_spi_nor_device));
}
static struct mxc_audio_platform_data mx6_sabrelite_audio_data;
static int mx6_sabrelite_sgtl5000_init(void)
{
struct clk *clko;
struct clk *new_parent;
int rate;
clko = clk_get(NULL, "clko_clk");
if (IS_ERR(clko)) {
pr_err("can't get CLKO clock.\n");
return PTR_ERR(clko);
}
new_parent = clk_get(NULL, "ahb");
if (!IS_ERR(new_parent)) {
clk_set_parent(clko, new_parent);
clk_put(new_parent);
}
rate = clk_round_rate(clko, 16000000);
if (rate < 8000000 || rate > 27000000) {
pr_err("Error:SGTL5000 mclk freq %d out of range!\n", rate);
clk_put(clko);
return -1;
}
mx6_sabrelite_audio_data.sysclk = rate;
clk_set_rate(clko, rate);
clk_enable(clko);
return 0;
}
static struct imx_ssi_platform_data mx6_sabrelite_ssi_pdata = {
.flags = IMX_SSI_DMA | IMX_SSI_SYN,
};
static struct mxc_audio_platform_data mx6_sabrelite_audio_data = {
.ssi_num = 1,
.src_port = 2,
.ext_port = 4,
.init = mx6_sabrelite_sgtl5000_init,
.hp_gpio = -1,
};
static struct platform_device mx6_sabrelite_audio_device = {
.name = "imx-sgtl5000",
};
static struct imxi2c_platform_data mx6_sabrelite_i2c_data = {
.bitrate = 100000,
};
static struct i2c_board_info mxc_i2c0_board_info[] __initdata = {
{
I2C_BOARD_INFO("sgtl5000", 0x0a),
},
{
I2C_BOARD_INFO("isl1208", 0x6f), /* Real time clock */
.irq = gpio_to_irq(IMX_GPIO_NR(6, 7)), /* NANDF_CLE */
},
};
static void camera_reset(int power_gp, int reset_gp, int reset_gp2)
{
pr_info("%s: power_gp=0x%x, reset_gp=0x%x reset_gp2=0x%x\n",
__func__, power_gp, reset_gp, reset_gp2);
/* Camera power down */
gpio_request(power_gp, "cam-pwdn");
gpio_request(reset_gp, "cam-reset");
if (reset_gp2 >= 0)
gpio_request(reset_gp2, "cam-reset2");
gpio_direction_output(power_gp, 1);
/* Camera reset */
gpio_direction_output(reset_gp, 0);
if (reset_gp2 >= 0)
gpio_direction_output(reset_gp2, 0);
msleep(1);
gpio_set_value(power_gp, 0);
msleep(1);
gpio_set_value(reset_gp, 1);
if (reset_gp2 >= 0)
gpio_set_value(reset_gp2, 1);
}
#if defined(CONFIG_MXC_CAMERA_OV5640_MIPI) || defined(CONFIG_MXC_CAMERA_OV5640_MIPI_MODULE)
/*
* (ov5640 Mipi) - J16
* NANDF_WP_B GPIO[6]:9 Nitrogen6x - power down, SOM - NC
* NANDF_D5 GPIO[2]:5 Nitrogen6x/SOM - CSI0 reset
* NANDF_CS0 GPIO[6]:11 reset, old rev SOM jumpered
* SD1_DAT1 GPIO[1]:16 24 Mhz XCLK/XVCLK (pwm3)
*/
struct pwm_device *mipi_pwm;
static void mx6_mipi_camera_io_init(void)
{
IOMUX_SETUP(sabrelite_mipi_pads);
pr_info("%s\n", __func__);
mipi_pwm = pwm_request(2, "mipi_clock");
if (IS_ERR(mipi_pwm)) {
pr_err("unable to request PWM for mipi_clock\n");
} else {
unsigned period = 1000/22;
pr_info("got pwm for mipi_clock\n");
pwm_config(mipi_pwm, period >> 1, period);
pwm_enable(mipi_pwm);
}
camera_reset(IMX_GPIO_NR(6, 9), IMX_GPIO_NR(2, 5), IMX_GPIO_NR(6, 11));
/* for mx6dl, mipi virtual channel 1 connect to csi 1*/
if (cpu_is_mx6dl())
mxc_iomux_set_gpr_register(13, 3, 3, 1);
}
static void mx6_mipi_camera_powerdown(int powerdown)
{
if (!IS_ERR(mipi_pwm)) {
if (powerdown) {
pwm_disable(mipi_pwm);
} else {
unsigned period = 1000/24;
pwm_config(mipi_pwm, period >> 1, period);
pwm_enable(mipi_pwm);
}
}
pr_info("%s: powerdown=%d, power_gp=0x%x\n",
__func__, powerdown, IMX_GPIO_NR(6, 9));
gpio_set_value(IMX_GPIO_NR(6, 9), powerdown ? 1 : 0);
if (!powerdown)
msleep(2);
}
static struct fsl_mxc_camera_platform_data ov5640_mipi_data = {
.mclk = 22000000,
.csi = 0,
.io_init = mx6_mipi_camera_io_init,
.pwdn = mx6_mipi_camera_powerdown,
};
#else
/*
* GPIO_6 GPIO[1]:6 (ov5642) - J5 - CSI0 power down
* GPIO_8 GPIO[1]:8 (ov5642) - J5 - CSI0 reset
* NANDF_CS0 GPIO[6]:11 (ov5642) - J5 - reset
* SD1_DAT0 GPIO[1]:16 (ov5642) - J5 - GP
*/
static void mx6_csi0_io_init(void)
{
IOMUX_SETUP(sabrelite_csi0_sensor_pads);
camera_reset(MX6_SABRELITE_CSI0_PWN, MX6_SABRELITE_CSI0_RST,
IMX_GPIO_NR(6, 11));
/* For MX6Q GPR1 bit19 and bit20 meaning:
* Bit19: 0 - Enable mipi to IPU1 CSI0
* virtual channel is fixed to 0
* 1 - Enable parallel interface to IPU1 CSI0
* Bit20: 0 - Enable mipi to IPU2 CSI1
* virtual channel is fixed to 3
* 1 - Enable parallel interface to IPU2 CSI1
* IPU1 CSI1 directly connect to mipi csi2,
* virtual channel is fixed to 1
* IPU2 CSI0 directly connect to mipi csi2,
* virtual channel is fixed to 2
*/
if (cpu_is_mx6q())
mxc_iomux_set_gpr_register(1, 19, 1, 1);
else
mxc_iomux_set_gpr_register(13, 0, 3, 4);
}
static void mx6_csi0_powerdown(int powerdown)
{
pr_info("%s: powerdown=%d, power_gp=0x%x\n",
__func__, powerdown, MX6_SABRELITE_CSI0_PWN);
gpio_set_value(MX6_SABRELITE_CSI0_PWN, powerdown ? 1 : 0);
msleep(2);
}
static struct fsl_mxc_camera_platform_data camera_data = {
.mclk = 24000000,
.mclk_source = 0,
.csi = 0,
.io_init = mx6_csi0_io_init,
.pwdn = mx6_csi0_powerdown,
};
#endif
static struct i2c_board_info mxc_i2c1_board_info[] __initdata = {
{
I2C_BOARD_INFO("mxc_hdmi_i2c", 0x50),
},
#if defined(CONFIG_MXC_CAMERA_OV5640_MIPI) || defined(CONFIG_MXC_CAMERA_OV5640_MIPI_MODULE)
{
I2C_BOARD_INFO("ov5640_mipi", 0x3c),
.platform_data = (void *)&ov5640_mipi_data,
},
#else
{
I2C_BOARD_INFO("ov5642", 0x3c),
.platform_data = (void *)&camera_data,
},
#endif
};
static struct tsc2007_platform_data tsc2007_info = {
.model = 2004,
.x_plate_ohms = 500,
};
static struct fsl_mxc_lcd_platform_data adv7391_data = {
.ipu_id = 0,
.disp_id = 0,
.default_ifmt = IPU_PIX_FMT_BT656,
};
static struct i2c_board_info mxc_i2c2_board_info[] __initdata = {
{
I2C_BOARD_INFO("egalax_ts", 0x4),
.irq = gpio_to_irq(MX6_SABRELITE_CAP_TCH_INT1),
},
{
I2C_BOARD_INFO("tsc2004", 0x48),
.platform_data = &tsc2007_info,
.irq = gpio_to_irq(MX6_SABRELITE_DRGB_IRQGPIO),
},
#if defined(CONFIG_TOUCHSCREEN_FT5X06) \
|| defined(CONFIG_TOUCHSCREEN_FT5X06_MODULE)
{
I2C_BOARD_INFO("ft5x06-ts", 0x38),
.irq = gpio_to_irq(MX6_SABRELITE_CAP_TCH_INT1),
},
#endif
{
I2C_BOARD_INFO("mxc_adv739x", 0x2a),
.platform_data = (void *)&adv7391_data,
},
};
static void imx6_sabrelite_usbotg_vbus(bool on)
{
if (on)
gpio_set_value(MX6_SABRELITE_USB_OTG_PWR, 1);
else
gpio_set_value(MX6_SABRELITE_USB_OTG_PWR, 0);
}
static void __init imx6_sabrelite_init_usb(void)
{
int ret = 0;
imx_otg_base = MX6_IO_ADDRESS(MX6Q_USB_OTG_BASE_ADDR);
/* disable external charger detect,
* or it will affect signal quality at dp .
*/
ret = gpio_request(MX6_SABRELITE_USB_OTG_PWR, "usb-pwr");
if (ret) {
pr_err("failed to get GPIO MX6_SABRELITE_USB_OTG_PWR: %d\n",
ret);
return;
}
gpio_direction_output(MX6_SABRELITE_USB_OTG_PWR, 0);
mxc_iomux_set_gpr_register(1, 13, 1, 1);
mx6_set_otghost_vbus_func(imx6_sabrelite_usbotg_vbus);
}
/* HW Initialization, if return 0, initialization is successful. */
static int mx6_sabrelite_sata_init(struct device *dev, void __iomem *addr)
{
u32 tmpdata;
int ret = 0;
struct clk *clk;
sata_clk = clk_get(dev, "imx_sata_clk");
if (IS_ERR(sata_clk)) {
dev_err(dev, "no sata clock.\n");
return PTR_ERR(sata_clk);
}
ret = clk_enable(sata_clk);
if (ret) {
dev_err(dev, "can't enable sata clock.\n");
goto put_sata_clk;
}
/* Set PHY Paremeters, two steps to configure the GPR13,
* one write for rest of parameters, mask of first write is 0x07FFFFFD,
* and the other one write for setting the mpll_clk_off_b
*.rx_eq_val_0(iomuxc_gpr13[26:24]),
*.los_lvl(iomuxc_gpr13[23:19]),
*.rx_dpll_mode_0(iomuxc_gpr13[18:16]),
*.sata_speed(iomuxc_gpr13[15]),
*.mpll_ss_en(iomuxc_gpr13[14]),
*.tx_atten_0(iomuxc_gpr13[13:11]),
*.tx_boost_0(iomuxc_gpr13[10:7]),
*.tx_lvl(iomuxc_gpr13[6:2]),
*.mpll_ck_off(iomuxc_gpr13[1]),
*.tx_edgerate_0(iomuxc_gpr13[0]),
*/
tmpdata = readl(IOMUXC_GPR13);
writel(((tmpdata & ~0x07FFFFFD) | 0x0593A044), IOMUXC_GPR13);
/* enable SATA_PHY PLL */
tmpdata = readl(IOMUXC_GPR13);
writel(((tmpdata & ~0x2) | 0x2), IOMUXC_GPR13);
/* Get the AHB clock rate, and configure the TIMER1MS reg later */
clk = clk_get(NULL, "ahb");
if (IS_ERR(clk)) {
dev_err(dev, "no ahb clock.\n");
ret = PTR_ERR(clk);
goto release_sata_clk;
}
tmpdata = clk_get_rate(clk) / 1000;
clk_put(clk);
ret = sata_init(addr, tmpdata);
if (ret == 0)
return ret;
release_sata_clk:
clk_disable(sata_clk);
put_sata_clk:
clk_put(sata_clk);
return ret;
}
static void mx6_sabrelite_sata_exit(struct device *dev)
{
clk_disable(sata_clk);
clk_put(sata_clk);
}
static struct ahci_platform_data mx6_sabrelite_sata_data = {
.init = mx6_sabrelite_sata_init,
.exit = mx6_sabrelite_sata_exit,
};
static struct gpio mx6_sabrelite_flexcan_gpios[] = {
{ MX6_SABRELITE_CAN1_ERR, GPIOF_DIR_IN, "flexcan1-err" },
{ MX6_SABRELITE_CAN1_EN, GPIOF_OUT_INIT_LOW, "flexcan1-en" },
{ MX6_SABRELITE_CAN1_STBY, GPIOF_OUT_INIT_LOW, "flexcan1-stby" },
};
static void mx6_sabrelite_flexcan0_mc33902_switch(int enable)
{
gpio_set_value(MX6_SABRELITE_CAN1_EN, enable);
gpio_set_value(MX6_SABRELITE_CAN1_STBY, enable);
}
static void mx6_sabrelite_flexcan0_tja1040_switch(int enable)
{
gpio_set_value(MX6_SABRELITE_CAN1_STBY, enable ^ 1);
}
static const struct flexcan_platform_data
mx6_sabrelite_flexcan0_mc33902_pdata __initconst = {
.transceiver_switch = mx6_sabrelite_flexcan0_mc33902_switch,
};
static const struct flexcan_platform_data
mx6_sabrelite_flexcan0_tja1040_pdata __initconst = {
.transceiver_switch = mx6_sabrelite_flexcan0_tja1040_switch,
};
static struct viv_gpu_platform_data imx6_gpu_pdata __initdata = {
.reserved_mem_size = SZ_128M,
};
static struct imx_asrc_platform_data imx_asrc_data = {
.channel_bits = 4,
.clk_map_ver = 2,
};
static struct ipuv3_fb_platform_data sabrelite_fb_data[] = {
{ /*fb0*/
.disp_dev = "ldb",
.interface_pix_fmt = IPU_PIX_FMT_RGB666,
.mode_str = "LDB-XGA",
.default_bpp = 16,
.int_clk = false,
}, {
.disp_dev = "lcd",
.interface_pix_fmt = IPU_PIX_FMT_RGB565,
.mode_str = "CLAA-WVGA",
.default_bpp = 16,
.int_clk = false,
}, {
.disp_dev = "ldb",
.interface_pix_fmt = IPU_PIX_FMT_RGB666,
.mode_str = "LDB-SVGA",
.default_bpp = 16,
.int_clk = false,
}, {
.disp_dev = "ldb",
.interface_pix_fmt = IPU_PIX_FMT_RGB666,
.mode_str = "LDB-VGA",
.default_bpp = 16,
.int_clk = false,
},
};
static void hdmi_init(int ipu_id, int disp_id)
{
int hdmi_mux_setting;
if ((ipu_id > 1) || (ipu_id < 0)) {
pr_err("Invalid IPU select for HDMI: %d. Set to 0\n", ipu_id);
ipu_id = 0;
}
if ((disp_id > 1) || (disp_id < 0)) {
pr_err("Invalid DI select for HDMI: %d. Set to 0\n", disp_id);
disp_id = 0;
}
/* Configure the connection between IPU1/2 and HDMI */
hdmi_mux_setting = 2*ipu_id + disp_id;
/* GPR3, bits 2-3 = HDMI_MUX_CTL */
mxc_iomux_set_gpr_register(3, 2, 2, hdmi_mux_setting);
/* Set HDMI event as SDMA event2 while Chip version later than TO1.2 */
if ((mx6q_revision() > IMX_CHIP_REVISION_1_1))
mxc_iomux_set_gpr_register(0, 0, 1, 1);
}
/* On mx6x sbarelite board i2c2 iomux with hdmi ddc,
* the pins default work at i2c2 function,
when hdcp enable, the pins should work at ddc function */
static void hdmi_enable_ddc_pin(void)
{
IOMUX_SETUP(sabrelite_hdmi_ddc_pads);
}
static void hdmi_disable_ddc_pin(void)
{
IOMUX_SETUP(sabrelite_i2c2_pads);
}
static struct fsl_mxc_hdmi_platform_data hdmi_data = {
.init = hdmi_init,
.enable_pins = hdmi_enable_ddc_pin,
.disable_pins = hdmi_disable_ddc_pin,
};
static struct fsl_mxc_hdmi_core_platform_data hdmi_core_data = {
.ipu_id = 0,
.disp_id = 1,
};
static struct fsl_mxc_lcd_platform_data lcdif_data = {
.ipu_id = 0,
.disp_id = 0,
.default_ifmt = IPU_PIX_FMT_RGB565,
};
static struct fsl_mxc_ldb_platform_data ldb_data = {
.ipu_id = 1,
.disp_id = 0,
.ext_ref = 1,
.mode = LDB_SEP0,
.sec_ipu_id = 1,
.sec_disp_id = 1,
};
static struct fsl_mxc_lcd_platform_data bt656_data = {
.ipu_id = 0,
.disp_id = 0,
.default_ifmt = IPU_PIX_FMT_BT656,
};
static struct imx_ipuv3_platform_data ipu_data[] = {
{
.rev = 4,
.csi_clk[0] = "clko2_clk",
}, {
.rev = 4,
.csi_clk[0] = "clko2_clk",
},
};
static struct fsl_mxc_capture_platform_data capture_data[] = {
{
.csi = 0,
.ipu = 0,
.mclk_source = 0,
.is_mipi = 0,
}, {
.csi = 1,
.ipu = 0,
.mclk_source = 0,
.is_mipi = 1,
},
};
static void sabrelite_suspend_enter(void)
{
/* suspend preparation */
}
static void sabrelite_suspend_exit(void)
{
/* resume restore */
}
static const struct pm_platform_data mx6_sabrelite_pm_data __initconst = {
.name = "imx_pm",
.suspend_enter = sabrelite_suspend_enter,
.suspend_exit = sabrelite_suspend_exit,
};
#define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \
{ \
.gpio = gpio_num, \
.type = EV_KEY, \
.code = ev_code, \
.active_low = act_low, \
.desc = "btn " descr, \
.wakeup = wake, \
}
static struct gpio_keys_button sabrelite_buttons[] = {
GPIO_BUTTON(MX6_SABRELITE_ONOFF_KEY, KEY_POWER, 1, "key-power", 1),
GPIO_BUTTON(MX6_SABRELITE_MENU_KEY, KEY_MENU, 1, "key-memu", 0),
GPIO_BUTTON(MX6_SABRELITE_HOME_KEY, KEY_HOME, 1, "key-home", 0),
GPIO_BUTTON(MX6_SABRELITE_BACK_KEY, KEY_BACK, 1, "key-back", 0),
GPIO_BUTTON(MX6_SABRELITE_VOL_UP_KEY, KEY_VOLUMEUP, 1, "volume-up", 0),
GPIO_BUTTON(MX6_SABRELITE_VOL_DOWN_KEY, KEY_VOLUMEDOWN, 1, "volume-down", 0),
};
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
static struct gpio_keys_platform_data sabrelite_button_data = {
.buttons = sabrelite_buttons,
.nbuttons = ARRAY_SIZE(sabrelite_buttons),
};
static struct platform_device sabrelite_button_device = {
.name = "gpio-keys",
.id = -1,
.num_resources = 0,
.dev = {
.platform_data = &sabrelite_button_data,
}
};
static void __init sabrelite_add_device_buttons(void)
{
platform_device_register(&sabrelite_button_device);
}
#else
static void __init sabrelite_add_device_buttons(void)
{
int i;
for (i=0; i < ARRAY_SIZE(sabrelite_buttons);i++) {
int gpio = sabrelite_buttons[i].gpio;
pr_debug("%s: exporting gpio %d\n", __func__, gpio);
gpio_export(gpio,1);
}
}
#endif
#ifdef CONFIG_WL12XX_PLATFORM_DATA
static void wl1271_set_power(bool enable)
{
if (0 == enable) {
gpio_set_value(N6_WL1271_WL_EN, 0); /* momentarily disable */
mdelay(2);
gpio_set_value(N6_WL1271_WL_EN, 1);
}
}
struct wl12xx_platform_data n6q_wlan_data __initdata = {
.irq = gpio_to_irq(N6_WL1271_WL_IRQ),
.board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
.set_power = wl1271_set_power,
};
static struct regulator_consumer_supply n6q_vwl1271_consumers[] = {
REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.1"),
};
static struct regulator_init_data n6q_vwl1271_init = {
.constraints = {
.name = "VDD_1.8V",
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(n6q_vwl1271_consumers),
.consumer_supplies = n6q_vwl1271_consumers,
};
static struct fixed_voltage_config n6q_vwl1271_reg_config = {
.supply_name = "vwl1271",
.microvolts = 1800000, /* 1.80V */
.gpio = N6_WL1271_WL_EN,
.startup_delay = 70000, /* 70ms */
.enable_high = 1,
.enabled_at_boot = 0,
.init_data = &n6q_vwl1271_init,
};
static struct platform_device n6q_vwl1271_reg_devices = {
.name = "reg-fixed-voltage",
.id = 4,
.dev = {
.platform_data = &n6q_vwl1271_reg_config,
},
};
#endif
static struct regulator_consumer_supply sabrelite_vmmc_consumers[] = {
REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.2"),
REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.3"),
};
static struct regulator_init_data sabrelite_vmmc_init = {
.num_consumer_supplies = ARRAY_SIZE(sabrelite_vmmc_consumers),
.consumer_supplies = sabrelite_vmmc_consumers,
};
static struct fixed_voltage_config sabrelite_vmmc_reg_config = {
.supply_name = "vmmc",
.microvolts = 3300000,
.gpio = -1,
.init_data = &sabrelite_vmmc_init,
};
static struct platform_device sabrelite_vmmc_reg_devices = {
.name = "reg-fixed-voltage",
.id = 3,
.dev = {
.platform_data = &sabrelite_vmmc_reg_config,
},
};
#ifdef CONFIG_SND_SOC_SGTL5000
static struct regulator_consumer_supply sgtl5000_sabrelite_consumer_vdda = {
.supply = "VDDA",
.dev_name = "0-000a",
};
static struct regulator_consumer_supply sgtl5000_sabrelite_consumer_vddio = {
.supply = "VDDIO",
.dev_name = "0-000a",
};
static struct regulator_consumer_supply sgtl5000_sabrelite_consumer_vddd = {