/
gc_hal_kernel_hardware.c
6438 lines (5513 loc) · 276 KB
/
gc_hal_kernel_hardware.c
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/****************************************************************************
*
* Copyright (C) 2005 - 2013 by Vivante Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the license, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
*****************************************************************************/
#include "gc_hal.h"
#include "gc_hal_kernel.h"
#define _GC_OBJ_ZONE gcvZONE_HARDWARE
typedef struct _gcsiDEBUG_REGISTERS * gcsiDEBUG_REGISTERS_PTR;
typedef struct _gcsiDEBUG_REGISTERS
{
gctSTRING module;
gctUINT index;
gctUINT shift;
gctUINT data;
gctUINT count;
gctUINT32 signature;
}
gcsiDEBUG_REGISTERS;
/******************************************************************************\
********************************* Support Code *********************************
\******************************************************************************/
static gceSTATUS
_ResetGPU(
IN gckHARDWARE Hardware,
IN gckOS Os,
IN gceCORE Core
);
static gceSTATUS
_IdentifyHardware(
IN gckOS Os,
IN gceCORE Core,
OUT gcsHAL_QUERY_CHIP_IDENTITY_PTR Identity
)
{
gceSTATUS status;
gctUINT32 chipIdentity;
gctUINT32 streamCount = 0;
gctUINT32 registerMax = 0;
gctUINT32 threadCount = 0;
gctUINT32 shaderCoreCount = 0;
gctUINT32 vertexCacheSize = 0;
gctUINT32 vertexOutputBufferSize = 0;
gctUINT32 pixelPipes = 0;
gctUINT32 instructionCount = 0;
gctUINT32 numConstants = 0;
gctUINT32 bufferSize = 0;
gctUINT32 varyingsCount = 0;
gcmkHEADER_ARG("Os=0x%x", Os);
/***************************************************************************
** Get chip ID and revision.
*/
/* Read chip identity register. */
gcmkONERROR(
gckOS_ReadRegisterEx(Os, Core,
0x00018,
&chipIdentity));
/* Special case for older graphic cores. */
if (((((gctUINT32) (chipIdentity)) >> (0 ? 31:24) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1)))))) == (0x01 & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))))
{
Identity->chipModel = gcv500;
Identity->chipRevision = (((((gctUINT32) (chipIdentity)) >> (0 ? 15:12)) & ((gctUINT32) ((((1 ? 15:12) - (0 ? 15:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:12) - (0 ? 15:12) + 1)))))) );
}
else
{
/* Read chip identity register. */
gcmkONERROR(
gckOS_ReadRegisterEx(Os, Core,
0x00020,
(gctUINT32_PTR) &Identity->chipModel));
/* !!!! HACK ALERT !!!! */
/* Because people change device IDs without letting software know
** about it - here is the hack to make it all look the same. Only
** for GC400 family. Next time - TELL ME!!! */
if (((Identity->chipModel & 0xFF00) == 0x0400)
&& (Identity->chipModel != 0x0420))
{
Identity->chipModel = (gceCHIPMODEL) (Identity->chipModel & 0x0400);
}
/* Read CHIP_REV register. */
gcmkONERROR(
gckOS_ReadRegisterEx(Os, Core,
0x00024,
&Identity->chipRevision));
if ((Identity->chipModel == gcv300)
&& (Identity->chipRevision == 0x2201)
)
{
gctUINT32 chipDate;
gctUINT32 chipTime;
/* Read date and time registers. */
gcmkONERROR(
gckOS_ReadRegisterEx(Os, Core,
0x00028,
&chipDate));
gcmkONERROR(
gckOS_ReadRegisterEx(Os, Core,
0x0002C,
&chipTime));
if ((chipDate == 0x20080814) && (chipTime == 0x12051100))
{
/* This IP has an ECO; put the correct revision in it. */
Identity->chipRevision = 0x1051;
}
}
}
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Identity: chipModel=%X",
Identity->chipModel);
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Identity: chipRevision=%X",
Identity->chipRevision);
/***************************************************************************
** Get chip features.
*/
/* Read chip feature register. */
gcmkONERROR(
gckOS_ReadRegisterEx(Os, Core,
0x0001C,
&Identity->chipFeatures));
#ifndef VIVANTE_NO_3D
/* Disable fast clear on GC700. */
if (Identity->chipModel == gcv700)
{
Identity->chipFeatures
= ((((gctUINT32) (Identity->chipFeatures)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
}
#endif
if (((Identity->chipModel == gcv500) && (Identity->chipRevision < 2))
|| ((Identity->chipModel == gcv300) && (Identity->chipRevision < 0x2000))
)
{
/* GC500 rev 1.x and GC300 rev < 2.0 doesn't have these registers. */
Identity->chipMinorFeatures = 0;
Identity->chipMinorFeatures1 = 0;
Identity->chipMinorFeatures2 = 0;
Identity->chipMinorFeatures3 = 0;
}
else
{
/* Read chip minor feature register #0. */
gcmkONERROR(
gckOS_ReadRegisterEx(Os, Core,
0x00034,
&Identity->chipMinorFeatures));
if (((((gctUINT32) (Identity->chipMinorFeatures)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))))
)
{
/* Read chip minor featuress register #1. */
gcmkONERROR(
gckOS_ReadRegisterEx(Os, Core,
0x00074,
&Identity->chipMinorFeatures1));
/* Read chip minor featuress register #2. */
gcmkONERROR(
gckOS_ReadRegisterEx(Os, Core,
0x00084,
&Identity->chipMinorFeatures2));
/*Identity->chipMinorFeatures2 &= ~(0x1 << 3);*/
/* Read chip minor featuress register #1. */
gcmkONERROR(
gckOS_ReadRegisterEx(Os, Core,
0x00088,
&Identity->chipMinorFeatures3));
}
else
{
/* Chip doesn't has minor features register #1 or 2 or 3. */
Identity->chipMinorFeatures1 = 0;
Identity->chipMinorFeatures2 = 0;
Identity->chipMinorFeatures3 = 0;
}
}
/* Get the Supertile layout in the hardware. */
if (((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 26:26) & ((gctUINT32) ((((1 ? 26:26) - (0 ? 26:26) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 26:26) - (0 ? 26:26) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 26:26) - (0 ? 26:26) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 26:26) - (0 ? 26:26) + 1)))))))
|| ((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 8:8) & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1))))))))
{
Identity->superTileMode = 2;
}
else if (((((gctUINT32) (Identity->chipMinorFeatures)) >> (0 ? 27:27) & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))))
{
Identity->superTileMode = 1;
}
else
{
Identity->superTileMode = 0;
}
/* Exception for GC1000, revision 5035 & GC800, revision 4612 */
if (((Identity->chipModel == gcv1000) && (Identity->chipRevision == 0x5035))
|| ((Identity->chipModel == gcv800) && (Identity->chipRevision == 0x4612)))
{
Identity->superTileMode = 1;
}
/* Disable HZ when EZ is present for older chips. */
if (!((((gctUINT32) (Identity->chipFeatures)) >> (0 ? 16:16) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))))
{
/* Disable HIERARCHICAL_Z. */
Identity->chipMinorFeatures
= ((((gctUINT32) (Identity->chipMinorFeatures)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))) << (0 ? 27:27))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))) << (0 ? 27:27)));
}
/* Disable rectangle primitive when chip is gc880_5_1_0_rc6*/
if ((Identity->chipModel == gcv880) && (Identity->chipRevision == 0x5106))
{
/* Disable rectangle primitive. */
Identity->chipMinorFeatures2
= ((((gctUINT32) (Identity->chipMinorFeatures2)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)));
}
if ((Identity->chipModel == gcv800) && (Identity->chipRevision == 0x4605))
{
/* Correct feature bit: RTL does not have such feature. */
Identity->chipFeatures
= ((((gctUINT32) (Identity->chipFeatures)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31)));
}
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Identity: chipFeatures=0x%08X",
Identity->chipFeatures);
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Identity: chipMinorFeatures=0x%08X",
Identity->chipMinorFeatures);
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Identity: chipMinorFeatures1=0x%08X",
Identity->chipMinorFeatures1);
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Identity: chipMinorFeatures2=0x%08X",
Identity->chipMinorFeatures2);
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Identity: chipMinorFeatures3=0x%08X",
Identity->chipMinorFeatures3);
/***************************************************************************
** Get chip specs.
*/
if (((((gctUINT32) (Identity->chipMinorFeatures)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))))
{
gctUINT32 specs, specs2, specs3;
/* Read gcChipSpecs register. */
gcmkONERROR(
gckOS_ReadRegisterEx(Os, Core,
0x00048,
&specs));
/* Extract the fields. */
streamCount = (((((gctUINT32) (specs)) >> (0 ? 3:0)) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1)))))) );
registerMax = (((((gctUINT32) (specs)) >> (0 ? 7:4)) & ((gctUINT32) ((((1 ? 7:4) - (0 ? 7:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:4) - (0 ? 7:4) + 1)))))) );
threadCount = (((((gctUINT32) (specs)) >> (0 ? 11:8)) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1)))))) );
shaderCoreCount = (((((gctUINT32) (specs)) >> (0 ? 24:20)) & ((gctUINT32) ((((1 ? 24:20) - (0 ? 24:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 24:20) - (0 ? 24:20) + 1)))))) );
vertexCacheSize = (((((gctUINT32) (specs)) >> (0 ? 16:12)) & ((gctUINT32) ((((1 ? 16:12) - (0 ? 16:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:12) - (0 ? 16:12) + 1)))))) );
vertexOutputBufferSize = (((((gctUINT32) (specs)) >> (0 ? 31:28)) & ((gctUINT32) ((((1 ? 31:28) - (0 ? 31:28) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:28) - (0 ? 31:28) + 1)))))) );
pixelPipes = (((((gctUINT32) (specs)) >> (0 ? 27:25)) & ((gctUINT32) ((((1 ? 27:25) - (0 ? 27:25) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:25) - (0 ? 27:25) + 1)))))) );
/* Read gcChipSpecs2 register. */
gcmkONERROR(
gckOS_ReadRegisterEx(Os, Core,
0x00080,
&specs2));
instructionCount = (((((gctUINT32) (specs2)) >> (0 ? 15:8)) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1)))))) );
numConstants = (((((gctUINT32) (specs2)) >> (0 ? 31:16)) & ((gctUINT32) ((((1 ? 31:16) - (0 ? 31:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:16) - (0 ? 31:16) + 1)))))) );
bufferSize = (((((gctUINT32) (specs2)) >> (0 ? 7:0)) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1)))))) );
/* Read gcChipSpecs3 register. */
gcmkONERROR(
gckOS_ReadRegisterEx(Os, Core,
0x0008C,
&specs3));
varyingsCount = (((((gctUINT32) (specs3)) >> (0 ? 8:4)) & ((gctUINT32) ((((1 ? 8:4) - (0 ? 8:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:4) - (0 ? 8:4) + 1)))))) );
}
/* Get the number of pixel pipes. */
Identity->pixelPipes = gcmMAX(pixelPipes, 1);
/* Get the stream count. */
Identity->streamCount = (streamCount != 0)
? streamCount
: (Identity->chipModel >= gcv1000) ? 4 : 1;
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Specs: streamCount=%u%s",
Identity->streamCount,
(streamCount == 0) ? " (default)" : "");
/* Get the vertex output buffer size. */
Identity->vertexOutputBufferSize = (vertexOutputBufferSize != 0)
? 1 << vertexOutputBufferSize
: (Identity->chipModel == gcv400)
? (Identity->chipRevision < 0x4000) ? 512
: (Identity->chipRevision < 0x4200) ? 256
: 128
: (Identity->chipModel == gcv530)
? (Identity->chipRevision < 0x4200) ? 512
: 128
: 512;
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Specs: vertexOutputBufferSize=%u%s",
Identity->vertexOutputBufferSize,
(vertexOutputBufferSize == 0) ? " (default)" : "");
/* Get the maximum number of threads. */
Identity->threadCount = (threadCount != 0)
? 1 << threadCount
: (Identity->chipModel == gcv400) ? 64
: (Identity->chipModel == gcv500) ? 128
: (Identity->chipModel == gcv530) ? 128
: 256;
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Specs: threadCount=%u%s",
Identity->threadCount,
(threadCount == 0) ? " (default)" : "");
/* Get the number of shader cores. */
Identity->shaderCoreCount = (shaderCoreCount != 0)
? shaderCoreCount
: (Identity->chipModel >= gcv1000) ? 2
: 1;
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Specs: shaderCoreCount=%u%s",
Identity->shaderCoreCount,
(shaderCoreCount == 0) ? " (default)" : "");
/* Get the vertex cache size. */
Identity->vertexCacheSize = (vertexCacheSize != 0)
? vertexCacheSize
: 8;
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Specs: vertexCacheSize=%u%s",
Identity->vertexCacheSize,
(vertexCacheSize == 0) ? " (default)" : "");
/* Get the maximum number of temporary registers. */
Identity->registerMax = (registerMax != 0)
/* Maximum of registerMax/4 registers are accessible to 1 shader */
? 1 << registerMax
: (Identity->chipModel == gcv400) ? 32
: 64;
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Specs: registerMax=%u%s",
Identity->registerMax,
(registerMax == 0) ? " (default)" : "");
/* Get the instruction count. */
Identity->instructionCount = (instructionCount == 0) ? 256
: (instructionCount == 1) ? 1024
: (instructionCount == 2) ? 2048
: (instructionCount == 0xFF) ? 512
: 256;
if (Identity->instructionCount == 256)
{
if ((Identity->chipModel == gcv2000 && Identity->chipRevision == 0x5108)
|| Identity->chipModel == gcv880)
{
Identity->instructionCount = 512;
}
}
if (((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 3:3) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))))
{
Identity->instructionCount = 512;
}
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Specs: instructionCount=%u%s",
Identity->instructionCount,
(instructionCount == 0) ? " (default)" : "");
/* Get the number of constants. */
Identity->numConstants = (numConstants == 0) ? 168 : numConstants;
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Specs: numConstants=%u%s",
Identity->numConstants,
(numConstants == 0) ? " (default)" : "");
/* Get the buffer size. */
Identity->bufferSize = bufferSize;
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Specs: bufferSize=%u%s",
Identity->bufferSize,
(bufferSize == 0) ? " (default)" : "");
if (varyingsCount != 0)
{
/* Bug 4480. */
/*Identity->varyingsCount = varyingsCount;*/
Identity->varyingsCount = 12;
}
else if (((((gctUINT32) (Identity->chipMinorFeatures1)) >> (0 ? 23:23) & ((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1))))))))
{
Identity->varyingsCount = 12;
}
else
{
Identity->varyingsCount = 8;
}
/* Success. */
gcmkFOOTER();
return gcvSTATUS_OK;
OnError:
/* Return the status. */
gcmkFOOTER();
return status;
}
#if gcdPOWEROFF_TIMEOUT
void
_PowerTimerFunction(
gctPOINTER Data
)
{
gckHARDWARE hardware = (gckHARDWARE)Data;
gcmkVERIFY_OK(
gckHARDWARE_SetPowerManagementState(hardware, gcvPOWER_OFF_TIMEOUT));
}
#endif
static gceSTATUS
_VerifyDMA(
IN gckOS Os,
IN gceCORE Core,
gctUINT32_PTR Address1,
gctUINT32_PTR Address2,
gctUINT32_PTR State1,
gctUINT32_PTR State2
)
{
gceSTATUS status;
gctUINT32 i;
gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, 0x660, State1));
gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, 0x664, Address1));
for (i = 0; i < 500; i += 1)
{
gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, 0x660, State2));
gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, 0x664, Address2));
if (*Address1 != *Address2)
{
break;
}
if (*State1 != *State2)
{
break;
}
}
OnError:
return status;
}
static gceSTATUS
_DumpDebugRegisters(
IN gckOS Os,
IN gceCORE Core,
IN gcsiDEBUG_REGISTERS_PTR Descriptor
)
{
gceSTATUS status;
gctUINT32 select;
gctUINT32 data;
gctUINT i;
gcmkHEADER_ARG("Os=0x%X Descriptor=0x%X", Os, Descriptor);
gcmkPRINT_N(4, " %s debug registers:\n", Descriptor->module);
for (i = 0; i < Descriptor->count; i += 1)
{
select = i << Descriptor->shift;
gcmkONERROR(gckOS_WriteRegisterEx(Os, Core, Descriptor->index, select));
#if gcdFPGA_BUILD
gcmkONERROR(gckOS_Delay(Os, 1000));
#endif
gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, Descriptor->data, &data));
gcmkPRINT_N(12, " [0x%02X] 0x%08X\n", i, data);
}
select = 0xF << Descriptor->shift;
for (i = 0; i < 500; i += 1)
{
gcmkONERROR(gckOS_WriteRegisterEx(Os, Core, Descriptor->index, select));
#if gcdFPGA_BUILD
gcmkONERROR(gckOS_Delay(Os, 1000));
#endif
gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, Descriptor->data, &data));
if (data == Descriptor->signature)
{
break;
}
}
if (i == 500)
{
gcmkPRINT_N(4, " failed to obtain the signature (read 0x%08X).\n", data);
}
else
{
gcmkPRINT_N(8, " signature = 0x%08X (%d read attempt(s))\n", data, i + 1);
}
OnError:
/* Return the error. */
gcmkFOOTER();
return status;
}
#if gcdPOWER_MANAGEMENT
static gceSTATUS
_IsGPUPresent(
IN gckHARDWARE Hardware
)
{
gceSTATUS status;
gcsHAL_QUERY_CHIP_IDENTITY identity;
gctUINT32 control;
gcmkHEADER_ARG("Hardware=0x%x", Hardware);
/* Verify the arguments. */
gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
Hardware->core,
0x00000,
&control));
control = ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)));
control = ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
Hardware->core,
0x00000,
control));
/* Identify the hardware. */
gcmkONERROR(_IdentifyHardware(Hardware->os,
Hardware->core,
&identity));
/* Check if these are the same values as saved before. */
if ((Hardware->identity.chipModel != identity.chipModel)
|| (Hardware->identity.chipRevision != identity.chipRevision)
|| (Hardware->identity.chipFeatures != identity.chipFeatures)
|| (Hardware->identity.chipMinorFeatures != identity.chipMinorFeatures)
|| (Hardware->identity.chipMinorFeatures1 != identity.chipMinorFeatures1)
|| (Hardware->identity.chipMinorFeatures2 != identity.chipMinorFeatures2)
)
{
gcmkPRINT("[galcore]: GPU is not present.");
gcmkONERROR(gcvSTATUS_GPU_NOT_RESPONDING);
}
/* Success. */
gcmkFOOTER_NO();
return gcvSTATUS_OK;
OnError:
/* Return the error. */
gcmkFOOTER();
return status;
}
#endif
/******************************************************************************\
****************************** gckHARDWARE API code *****************************
\******************************************************************************/
/*******************************************************************************
**
** gckHARDWARE_Construct
**
** Construct a new gckHARDWARE object.
**
** INPUT:
**
** gckOS Os
** Pointer to an initialized gckOS object.
**
** gceCORE Core
** Specified core.
**
** OUTPUT:
**
** gckHARDWARE * Hardware
** Pointer to a variable that will hold the pointer to the gckHARDWARE
** object.
*/
gceSTATUS
gckHARDWARE_Construct(
IN gckOS Os,
IN gceCORE Core,
OUT gckHARDWARE * Hardware
)
{
gceSTATUS status;
gckHARDWARE hardware = gcvNULL;
gctUINT16 data = 0xff00;
gctUINT32 axi_ot;
gctPOINTER pointer = gcvNULL;
gcmkHEADER_ARG("Os=0x%x", Os);
/* Verify the arguments. */
gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
gcmkVERIFY_ARGUMENT(Hardware != gcvNULL);
/* Enable the GPU. */
gcmkONERROR(gckOS_SetGPUPower(Os, Core, gcvTRUE, gcvTRUE));
gcmkONERROR(gckOS_WriteRegisterEx(Os,
Core,
0x00000,
0x00000900));
/* Allocate the gckHARDWARE object. */
gcmkONERROR(gckOS_Allocate(Os,
gcmSIZEOF(struct _gckHARDWARE),
&pointer));
hardware = (gckHARDWARE) pointer;
/* Initialize the gckHARDWARE object. */
hardware->object.type = gcvOBJ_HARDWARE;
hardware->os = Os;
hardware->core = Core;
/* Identify the hardware. */
gcmkONERROR(_IdentifyHardware(Os, Core, &hardware->identity));
/* Determine the hardware type */
switch (hardware->identity.chipModel)
{
case gcv350:
case gcv355:
hardware->type = gcvHARDWARE_VG;
break;
case gcv300:
case gcv320:
hardware->type = gcvHARDWARE_2D;
/*set outstanding limit*/
gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, 0x00414, &axi_ot));
axi_ot = (axi_ot & (~0xFF)) | 0x10;
gcmkONERROR(gckOS_WriteRegisterEx(Os, Core, 0x00414, axi_ot));
break;
default:
hardware->type = gcvHARDWARE_3D;
if ((((((gctUINT32) (hardware->identity.chipFeatures)) >> (0 ? 9:9)) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1)))))) ))
{
hardware->type = (gceHARDWARE_TYPE) (hardware->type | gcvHARDWARE_2D);
}
}
hardware->powerBaseAddress
= ((hardware->identity.chipModel == gcv300)
&& (hardware->identity.chipRevision < 0x2000))
? 0x0100
: 0x0000;
/* _ResetGPU need powerBaseAddress. */
status = _ResetGPU(hardware, Os, Core);
if (status != gcvSTATUS_OK)
{
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"_ResetGPU failed: status=%d\n", status);
}
hardware->powerMutex = gcvNULL;
hardware->mmuVersion
= (((((gctUINT32) (hardware->identity.chipMinorFeatures1)) >> (0 ? 28:28)) & ((gctUINT32) ((((1 ? 28:28) - (0 ? 28:28) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 28:28) - (0 ? 28:28) + 1)))))) );
/* Determine whether bug fixes #1 are present. */
hardware->extraEventStates = ((((gctUINT32) (hardware->identity.chipMinorFeatures1)) >> (0 ? 3:3) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))) == (0x0 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))));
/* Check if big endian */
hardware->bigEndian = (*(gctUINT8 *)&data == 0xff);
/* Initialize the fast clear. */
gcmkONERROR(gckHARDWARE_SetFastClear(hardware, -1, -1));
#if !gcdENABLE_128B_MERGE
if (((((gctUINT32) (hardware->identity.chipMinorFeatures2)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))))
{
/* 128B merge is turned on by default. Disable it. */
gcmkONERROR(gckOS_WriteRegisterEx(Os, Core, 0x00558, 0));
}
#endif
/* Set power state to ON. */
hardware->chipPowerState = gcvPOWER_ON;
hardware->clockState = gcvTRUE;
hardware->powerState = gcvTRUE;
hardware->lastWaitLink = ~0U;
hardware->globalSemaphore = gcvNULL;
#if gcdENABLE_FSCALE_VAL_ADJUST
hardware->powerOnFscaleVal = 64;
#endif
gcmkONERROR(gckOS_CreateMutex(Os, &hardware->powerMutex));
gcmkONERROR(gckOS_CreateSemaphore(Os, &hardware->globalSemaphore));
hardware->startIsr = gcvNULL;
hardware->stopIsr = gcvNULL;
#if gcdPOWEROFF_TIMEOUT
hardware->powerOffTimeout = gcdPOWEROFF_TIMEOUT;
gcmkVERIFY_OK(gckOS_CreateTimer(Os,
_PowerTimerFunction,
(gctPOINTER)hardware,
&hardware->powerOffTimer));
#endif
gcmkONERROR(gckOS_AtomConstruct(Os, &hardware->pageTableDirty));
#if gcdLINK_QUEUE_SIZE
hardware->linkQueue.front = 0;
hardware->linkQueue.rear = 0;
hardware->linkQueue.count = 0;
#endif
/* Return pointer to the gckHARDWARE object. */
*Hardware = hardware;
/* Success. */
gcmkFOOTER_ARG("*Hardware=0x%x", *Hardware);
return gcvSTATUS_OK;
OnError:
/* Roll back. */
if (hardware != gcvNULL)
{
/* Turn off the power. */
gcmkVERIFY_OK(gckOS_SetGPUPower(Os, Core, gcvFALSE, gcvFALSE));
if (hardware->globalSemaphore != gcvNULL)
{
/* Destroy the global semaphore. */
gcmkVERIFY_OK(gckOS_DestroySemaphore(Os,
hardware->globalSemaphore));
}
if (hardware->powerMutex != gcvNULL)
{
/* Destroy the power mutex. */
gcmkVERIFY_OK(gckOS_DeleteMutex(Os, hardware->powerMutex));
}
#if gcdPOWEROFF_TIMEOUT
if (hardware->powerOffTimer != gcvNULL)
{
gcmkVERIFY_OK(gckOS_StopTimer(Os, hardware->powerOffTimer));
gcmkVERIFY_OK(gckOS_DestroyTimer(Os, hardware->powerOffTimer));
}
#endif
if (hardware->pageTableDirty != gcvNULL)
{
gcmkVERIFY_OK(gckOS_AtomDestroy(Os, hardware->pageTableDirty));
}
gcmkVERIFY_OK(gcmkOS_SAFE_FREE(Os, hardware));
}
/* Return the status. */
gcmkFOOTER();
return status;
}
/*******************************************************************************
**
** gckHARDWARE_Destroy
**
** Destroy an gckHARDWARE object.
**
** INPUT:
**
** gckHARDWARE Hardware
** Pointer to the gckHARDWARE object that needs to be destroyed.
**
** OUTPUT:
**
** Nothing.
*/
gceSTATUS
gckHARDWARE_Destroy(
IN gckHARDWARE Hardware
)
{
gceSTATUS status;
gcmkHEADER_ARG("Hardware=0x%x", Hardware);
/* Verify the arguments. */
gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
/* Destroy the power semaphore. */
gcmkVERIFY_OK(gckOS_DestroySemaphore(Hardware->os,
Hardware->globalSemaphore));
/* Destroy the power mutex. */
gcmkVERIFY_OK(gckOS_DeleteMutex(Hardware->os, Hardware->powerMutex));
#if gcdPOWEROFF_TIMEOUT
gcmkVERIFY_OK(gckOS_StopTimer(Hardware->os, Hardware->powerOffTimer));
gcmkVERIFY_OK(gckOS_DestroyTimer(Hardware->os, Hardware->powerOffTimer));
#endif
gcmkVERIFY_OK(gckOS_AtomDestroy(Hardware->os, Hardware->pageTableDirty));
/* Mark the object as unknown. */
Hardware->object.type = gcvOBJ_UNKNOWN;
/* Free the object. */
gcmkONERROR(gcmkOS_SAFE_FREE(Hardware->os, Hardware));
/* Success. */
gcmkFOOTER_NO();
return gcvSTATUS_OK;
OnError:
gcmkFOOTER();
return status;
}
/*******************************************************************************
**
** gckHARDWARE_GetType
**
** Get the hardware type.
**
** INPUT:
**
** gckHARDWARE Harwdare
** Pointer to an gckHARDWARE object.
**
** OUTPUT:
**
** gceHARDWARE_TYPE * Type
** Pointer to a variable that receives the type of hardware object.
*/
gceSTATUS
gckHARDWARE_GetType(
IN gckHARDWARE Hardware,
OUT gceHARDWARE_TYPE * Type
)
{
gcmkHEADER_ARG("Hardware=0x%x", Hardware);
gcmkVERIFY_ARGUMENT(Type != gcvNULL);
*Type = Hardware->type;
gcmkFOOTER_ARG("*Type=%d", *Type);
return gcvSTATUS_OK;
}
/*******************************************************************************
**
** gckHARDWARE_InitializeHardware
**
** Initialize the hardware.
**
** INPUT:
**
** gckHARDWARE Hardware
** Pointer to the gckHARDWARE object.
**
** OUTPUT:
**
** Nothing.
*/
gceSTATUS
gckHARDWARE_InitializeHardware(
IN gckHARDWARE Hardware
)
{
gceSTATUS status;
gctUINT32 baseAddress;
gctUINT32 chipRev;
gctUINT32 control;
gcmkHEADER_ARG("Hardware=0x%x", Hardware);
/* Verify the arguments. */
gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
/* Read the chip revision register. */
gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
Hardware->core,
0x00024,
&chipRev));
if (chipRev != Hardware->identity.chipRevision)
{
/* Chip is not there! */
gcmkONERROR(gcvSTATUS_CONTEXT_LOSSED);
}
/* Disable isolate GPU bit. */
gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
Hardware->core,
0x00000,
((((gctUINT32) (0x00000900)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19)))));
gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
Hardware->core,
0x00000,
&control));
/* Enable debug register. */
gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
Hardware->core,
0x00000,
((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:11) - (0 ? 11:11) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:11) - (0 ? 11:11) + 1))))))) << (0 ? 11:11))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 11:11) - (0 ? 11:11) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:11) - (0 ? 11:11) + 1))))))) << (0 ? 11:11)))));
/* Reset memory counters. */
gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
Hardware->core,
0x0003C,
~0U));
gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
Hardware->core,
0x0003C,
0));