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CH58Xxx.svd
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CH58Xxx.svd
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<?xml version="1.0" encoding="utf-8"?>
<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd" >
<vendor>WCH Ltd.</vendor> <!-- device vendor name -->
<vendorID>WCH</vendorID> <!-- device vendor short name -->
<name>CH583SFR</name> <!-- name of part-->
<series>CH58x</series> <!-- device series the device belongs to -->
<version>1.0</version> <!-- version of this description, adding CMSIS-SVD 1.1 tags -->
<description>WCH wireless MCU CH58x Family Support, Drivers</description>
<cpu> <!-- details about the cpu embedded in the device -->
<name>RISC-V</name>
<revision>r0p0</revision>
<endian>little</endian>
<mpuPresent>false</mpuPresent>
<fpuPresent>false</fpuPresent>
<nvicPrioBits>2</nvicPrioBits>
<vendorSystickConfig>false</vendorSystickConfig>
</cpu>
<addressUnitBits>8</addressUnitBits> <!-- byte addressable memory -->
<width>32</width> <!-- bus width is 32 bits -->
<!-- default settings implicitly inherited by subsequent sections -->
<size>32</size> <!-- this is the default size (number of bits) of all peripherals
and register that do not define "size" themselves -->
<resetValue>0x00000000</resetValue> <!-- by default all bits of the registers are initialized to 0 on reset -->
<resetMask>0xFFFFFFFF</resetMask> <!-- by default all 32Bits of the registers are used -->
<peripherals>
<peripheral>
<name>SYS</name>
<description>System Control Register</description>
<groupName>SystemControl</groupName>
<baseAddress>0x40001000</baseAddress>
<addressBlock>
<offset>0x00</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TMR0</name>
<description>TMR0_IRQHandler</description>
<value>16</value>
</interrupt>
<interrupt>
<name>GPIO_A</name>
<description>GPIO_IRQHandler</description>
<value>17</value>
</interrupt>
<interrupt>
<name>GPIO_B</name>
<description>GPIO_IRQHandler</description>
<value>18</value>
</interrupt>
<interrupt>
<name>SPI0</name>
<description>SPI0_IRQHandler</description>
<value>19</value>
</interrupt>
<interrupt>
<name>BLEL</name>
<description>LLE_IRQHandler</description>
<value>21</value>
</interrupt>
<interrupt>
<name>BLEB</name>
<description>BB_IRQHandler</description>
<value>20</value>
</interrupt>
<interrupt>
<name>USB</name>
<description>USB_IRQHandler</description>
<value>22</value>
</interrupt>
<interrupt>
<name>USB2</name>
<description>USB2_IRQHandler</description>
<value>23</value>
</interrupt>
<interrupt>
<name>TMR1</name>
<description>TMR1_IRQHandler</description>
<value>24</value>
</interrupt>
<interrupt>
<name>TMR2</name>
<description>TMR2_IRQHandler</description>
<value>25</value>
</interrupt>
<interrupt>
<name>UART0</name>
<description>UART0_IRQHandler</description>
<value>26</value>
</interrupt>
<interrupt>
<name>UART1</name>
<description>UART1_IRQHandler</description>
<value>27</value>
</interrupt>
<interrupt>
<name>RTC</name>
<description>RTC_IRQHandler</description>
<value>28</value>
</interrupt>
<interrupt>
<name>ADC</name>
<description>ADC_IRQHandler</description>
<value>29</value>
</interrupt>
<interrupt>
<name>I2C</name>
<description>I2C_IRQHandler</description>
<value>30</value>
</interrupt>
<interrupt>
<name>PWMX_SPI1</name>
<description>PWMX_SPI1_IRQHandler</description>
<value>31</value>
</interrupt>
<interrupt>
<name>TMR3</name>
<description>TMR3_IRQHandler</description>
<value>32</value>
</interrupt>
<interrupt>
<name>UART2</name>
<description>UART2_IRQHandler</description>
<value>33</value>
</interrupt>
<interrupt>
<name>UART3</name>
<description>UART3_IRQHandler</description>
<value>34</value>
</interrupt>
<interrupt>
<name>WDOG_BAT</name>
<description>WDT_IRQHandler</description>
<value>35</value>
</interrupt>
<registers>
<register>
<name>R16_CLK_SYS_CFG</name>
<description>RWA, system clock configuration, SAM</description>
<addressOffset>0x08</addressOffset>
<size>16</size>
<access>read-write</access>
<resetValue>0x0005</resetValue>
<fields>
<field>
<name>RB_CLK_PLL_DIV</name>
<description>RWA, output clock divider from PLL or CK32M</description>
<bitRange>[4:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>RB_CLK_SYS_MOD</name>
<description>RWA, system clock source mode: 00=divided from 32MHz, 01=divided from PLL-480MHz, 10=directly from 32MHz, 11=directly from 32KHz</description>
<bitRange>[7:6]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>R8_HFCK_PWR_CTRL</name>
<description>RWA, high frequency clock module power control, SAM</description>
<addressOffset>0x0A</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x14</resetValue>
<fields>
<field>
<name>RB_CLK_XT32M_PON</name>
<description>RWA, external 32MHz oscillator power control: 0=power down, 1-power on</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>RB_CLK_XT32M_KEEP</name>
<description>RWA, external 32MHz oscillator power keep under halt mode: 0=auto stop, 1=keep running</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>RB_CLK_PLL_PON</name>
<description>RWA, PLL power control: 0=power down, 1-power on</description>
<bitRange>[4:4]</bitRange>
</field>
</fields>
</register>
<register>
<name>R8_SLP_CLK_OFF0</name>
<description>RWA, sleep clock off control byte 0, SAM</description>
<addressOffset>0x0C</addressOffset>
<size>8</size>
<access>Read or Write under safe Accessing mode</access>
<resetValue>0x00</resetValue>
<fields>
<field>
<name>RB_SLP_CLK_TMR0</name>
<description>RWA, close TMR0 clock</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>RB_SLP_CLK_TMR1</name>
<description>RWA, close TMR1 clock</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>RB_SLP_CLK_TMR2</name>
<description>RWA, close TMR2 clock</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>RB_SLP_CLK_TMR3</name>
<description>RWA, close TMR3 clock</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>RB_SLP_CLK_UART0</name>
<description>RWA, close UART0 clock</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>RB_SLP_CLK_UART1</name>
<description>RWA, close UART1 clock</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>RB_SLP_CLK_UART2</name>
<description>RWA, close UART2 clock</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>RB_SLP_CLK_UART3</name>
<description>RWA, close UART3 clock</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>R8_SLP_CLK_OFF1</name>
<description>RWA, sleep clock off control byte 1, SAM</description>
<addressOffset>0x0D</addressOffset>
<size>8</size>
<access>Read or Write under safe Accessing mode</access>
<resetValue>0x00</resetValue>
<fields>
<field>
<name>RB_SLP_CLK_SPI0</name>
<description>RWA, close SPI0 clock</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>RB_SLP_CLK_SPI1</name>
<description>RWA, close SPI1 clock</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>RB_SLP_CLK_PWMX</name>
<description>RWA, close PWMx clock</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>RB_SLP_CLK_I2C</name>
<description>RWA, close I2C clock</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>RB_SLP_CLK_USB</name>
<description>RWA, close USB clock</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>RB_SLP_CLK_BLE</name>
<description>RWA, close BLE clock</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>R8_SLP_WAKE_CTRL</name>
<description>RWA, wake control, SAM</description>
<addressOffset>0x0E</addressOffset>
<size>8</size>
<access>Read or Write under safe Accessing mode</access>
<resetValue>0x20</resetValue>
<fields>
<field>
<name>RB_SLP_USB_WAKE</name>
<description>RWA, enable USB waking</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>RB_SLP_USB2_WAKE</name>
<description>RWA, enable USB2 waking</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>RB_SLP_RTC_WAKE</name>
<description>RWA, enable RTC waking</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>RB_SLP_GPIO_WAKE</name>
<description>RWA, enable GPIO waking</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>RB_SLP_BAT_WAKE</name>
<description>RWA, enable BAT waking</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>RB_WAKE_EV_MODE</name>
<description>RWA, event wakeup mode</description>
<bitRange>[6:6]</bitRange>
</field>
</fields>
</register>
<register>
<name>R8_SLP_POWER_CTRL</name>
<description>RWA, peripherals power down control, SAM</description>
<addressOffset>0x0F</addressOffset>
<size>8</size>
<access>Read or Write under safe Accessing mode</access>
<resetValue>0x00</resetValue>
<fields>
<field>
<name>RB_WAKE_DLY_MOD</name>
<description>RWA, wakeup delay time selection</description>
<bitRange>[1:0]</bitRange>
</field>
<field>
<name>RB_SLP_CLK_RAMX</name>
<description>RWA, close main SRAM clock</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>RB_SLP_CLK_RAM2K</name>
<description>RWA, close retention 2KB SRAM clock</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>RB_RAM_RET_LV</name>
<description>RWA, SRAM retention voltage selection</description>
<bitRange>[6:6]</bitRange>
</field>
</fields>
</register>
<register>
<name>R16_PIN_ALTERNATE</name>
<description>RW, function pin alternate configuration</description>
<addressOffset>0x18</addressOffset>
<size>16</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>RB_PIN_TMR0</name>
<description>RW, TMR0 alternate pin enable</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>RB_PIN_TMR1</name>
<description>RW, TMR1 alternate pin enable</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>RB_PIN_TMR2</name>
<description>RW, TMR2 alternate pin enable</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>RB_PIN_TMR3</name>
<description>RW, TMR3 alternate pin enable</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>RB_PIN_UART0</name>
<description>RW, RXD0/TXD0 alternate pin enable</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>RB_PIN_UART1</name>
<description>RW, RXD1/TXD1 alternate pin enable</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>RB_PIN_UART2</name>
<description>RW, RXD2/TXD2 alternate pin enable</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>RB_PIN_UART3</name>
<description>RW, RXD3/TXD3 alternate pin enable</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>RB_PIN_SPI0</name>
<description>RW, SCS/SCK0/MOSI/MISO alternate pin enable</description>
<bitRange>[8:8]</bitRange>
</field>
<field>
<name>RB_PIN_PWMX</name>
<description>RW, PWM4/PWM5/PWM7/PWM8/PWM9 alternate pin enable</description>
<bitRange>[10:10]</bitRange>
</field>
<field>
<name>RB_PIN_I2C</name>
<description>RW, SCL/SDA alternate pin enable</description>
<bitRange>[11:11]</bitRange>
</field>
<field>
<name>RB_PIN_MODEM</name>
<description>RW, DSR/DTR alternate pin enable</description>
<bitRange>[12:12]</bitRange>
</field>
<field>
<name>RB_PIN_INTX</name>
<description>RW, interrupt INT24/INT25 alternate pin enable</description>
<bitRange>[13:13]</bitRange>
</field>
<field>
<name>RB_PIN_U0_INV</name>
<description>RW, SCL/SDA alternRW, RXD0/RXD0_/TXD0/TXD0_ invert input/output enableate pin enable</description>
<bitRange>[14:14]</bitRange>
</field>
<field>
<name>RB_RF_ANT_SW_EN</name>
<description>RW, RF antenna switch control output enable</description>
<bitRange>[15:15]</bitRange>
</field>
</fields>
</register>
<register>
<name>R16_PIN_ANALOG_IE</name>
<description>RW, analog pin enable and digital input disable</description>
<addressOffset>0x1A</addressOffset>
<size>16</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>RB_PIN_ADC8_9_IE</name>
<description>RW, ADC/TouchKey channel 9/8 digital input disable</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>RB_PIN_ADC6_7_IE</name>
<description>RW, ADC/TouchKey channel 7/6 digital input disable</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>RB_PIN_ADC10_IE</name>
<description>RW, ADC/TouchKey channel 10 digital input disable</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>RB_PIN_ADC11_IE</name>
<description>RW, ADC/TouchKey channel 11 digital input disable</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>RB_PIN_USB2_DP_PU</name>
<description>RW,USB2 UDP internal pullup resistance enable</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>RB_PIN_USB2_IE</name>
<description>RW, USB analog I/O enable: 0=analog I/O disable, 1=analog I/O enable</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>RB_PIN_USB_DP_PU</name>
<description>RW,USB UDP internal pullup resistance enable</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>RB_PIN_USB_IE</name>
<description>RW, USB analog I/O enable: 0=analog I/O disable, 1=analog I/O enable</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>RB_PIN_ADC0_IE</name>
<description>RW, ADC/TouchKey channel0 digital input disable: 0=digital input enable, 1=digital input disable</description>
<bitRange>[9:9]</bitRange>
</field>
<field>
<name>RB_PIN_ADC1_IE</name>
<description>RW, ADC/TouchKey channel1 digital input disable: 0=digital input enable, 1=digital input disable</description>
<bitRange>[10:10]</bitRange>
</field>
<field>
<name>RB_PIN_ADC12_IE</name>
<description>RW, ADC/TouchKey channel12 digital input disable: 0=digital input enable, 1=digital input disable</description>
<bitRange>[11:11]</bitRange>
</field>
<field>
<name>RB_PIN_ADC13_IE</name>
<description>RW, ADC/TouchKey channel13 digital input disable: 0=digital input enable, 1=digital input disable</description>
<bitRange>[12:12]</bitRange>
</field>
<field>
<name>RB_PIN_XT32K_IE</name>
<description>RW, external 32KHz oscillator digital input disable: 0=digital input enable, 1=digital input disable</description>
<bitRange>[13:13]</bitRange>
</field>
<field>
<name>RB_PIN_ADC2_3_IE</name>
<description>RW, ADC/TouchKey channel 2/3 digital input disable: 0=digital input enable, 1=digital input disable</description>
<bitRange>[14:14]</bitRange>
</field>
<field>
<name>RB_PIN_ADC4_5_IE</name>
<description>RW, ADC/TouchKey channel 4/5 digital input disable: 0=digital input enable, 1=digital input disable</description>
<bitRange>[15:15]</bitRange>
</field>
</fields>
</register>
<register>
<name>R16_POWER_PLAN</name>
<description>RWA, power plan before sleep instruction, SAM</description>
<addressOffset>0x20</addressOffset>
<size>16</size>
<access>Read or Write under safe Accessing mode</access>
<resetValue>0x11DF</resetValue>
<fields>
<field>
<name>RB_PWR_XROM</name>
<description>RWA, power for retention 2KB SRAM</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>RB_PWR_RAM2K</name>
<description>RWA, power for retention 2KB SRAM</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>RB_PWR_CORE</name>
<description>RWA, power retention for core and base peripherals</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>RB_PWR_EXTEND</name>
<description>RWA, power retention for USB and BLE</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>RB_PWR_RAM30K</name>
<description>RWA, power for main SRAM</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>RB_PWR_SYS_EN</name>
<description>RWA, power for system</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>RB_PWR_DCDC_EN</name>
<description>RWA, DC/DC converter enable: 0=DC/DC disable and bypass, 1=DC/DC enable</description>
<bitRange>[9:9]</bitRange>
</field>
<field>
<name>RB_PWR_DCDC_PRE</name>
<description>RWA, DC/DC converter pre-enable</description>
<bitRange>[10:10]</bitRange>
</field>
<field>
<name>RB_PWR_MUST_0010</name>
<description>RWA, power plan enable, auto clear after sleep executed</description>
<bitRange>[14:11]</bitRange>
<access>read-only</access>
</field>
<field>
<name>RB_PWR_PLAN_EN</name>
<description>RWA, must write 0010</description>
<bitRange>[15:15]</bitRange>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>R8_AUX_POWER_ADJ</name>
<description>RWA, aux power adjust control, SAM</description>
<addressOffset>0x22</addressOffset>
<size>8</size>
<access>Read or Write under safe Accessing mode</access>
<resetValue>0x00</resetValue>
<fields>
<field>
<name>RB_ULPLDO_ADJ</name>
<description>RWA, Ultra-Low-Power LDO voltage adjust</description>
<bitRange>[2:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>RB_DCDC_CHARGE</name>
<description>RWA, Ultra-Low-Power LDO voltage adjust</description>
<bitRange>[7:7]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>R8_BAT_DET_CTRL</name>
<description>RWA, battery voltage detector control, SAM</description>
<addressOffset>0x24</addressOffset>
<size>8</size>
<access>Read / Write under safe Accessing mode</access>
<resetValue>0x00</resetValue>
<fields>
<field>
<name>RB_BAT_DET_EN/RB_BAT_LOW_VTHX</name>
<description>RWA, battery voltage detector enable/select monitor threshold voltage</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>RB_BAT_MON_EN</name>
<description>RWA, battery voltage monitor enable under sleep mode</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>RB_BAT_LOWER_IE</name>
<description>RWA, interrupt enable for battery lower voltage</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>RB_BAT_LOW_IE</name>
<description>RWA, interrupt enable for battery low voltage</description>
<bitRange>[3:3]</bitRange>
</field>
</fields>
</register>
<register>
<name>R8_BAT_DET_CFG</name>
<description>RWA, battery voltage detector configuration, SAM</description>
<addressOffset>0x25</addressOffset>
<size>8</size>
<access>Read or Write under safe Accessing mode</access>
<resetValue>0x01</resetValue>
<fields>
<field>
<name>RB_BAT_LOW_VTH</name>
<description>RWA, select threshold voltage of battery voltage low</description>
<bitRange>[1:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>R8_BAT_STATUS</name>
<description>RO, battery status</description>
<addressOffset>0x26</addressOffset>
<size>8</size>
<access>read-only</access>
<resetValue>0x00</resetValue>
<fields>
<field>
<name>RB_BAT_STAT_LOWER</name>
<description>RO, battery lower voltage status, high action</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>RB_BAT_STAT_LOW</name>
<description>RO, battery low voltage status, high action</description>
<bitRange>[1:1]</bitRange>
</field>
</fields>
</register>
<register>
<name>R16_INT32K_TUNE</name>
<description>RWA, internal 32KHz oscillator tune control, SAM</description>
<addressOffset>0x2C</addressOffset>
<size>16</size>
<access>Read or Write under safe Accessing mode</access>
<resetValue>0x1011</resetValue>
<fields>
<field>
<name>RB_INT32K_TUNE</name>
<description>RWA, internal 32KHz oscillator frequency tune</description>
<bitRange>[12:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>R8_XT32K_TUNE</name>
<description>RWA, external 32KHz oscillator tune control, SAM</description>
<addressOffset>0x2E</addressOffset>
<size>8</size>
<access>Read or Write under safe Accessing mode</access>
<resetValue>0xC3</resetValue>
<fields>
<field>
<name>RB_XT32K_I_TUNE</name>
<description>RWA, external 32KHz oscillator current tune: 00=75% current, 01=standard current, 10=150% current, 11=200% current</description>
<bitRange>[1:0]</bitRange>
</field>
<field>
<name>RB_XT32K_C_LOAD</name>
<description>RWA, external 32KHz oscillator load capacitor tune: Cap = RB_XT32K_C_LOAD + 12pF</description>
<bitRange>[7:4]</bitRange>
</field>
</fields>
</register>
<register>
<name>R8_CK32K_CONFIG</name>
<description>RWA, 32KHz oscillator configure</description>
<addressOffset>0x2F</addressOffset>
<size>8</size>
<access>Read or Write under safe Accessing mode</access>
<resetValue>0xX2</resetValue>
<fields>
<field>
<name>RB_CLK_XT32K_PON</name>
<description>RWA, external 32KHz oscillator power on</description>
<bitRange>[0:0]</bitRange>
<access>read-write</access>
</field>
<field>
<name>RB_CLK_INT32K_PON</name>
<description>RWA, internal 32KHz oscillator power on</description>
<bitRange>[1:1]</bitRange>
<access>read-write</access>
</field>
<field>
<name>RB_CLK_OSC32K_XT</name>
<description>RWA, 32KHz oscillator source selection: 0=RC, 1=XT</description>
<bitRange>[2:2]</bitRange>
<access>read-write</access>
</field>
<field>
<name>RB_CLK_OSC32K_FILT</name>
<description>RWA, internal 32KHz oscillator low noise mode enable</description>
<bitRange>[3:3]</bitRange>
<access>read-write</access>
</field>
<field>
<name>RB_32K_CLK_PIN</name>
<description>RO, 32KHz oscillator clock pin status</description>
<bitRange>[7:7]</bitRange>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>R8_RTC_FLAG_CTRL</name>
<description>RW, RTC flag and clear control</description>
<addressOffset>0x30</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x30</resetValue>
<fields>
<field>
<name>RB_RTC_TMR_CLR</name>
<description>RW, set 1 to clear RTC timer action flag, auto clear</description>
<bitRange>[4:4]</bitRange>
<access>read-write</access>
</field>
<field>
<name>RB_RTC_TRIG_CLR</name>
<description>RW, set 1 to clear RTC trigger action flag, auto clear</description>
<bitRange>[5:5]</bitRange>
<access>read-write</access>
</field>
<field>
<name>RB_RTC_TMR_FLAG</name>
<description>RO, RTC timer action flag</description>
<bitRange>[6:6]</bitRange>
<access>read-only</access>
</field>
<field>
<name>RB_RTC_TRIG_FLAG</name>
<description>RO, RTC trigger action flag</description>
<bitRange>[7:7]</bitRange>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>R8_RTC_MODE_CTRL</name>
<description>RWA, RTC mode control, SAM</description>
<addressOffset>0x31</addressOffset>
<size>8</size>
<access>Read or Write under safe Accessing mode</access>
<resetValue>0x02</resetValue>
<fields>
<field>
<name>RB_RTC_TMR_MODE</name>
<description>RWA, RTC timer mode: 000=0.125S, 001=0.25S, 010=0.5S, 011=1S, 100=2S, 101=4S, 110=8S, 111=16S</description>
<bitRange>[2:0]</bitRange>
</field>
<field>
<name>RB_RTC_IGNORE_B0</name>
<description>RWA, force ignore bit0 for trigger mode: 0=compare bit0, 1=ignore bit0</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>RB_RTC_TMR_EN</name>
<description>RWA, RTC timer mode enable</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>RB_RTC_TRIG_EN</name>
<description>RWA, RTC trigger mode enable</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>RB_RTC_LOAD_LO</name>
<description>RWA, set 1 to load RTC count low word R32_RTC_CNT_32K, auto clear after loaded</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>RB_RTC_LOAD_HI</name>
<description>RWA, set 1 to load RTC count high word R32_RTC_CNT_DAY, auto clear after loaded</description>
<bitRange>[7:7]</bitRange>
</field>
</fields>
</register>
<register>
<name>R32_RTC_TRIG</name>
<description>RWA, RTC trigger value, SAM</description>
<addressOffset>0x34</addressOffset>
<size>32</size>
<access>Read or Write under safe Accessing mode</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>R32_RTC_TRIG</name>
<description>RWA, RTC trigger value</description>
<bitRange>[31:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>R16_RTC_CNT_32K</name>
<description>RO, RTC count based 32KHz</description>
<addressOffset>0x38</addressOffset>
<size>16</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>R16_RTC_CNT_32K</name>
<description>RWA,RTC count based 32KHz</description>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>R16_RTC_CNT_2S</name>
<description>RO, RTC count based 2 second</description>
<addressOffset>0x3A</addressOffset>
<size>16</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>R16_RTC_CNT_2S</name>
<description>RO, RTC count based 2 second</description>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>R32_RTC_CNT_DAY</name>
<description>RO, RTC count based one day, only low 14 bit</description>
<addressOffset>0x3C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>R32_RTC_CNT_DAY</name>
<description>RWA,RTC count based one day</description>
<bitRange>[13:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>R8_SAFE_ACCESS_SIG</name>
<description>WO, safe accessing sign register, must write SAFE_ACCESS_SIG1 then SAFE_ACCESS_SIG2 to enter safe accessing mode</description>
<addressOffset>0x40</addressOffset>
<size>8</size>
<access>read/write</access>
<resetValue>0x00</resetValue>
<fields>
<field>
<name>RB_SAFE_ACC_MODE</name>
<description>RO, current safe accessing mode: 11=safe unlocked (SAM), other=locked (00..01..10..11)</description>
<bitRange>[1:0]</bitRange>
</field>
<field>
<name>RB_SAFE_ACC_ACT</name>
<description>RO, indicate safe accessing status now: 0=locked, read only, 1=safe/unlocked (SAM), write enabled</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>RB_SAFE_ACC_TIMER</name>
<description>RO, safe accessing timer bit mask (16*clock number)</description>
<bitRange>[6:4]</bitRange>
</field>
<field>
<name>R8_SAFE_ACCESS_SIG</name>
<description>WO, safe accessing sign register, must write 0x57 then 0xA8 to enter safe accessing mode</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>R8_CHIP_ID</name>
<description>RF, chip ID register, always is ID_CH58*</description>
<addressOffset>0x41</addressOffset>
<size>8</size>
<access>-Read only for Fixed value</access>
<resetValue>0x83</resetValue>
<field>
<name>R8_CHIP_ID</name>
<description>RF,chip ID register </description>
<bitRange>[7:0]</bitRange>
</field>
</register>
<register>
<name>R8_SAFE_ACCESS_ID</name>
<description>RF, safe accessing ID register, always 0x0C</description>
<addressOffset>0x42</addressOffset>
<size>8</size>
<access>-Read only for Fixed value</access>
<resetValue>0x0C</resetValue>
<field>
<name>R8_SAFE_ACCESS_ID</name>
<description>RF,safe accessing ID register </description>
<bitRange>[7:0]</bitRange>
</field>
</register>
<register>
<name>R8_WDOG_COUNT</name>
<description>RW, watch-dog count, count by clock frequency Fsys/131072</description>
<addressOffset>0x43</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0x00</resetValue>
<field>
<name>R8_WDOG_COUNT</name>
<description>RF,watch-dog count, count by clock frequency Fsys/131072</description>
<bitRange>[7:0]</bitRange>
</field>
</register>
<register>
<name>R8_RESET_STATUS/R8_GLOB_ROM_CFG</name>
<description>RWA, reset status, SAM or flash ROM configuration</description>
<addressOffset>0x44</addressOffset>
<access>-Read only for Fixed value</access>
<size>8</size>
<resetValue>0x01</resetValue>
<fields>
<field>
<name>RB_RESET_FLAG</name>
<description>RO, recent reset flag</description>
<bitRange>[2:0]</bitRange>
<access>read-only</access>
</field>
<field>
<name>RB_ROM_CODE_OFS</name>
<description>RWA, code offset address selection in Flash ROM: 0=start address 0x000000, 1=start address 0x008000</description>
<bitRange>[4:4]</bitRange>
<access>read-write</access>
</field>
<field>
<name>RB_ROM_CTRL_EN</name>
<description>RWA, enable flash ROM control interface enable</description>
<bitRange>[5:5]</bitRange>
<access>read-write</access>
</field>
<field>
<name>RB_ROM_DATA_WE</name>
<description>RWA,enable flash ROM data and code area being erase/write</description>
<bitRange>[6:6]</bitRange>
<access>read-write</access>
</field>
<field>
<name>RB_ROM_CODE_WE</name>
<description>RWA, enable flash ROM code area being erase or write</description>
<bitRange>[7:7]</bitRange>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>R8_GLOB_CFG_INFO</name>
<description>RO, global configuration information and status</description>
<addressOffset>0x45</addressOffset>
<access>read-only</access>
<size>8</size>
<resetValue>0xEX</resetValue>
<fields>
<field>
<name>RB_CFG_ROM_READ</name>
<description>RO, indicate protected status of Flash ROM code and data: 0=reading protect, 1=enable read by external programmer</description>
<bitRange>[0:0]</bitRange>
</field>
<field>
<name>RB_CFG_RESET_EN</name>
<description>RO, manual reset input enable status</description>
<bitRange>[2:2]</bitRange>