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ShadersD2D.h
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ShadersD2D.h
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#if 0
//
// FX Version: fx_4_0
// Child effect (requires effect pool): false
//
// 4 local buffer(s)
//
cbuffer $Globals
{
uint blendop; // Offset: 0, size: 4
}
cbuffer cb0
{
float4 QuadDesc; // Offset: 0, size: 16
float4 TexCoords; // Offset: 16, size: 16
float4 MaskTexCoords; // Offset: 32, size: 16
float4 TextColor; // Offset: 48, size: 16
}
cbuffer cb1
{
float4 BlurOffsetsH[3]; // Offset: 0, size: 48
float4 BlurOffsetsV[3]; // Offset: 48, size: 48
float4 BlurWeights[3]; // Offset: 96, size: 48
float4 ShadowColor; // Offset: 144, size: 16
}
cbuffer cb2
{
float3x3 DeviceSpaceToUserSpace; // Offset: 0, size: 44
float2 dimensions; // Offset: 48, size: 8
float3 diff; // Offset: 64, size: 12
float2 center1; // Offset: 80, size: 8
float A; // Offset: 88, size: 4
float radius1; // Offset: 92, size: 4
float sq_radius1; // Offset: 96, size: 4
}
//
// 13 local object(s)
//
Texture2D tex;
Texture2D bcktex;
Texture2D mask;
SamplerState sSampler
{
Filter = uint(MIN_MAG_MIP_LINEAR /* 21 */);
Texture = tex;
AddressU = uint(CLAMP /* 3 */);
AddressV = uint(CLAMP /* 3 */);
};
SamplerState sBckSampler
{
Filter = uint(MIN_MAG_MIP_LINEAR /* 21 */);
Texture = bcktex;
AddressU = uint(CLAMP /* 3 */);
AddressV = uint(CLAMP /* 3 */);
};
SamplerState sWrapSampler
{
Filter = uint(MIN_MAG_MIP_LINEAR /* 21 */);
Texture = tex;
AddressU = uint(WRAP /* 1 */);
AddressV = uint(WRAP /* 1 */);
};
SamplerState sMirrorSampler
{
Filter = uint(MIN_MAG_MIP_LINEAR /* 21 */);
Texture = tex;
AddressU = uint(MIRROR /* 2 */);
AddressV = uint(MIRROR /* 2 */);
};
SamplerState sMaskSampler
{
Filter = uint(MIN_MAG_MIP_LINEAR /* 21 */);
Texture = mask;
AddressU = uint(CLAMP /* 3 */);
AddressV = uint(CLAMP /* 3 */);
};
SamplerState sShadowSampler
{
Filter = uint(MIN_MAG_MIP_LINEAR /* 21 */);
Texture = tex;
AddressU = uint(BORDER /* 4 */);
AddressV = uint(BORDER /* 4 */);
BorderColor = float4(0, 0, 0, 0);
};
RasterizerState TextureRast
{
ScissorEnable = bool(TRUE /* 1 */);
CullMode = uint(NONE /* 1 */);
};
BlendState ShadowBlendH
{
BlendEnable[0] = bool(FALSE /* 0 */);
RenderTargetWriteMask[0] = byte(0x0f);
};
BlendState ShadowBlendV
{
BlendEnable[0] = bool(TRUE /* 1 */);
SrcBlend[0] = uint(ONE /* 2 */);
DestBlend[0] = uint(INV_SRC_ALPHA /* 6 */);
BlendOp[0] = uint(ADD /* 1 */);
SrcBlendAlpha[0] = uint(ONE /* 2 */);
DestBlendAlpha[0] = uint(INV_SRC_ALPHA /* 6 */);
BlendOpAlpha[0] = uint(ADD /* 1 */);
RenderTargetWriteMask[0] = byte(0x0f);
};
BlendState bTextBlend
{
AlphaToCoverageEnable = bool(FALSE /* 0 */);
BlendEnable[0] = bool(TRUE /* 1 */);
SrcBlend[0] = uint(SRC1_COLOR /* 16 */);
DestBlend[0] = uint(INV_SRC1_COLOR /* 17 */);
BlendOp[0] = uint(ADD /* 1 */);
SrcBlendAlpha[0] = uint(SRC1_ALPHA /* 18 */);
DestBlendAlpha[0] = uint(INV_SRC1_ALPHA /* 19 */);
BlendOpAlpha[0] = uint(ADD /* 1 */);
RenderTargetWriteMask[0] = byte(0x0f);
};
//
// 8 technique(s)
//
technique10 SampleTexture
{
pass P0
{
RasterizerState = TextureRast;
VertexShader = asm {
//
// Generated by Microsoft (R) HLSL Shader Compiler 6.3.9600.16384
//
//
// Buffer Definitions:
//
// cbuffer cb0
// {
//
// float4 QuadDesc; // Offset: 0 Size: 16
// float4 TexCoords; // Offset: 16 Size: 16
// float4 MaskTexCoords; // Offset: 32 Size: 16
// float4 TextColor; // Offset: 48 Size: 16 [unused]
//
// }
//
//
// Resource Bindings:
//
// Name Type Format Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// cb0 cbuffer NA NA 0 1
//
//
//
// Input signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION 0 xyz 0 NONE float xy
//
//
// Output signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Position 0 xyzw 0 POS float xyzw
// TEXCOORD 0 xy 1 NONE float xy
// TEXCOORD 1 zw 1 NONE float zw
//
//
// Constant buffer to DX9 shader constant mappings:
//
// Target Reg Buffer Start Reg # of Regs Data Conversion
// ---------- ------- --------- --------- ----------------------
// c1 cb0 0 3 ( FLT, FLT, FLT, FLT)
//
//
// Runtime generated constant mappings:
//
// Target Reg Constant Description
// ---------- --------------------------------------------------
// c0 Vertex Shader position offset
//
//
// Level9 shader bytecode:
//
vs_2_x
def c4, 0, 1, 0, 0
dcl_texcoord v0
mad oT0.xy, v0, c2.zwzw, c2
mad oT0.zw, v0.xyyx, c3.xywz, c3.xyyx
mad r0.xy, v0, c1.zwzw, c1
add oPos.xy, r0, c0
mov oPos.zw, c4.xyxy
// approximately 5 instruction slots used
vs_4_0
dcl_constantbuffer cb0[3], immediateIndexed
dcl_input v0.xy
dcl_output_siv o0.xyzw, position
dcl_output o1.xy
dcl_output o1.zw
mad o0.xy, v0.xyxx, cb0[0].zwzz, cb0[0].xyxx
mov o0.zw, l(0,0,0,1.000000)
mad o1.xy, v0.xyxx, cb0[1].zwzz, cb0[1].xyxx
mad o1.zw, v0.xxxy, cb0[2].zzzw, cb0[2].xxxy
ret
// Approximately 5 instruction slots used
};
GeometryShader = NULL;
PixelShader = asm {
//
// Generated by Microsoft (R) HLSL Shader Compiler 6.3.9600.16384
//
//
// Resource Bindings:
//
// Name Type Format Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// sSampler sampler NA NA 0 1
// tex texture float4 2d 0 1
//
//
//
// Input signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Position 0 xyzw 0 POS float
// TEXCOORD 0 xy 1 NONE float xy
// TEXCOORD 1 zw 1 NONE float
//
//
// Output signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Target 0 xyzw 0 TARGET float xyzw
//
//
// Sampler/Resource to DX9 shader sampler mappings:
//
// Target Sampler Source Sampler Source Resource
// -------------- --------------- ----------------
// s0 s0 t0
//
//
// Level9 shader bytecode:
//
ps_2_x
dcl t0
dcl_2d s0
texld r0, t0, s0
mov oC0, r0
// approximately 2 instruction slots used (1 texture, 1 arithmetic)
ps_4_0
dcl_sampler s0, mode_default
dcl_resource_texture2d (float,float,float,float) t0
dcl_input_ps linear v1.xy
dcl_output o0.xyzw
sample o0.xyzw, v1.xyxx, t0.xyzw, s0
ret
// Approximately 2 instruction slots used
};
}
}
technique10 SampleTextureForSeparableBlending_1
{
pass P0
{
RasterizerState = TextureRast;
VertexShader = asm {
//
// Generated by Microsoft (R) HLSL Shader Compiler 6.3.9600.16384
//
//
// Buffer Definitions:
//
// cbuffer cb0
// {
//
// float4 QuadDesc; // Offset: 0 Size: 16
// float4 TexCoords; // Offset: 16 Size: 16
// float4 MaskTexCoords; // Offset: 32 Size: 16
// float4 TextColor; // Offset: 48 Size: 16 [unused]
//
// }
//
//
// Resource Bindings:
//
// Name Type Format Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// cb0 cbuffer NA NA 0 1
//
//
//
// Input signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION 0 xyz 0 NONE float xy
//
//
// Output signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Position 0 xyzw 0 POS float xyzw
// TEXCOORD 0 xy 1 NONE float xy
// TEXCOORD 1 zw 1 NONE float zw
//
//
// Constant buffer to DX9 shader constant mappings:
//
// Target Reg Buffer Start Reg # of Regs Data Conversion
// ---------- ------- --------- --------- ----------------------
// c1 cb0 0 3 ( FLT, FLT, FLT, FLT)
//
//
// Runtime generated constant mappings:
//
// Target Reg Constant Description
// ---------- --------------------------------------------------
// c0 Vertex Shader position offset
//
//
// Level9 shader bytecode:
//
vs_2_x
def c4, 0, 1, 0, 0
dcl_texcoord v0
mad oT0.xy, v0, c2.zwzw, c2
mad oT0.zw, v0.xyyx, c3.xywz, c3.xyyx
mad r0.xy, v0, c1.zwzw, c1
add oPos.xy, r0, c0
mov oPos.zw, c4.xyxy
// approximately 5 instruction slots used
vs_4_0
dcl_constantbuffer cb0[3], immediateIndexed
dcl_input v0.xy
dcl_output_siv o0.xyzw, position
dcl_output o1.xy
dcl_output o1.zw
mad o0.xy, v0.xyxx, cb0[0].zwzz, cb0[0].xyxx
mov o0.zw, l(0,0,0,1.000000)
mad o1.xy, v0.xyxx, cb0[1].zwzz, cb0[1].xyxx
mad o1.zw, v0.xxxy, cb0[2].zzzw, cb0[2].xxxy
ret
// Approximately 5 instruction slots used
};
GeometryShader = NULL;
PixelShader = asm {
//
// Generated by Microsoft (R) HLSL Shader Compiler 6.3.9600.16384
//
//
// Buffer Definitions:
//
// cbuffer $Globals
// {
//
// uint blendop; // Offset: 0 Size: 4
//
// }
//
//
// Resource Bindings:
//
// Name Type Format Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// sSampler sampler NA NA 0 1
// sBckSampler sampler NA NA 1 1
// tex texture float4 2d 0 1
// bcktex texture float4 2d 1 1
// $Globals cbuffer NA NA 0 1
//
//
//
// Input signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Position 0 xyzw 0 POS float
// TEXCOORD 0 xy 1 NONE float xy
// TEXCOORD 1 zw 1 NONE float
//
//
// Output signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Target 0 xyzw 0 TARGET float xyzw
//
//
// Constant buffer to DX9 shader constant mappings:
//
// Target Reg Buffer Start Reg # of Regs Data Conversion
// ---------- ------- --------- --------- ----------------------
// c0 cb0 0 1 (UINT, FLT, FLT, FLT)
//
//
// Sampler/Resource to DX9 shader sampler mappings:
//
// Target Sampler Source Sampler Source Resource
// -------------- --------------- ----------------
// s0 s0 t0
// s1 s1 t1
//
//
// Level9 shader bytecode:
//
ps_2_x
def c1, -1, -2, -3, -4
def c2, 1, 0, 0.5, -2
def c3, -5, 0, 0, 0
dcl t0
dcl_2d s0
dcl_2d s1
mov r0.w, c0.x
add r0.x, r0.w, c3.x
mul r0.x, r0.x, r0.x
texld r1, t0, s1
texld r2, t0, s0
rcp r0.y, r2.w
mad r3.xyz, r2, r0.y, -c2.x
mul r3.xyz, r3, r3
mad r4.xyz, r2, -r0.y, c2.x
rcp r3.w, r4.x
rcp r4.w, r1.w
mul r5.xyz, r1, r4.w
mad r1.xyz, r1, -r4.w, c2.z
mul r3.w, r3.w, r5.x
min r4.w, r3.w, c2.x
cmp r4.w, -r3.x, c2.x, r4.w
mul r6.xyz, r5, r5
cmp r7.x, -r6.x, c2.y, r4.w
rcp r4.w, r4.y
mul r4.w, r4.w, r5.y
min r5.w, r4.w, c2.x
cmp r4.w, -r3.y, c2.x, r5.w
cmp r7.y, -r6.y, c2.y, r4.w
rcp r4.w, r4.z
mul r4.w, r4.w, r5.z
min r5.w, r4.w, c2.x
cmp r4.w, -r3.z, c2.x, r5.w
cmp r7.z, -r6.z, c2.y, r4.w
mul r3.xyz, r0.y, r2
mad r6.xyz, r2, r0.y, r5
mad r6.xyz, r3, -r5, r6
max r8.xyz, r3, r5
cmp r0.xyz, -r0.x, r8, r7
add r7, r0.w, c1
mul r7, r7, r7
min r8.xyz, r5, r3
cmp r0.xyz, -r7.w, r8, r0
mad r8.xyz, r5, -c2.w, -c2.x
add r8.xyz, -r8, c2.x
mad r4.xyz, r4, -r8, c2.x
add r8.xyz, r5, r5
mul r5.xyz, r5, r3
mul r8.xyz, r3, r8
cmp r1.xyz, r1, r8, r4
cmp r0.xyz, -r7.z, r1, r0
cmp r0.xyz, -r7.y, r6, r0
cmp r0.xyz, -r7.x, r5, r0
lrp r4.xyz, r1.w, r0, r3
mul r4.w, r1.w, r1.w
cmp r4.w, -r4.w, c2.x, c2.y
mul r0.xyz, r2.w, r4
mul r0.w, r2.w, r2.w
cmp r0.w, -r0.w, c2.x, c2.y
add r0.w, r4.w, r0.w
cmp r2.xyz, -r0.w, r0, r2
mov oC0, r2
// approximately 56 instruction slots used (2 texture, 54 arithmetic)
ps_4_0
dcl_constantbuffer cb0[1], immediateIndexed
dcl_sampler s0, mode_default
dcl_sampler s1, mode_default
dcl_resource_texture2d (float,float,float,float) t0
dcl_resource_texture2d (float,float,float,float) t1
dcl_input_ps linear v1.xy
dcl_output o0.xyzw
dcl_temps 7
sample r0.xyzw, v1.xyxx, t0.xyzw, s0
sample r1.xyzw, v1.xyxx, t1.xyzw, s1
eq r2.x, r0.w, l(0.000000)
eq r2.y, r1.w, l(0.000000)
or r2.x, r2.y, r2.x
if_nz r2.x
mov o0.xyzw, r0.xyzw
ret
endif
div r0.xyz, r0.xyzx, r0.wwww
div r1.xyz, r1.xyzx, r1.wwww
ieq r2.x, cb0[0].x, l(1)
if_nz r2.x
mul r2.xyz, r0.xyzx, r1.xyzx
else
ieq r2.w, cb0[0].x, l(2)
if_nz r2.w
add r3.xyz, r0.xyzx, r1.xyzx
mad r2.xyz, -r0.xyzx, r1.xyzx, r3.xyzx
else
ieq r2.w, cb0[0].x, l(3)
if_nz r2.w
ge r3.xyz, l(0.500000, 0.500000, 0.500000, 0.000000), r1.xyzx
add r4.xyz, r1.xyzx, r1.xyzx
mul r4.xyz, r0.xyzx, r4.xyzx
mad r5.xyz, r1.xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), l(-1.000000, -1.000000, -1.000000, 0.000000)
add r6.xyz, -r0.xyzx, l(1.000000, 1.000000, 1.000000, 0.000000)
add r5.xyz, -r5.xyzx, l(1.000000, 1.000000, 1.000000, 0.000000)
mad r5.xyz, -r6.xyzx, r5.xyzx, l(1.000000, 1.000000, 1.000000, 0.000000)
movc r2.xyz, r3.xyzx, r4.xyzx, r5.xyzx
else
ieq r2.w, cb0[0].x, l(4)
if_nz r2.w
min r2.xyz, r0.xyzx, r1.xyzx
else
ieq r2.w, cb0[0].x, l(5)
if_nz r2.w
max r2.xyz, r0.xyzx, r1.xyzx
else
eq r3.xyz, r1.xyzx, l(0.000000, 0.000000, 0.000000, 0.000000)
eq r4.xyz, r0.xyzx, l(1.000000, 1.000000, 1.000000, 0.000000)
add r5.xyz, -r0.xyzx, l(1.000000, 1.000000, 1.000000, 0.000000)
div r1.xyz, r1.xyzx, r5.xyzx
min r1.xyz, r1.xyzx, l(1.000000, 1.000000, 1.000000, 0.000000)
movc r1.xyz, r4.xyzx, l(1.000000,1.000000,1.000000,0), r1.xyzx
movc r2.xyz, r3.xyzx, l(0,0,0,0), r1.xyzx
endif
endif
endif
endif
endif
add r1.x, -r1.w, l(1.000000)
mul r1.yzw, r1.wwww, r2.xxyz
mad r0.xyz, r1.xxxx, r0.xyzx, r1.yzwy
mul o0.xyz, r0.wwww, r0.xyzx
mov o0.w, r0.w
ret
// Approximately 57 instruction slots used
};
}
}
technique10 SampleTextureForSeparableBlending_2
{
pass P0
{
RasterizerState = TextureRast;
VertexShader = asm {
//
// Generated by Microsoft (R) HLSL Shader Compiler 6.3.9600.16384
//
//
// Buffer Definitions:
//
// cbuffer cb0
// {
//
// float4 QuadDesc; // Offset: 0 Size: 16
// float4 TexCoords; // Offset: 16 Size: 16
// float4 MaskTexCoords; // Offset: 32 Size: 16
// float4 TextColor; // Offset: 48 Size: 16 [unused]
//
// }
//
//
// Resource Bindings:
//
// Name Type Format Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// cb0 cbuffer NA NA 0 1
//
//
//
// Input signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION 0 xyz 0 NONE float xy
//
//
// Output signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Position 0 xyzw 0 POS float xyzw
// TEXCOORD 0 xy 1 NONE float xy
// TEXCOORD 1 zw 1 NONE float zw
//
//
// Constant buffer to DX9 shader constant mappings:
//
// Target Reg Buffer Start Reg # of Regs Data Conversion
// ---------- ------- --------- --------- ----------------------
// c1 cb0 0 3 ( FLT, FLT, FLT, FLT)
//
//
// Runtime generated constant mappings:
//
// Target Reg Constant Description
// ---------- --------------------------------------------------
// c0 Vertex Shader position offset
//
//
// Level9 shader bytecode:
//
vs_2_x
def c4, 0, 1, 0, 0
dcl_texcoord v0
mad oT0.xy, v0, c2.zwzw, c2
mad oT0.zw, v0.xyyx, c3.xywz, c3.xyyx
mad r0.xy, v0, c1.zwzw, c1
add oPos.xy, r0, c0
mov oPos.zw, c4.xyxy
// approximately 5 instruction slots used
vs_4_0
dcl_constantbuffer cb0[3], immediateIndexed
dcl_input v0.xy
dcl_output_siv o0.xyzw, position
dcl_output o1.xy
dcl_output o1.zw
mad o0.xy, v0.xyxx, cb0[0].zwzz, cb0[0].xyxx
mov o0.zw, l(0,0,0,1.000000)
mad o1.xy, v0.xyxx, cb0[1].zwzz, cb0[1].xyxx
mad o1.zw, v0.xxxy, cb0[2].zzzw, cb0[2].xxxy
ret
// Approximately 5 instruction slots used
};
GeometryShader = NULL;
PixelShader = asm {
//
// Generated by Microsoft (R) HLSL Shader Compiler 6.3.9600.16384
//
//
// Buffer Definitions:
//
// cbuffer $Globals
// {
//
// uint blendop; // Offset: 0 Size: 4
//
// }
//
//
// Resource Bindings:
//
// Name Type Format Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// sSampler sampler NA NA 0 1
// sBckSampler sampler NA NA 1 1
// tex texture float4 2d 0 1
// bcktex texture float4 2d 1 1
// $Globals cbuffer NA NA 0 1
//
//
//
// Input signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Position 0 xyzw 0 POS float
// TEXCOORD 0 xy 1 NONE float xy
// TEXCOORD 1 zw 1 NONE float
//
//
// Output signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Target 0 xyzw 0 TARGET float xyzw
//
//
// Constant buffer to DX9 shader constant mappings:
//
// Target Reg Buffer Start Reg # of Regs Data Conversion
// ---------- ------- --------- --------- ----------------------
// c0 cb0 0 1 (UINT, FLT, FLT, FLT)
//
//
// Sampler/Resource to DX9 shader sampler mappings:
//
// Target Sampler Source Sampler Source Resource
// -------------- --------------- ----------------
// s0 s0 t0
// s1 s1 t1
//
//
// Level9 shader bytecode:
//
ps_2_x
def c1, -7, -8, -9, -10
def c2, 1, 0, -1, 0.25
def c3, 0.5, 2, -1, 4
def c4, 16, -12, 2, 1
dcl t0
dcl_2d s0
dcl_2d s1
mov r0.w, c0.x
add r0, r0.w, c1
mul r0, r0, r0
texld r1, t0, s0
texld r2, t0, s1
rcp r3.w, r2.w
mad r3.xy, r2.yzzw, -r3.w, c2.w
mul r4.xyz, r2, r3.w
mad r5.xyz, r4, c4.x, c4.y
mad r5.xyz, r5, r4, c3.w
mul r5.xyz, r4, r5
rsq r4.w, r4.y
rcp r4.w, r4.w
cmp r4.w, r3.x, r5.y, r4.w
mad r4.w, r2.y, -r3.w, r4.w
rcp r3.x, r1.w
mul r6.xyz, r1, r3.x
mad r7.xyz, r6, c3.y, c3.z
mad r4.w, r7.y, r4.w, r4.y
mad r8.xyz, r1, -r3.x, c3.x
mad r9, r2.xyzx, -r3.w, c2.xxxw
mad r10.xyz, r6, -c4.z, c4.w
mul r10.xyz, r4, r10
mad r10.xyz, r10, -r9, r4
cmp r11.y, r8.y, r10.y, r4.w
rsq r4.w, r4.z
rcp r4.w, r4.w
cmp r4.w, r3.y, r5.z, r4.w
mad r4.w, r2.z, -r3.w, r4.w
mad r4.w, r7.z, r4.w, r4.z
cmp r11.z, r8.z, r10.z, r4.w
rsq r4.w, r4.x
rcp r4.w, r4.w
cmp r4.w, r9.w, r5.x, r4.w
mad r4.w, r2.x, -r3.w, r4.w
mad r2.xyz, r2, r3.w, c2.z
mul r2.xyz, r2, r2
mad r4.w, r7.x, r4.w, r4.x
add r3.yzw, -r7.xxyz, c2.x
mad r3.yzw, r9.xxyz, -r3, c2.x
cmp r11.x, r8.x, r10.x, r4.w
mad r5.xyz, r1, r3.x, -r4
mad r7.xyz, r1, r3.x, r4
abs r5.xyz, r5
mul r10.xyz, r4, r6
mad r7.xyz, r10, -c3.y, r7
cmp r5.xyz, -r0.w, r5, r7
cmp r5.xyz, -r0.z, r11, r5
add r7.xyz, r6, r6
mul r4.xyz, r4, r7
cmp r3.xyz, r8, r4, r3.yzww
cmp r0.yzw, -r0.y, r3.xxyz, r5.xxyz
rcp r6.w, r6.x
mad r6.w, r9.x, -r6.w, c2.x
max r3.x, r6.w, c2.y
mul r3.yzw, r6.xxyz, r6.xxyz
cmp r6.w, -r3.y, c2.y, r3.x
cmp r4.x, -r2.x, c2.x, r6.w
rcp r4.w, r6.y
mad r4.w, r9.y, -r4.w, c2.x
max r6.w, r4.w, c2.y
cmp r4.w, -r3.z, c2.y, r6.w
cmp r4.y, -r2.y, c2.x, r4.w
rcp r4.w, r6.z
mad r4.w, r9.z, -r4.w, c2.x
max r6.w, r4.w, c2.y
cmp r4.w, -r3.w, c2.y, r6.w
cmp r4.z, -r2.z, c2.x, r4.w
cmp r0.xyz, -r0.x, r4, r0.yzww
lrp r3.xyz, r2.w, r0, r6
mul r3.w, r2.w, r2.w
cmp r3.w, -r3.w, c2.x, c2.y
mul r0.xyz, r1.w, r3
mul r0.w, r1.w, r1.w
cmp r0.w, -r0.w, c2.x, c2.y
add r0.w, r3.w, r0.w
cmp r1.xyz, -r0.w, r0, r1
mov oC0, r1
// approximately 78 instruction slots used (2 texture, 76 arithmetic)
ps_4_0
dcl_constantbuffer cb0[1], immediateIndexed
dcl_sampler s0, mode_default
dcl_sampler s1, mode_default
dcl_resource_texture2d (float,float,float,float) t0
dcl_resource_texture2d (float,float,float,float) t1
dcl_input_ps linear v1.xy
dcl_output o0.xyzw
dcl_temps 7
sample r0.xyzw, v1.xyxx, t0.xyzw, s0
sample r1.xyzw, v1.xyxx, t1.xyzw, s1
eq r2.x, r0.w, l(0.000000)
eq r2.y, r1.w, l(0.000000)
or r2.x, r2.y, r2.x
if_nz r2.x
mov o0.xyzw, r0.xyzw
ret
endif
div r0.xyz, r0.xyzx, r0.wwww
div r1.xyz, r1.xyzx, r1.wwww
ieq r2.x, cb0[0].x, l(7)
if_nz r2.x
eq r2.xyz, r1.xyzx, l(1.000000, 1.000000, 1.000000, 0.000000)
eq r3.xyz, r0.xyzx, l(0.000000, 0.000000, 0.000000, 0.000000)
add r4.xyz, -r1.xyzx, l(1.000000, 1.000000, 1.000000, 0.000000)
div r4.xyz, r4.xyzx, r0.xyzx
min r4.xyz, r4.xyzx, l(1.000000, 1.000000, 1.000000, 0.000000)
add r4.xyz, -r4.xyzx, l(1.000000, 1.000000, 1.000000, 0.000000)
movc r3.xyz, r3.xyzx, l(0,0,0,0), r4.xyzx
movc r2.xyz, r2.xyzx, l(1.000000,1.000000,1.000000,0), r3.xyzx
else
ieq r2.w, cb0[0].x, l(8)
if_nz r2.w
ge r3.xyz, l(0.500000, 0.500000, 0.500000, 0.000000), r0.xyzx
add r4.xyz, r0.xyzx, r0.xyzx
mul r4.xyz, r1.xyzx, r4.xyzx
mad r5.xyz, r0.xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), l(-1.000000, -1.000000, -1.000000, 0.000000)
add r6.xyz, -r1.xyzx, l(1.000000, 1.000000, 1.000000, 0.000000)
add r5.xyz, -r5.xyzx, l(1.000000, 1.000000, 1.000000, 0.000000)
mad r5.xyz, -r6.xyzx, r5.xyzx, l(1.000000, 1.000000, 1.000000, 0.000000)
movc r2.xyz, r3.xyzx, r4.xyzx, r5.xyzx
else
ieq r2.w, cb0[0].x, l(9)
if_nz r2.w
ge r3.xyz, l(0.250000, 0.250000, 0.250000, 0.000000), r1.xyzx
mad r4.xyz, r1.xyzx, l(16.000000, 16.000000, 16.000000, 0.000000), l(-12.000000, -12.000000, -12.000000, 0.000000)
mad r4.xyz, r4.xyzx, r1.xyzx, l(4.000000, 4.000000, 4.000000, 0.000000)
mul r4.xyz, r1.xyzx, r4.xyzx
sqrt r5.xyz, r1.xyzx
movc r3.xyz, r3.xyzx, r4.xyzx, r5.xyzx
ge r4.xyz, l(0.500000, 0.500000, 0.500000, 0.000000), r0.xyzx
mad r5.xyz, -r0.xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), l(1.000000, 1.000000, 1.000000, 0.000000)
mul r5.xyz, r1.xyzx, r5.xyzx
add r6.xyz, -r1.xyzx, l(1.000000, 1.000000, 1.000000, 0.000000)
mad r5.xyz, -r5.xyzx, r6.xyzx, r1.xyzx
mad r6.xyz, r0.xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), l(-1.000000, -1.000000, -1.000000, 0.000000)
add r3.xyz, -r1.xyzx, r3.xyzx
mad r3.xyz, r6.xyzx, r3.xyzx, r1.xyzx
movc r2.xyz, r4.xyzx, r5.xyzx, r3.xyzx
else
ieq r2.w, cb0[0].x, l(10)
add r3.xyz, r0.xyzx, -r1.xyzx
add r4.xyz, r0.xyzx, r1.xyzx
mul r1.xyz, r0.xyzx, r1.xyzx
mad r1.xyz, -r1.xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r4.xyzx
movc r2.xyz, r2.wwww, |r3.xyzx|, r1.xyzx
endif
endif
endif
add r1.x, -r1.w, l(1.000000)
mul r1.yzw, r1.wwww, r2.xxyz
mad r0.xyz, r1.xxxx, r0.xyzx, r1.yzwy
mul o0.xyz, r0.wwww, r0.xyzx
mov o0.w, r0.w
ret
// Approximately 66 instruction slots used
};
}
}
technique10 SampleTextureForNonSeparableBlending
{
pass P0
{
RasterizerState = TextureRast;
VertexShader = asm {
//
// Generated by Microsoft (R) HLSL Shader Compiler 6.3.9600.16384
//
//
// Buffer Definitions:
//
// cbuffer cb0
// {
//
// float4 QuadDesc; // Offset: 0 Size: 16
// float4 TexCoords; // Offset: 16 Size: 16
// float4 MaskTexCoords; // Offset: 32 Size: 16
// float4 TextColor; // Offset: 48 Size: 16 [unused]
//
// }
//
//
// Resource Bindings:
//
// Name Type Format Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// cb0 cbuffer NA NA 0 1
//
//
//
// Input signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION 0 xyz 0 NONE float xy
//
//
// Output signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Position 0 xyzw 0 POS float xyzw
// TEXCOORD 0 xy 1 NONE float xy
// TEXCOORD 1 zw 1 NONE float zw
//
//
// Constant buffer to DX9 shader constant mappings:
//
// Target Reg Buffer Start Reg # of Regs Data Conversion
// ---------- ------- --------- --------- ----------------------
// c1 cb0 0 3 ( FLT, FLT, FLT, FLT)
//
//
// Runtime generated constant mappings:
//
// Target Reg Constant Description
// ---------- --------------------------------------------------
// c0 Vertex Shader position offset
//
//
// Level9 shader bytecode:
//
vs_2_x
def c4, 0, 1, 0, 0
dcl_texcoord v0
mad oT0.xy, v0, c2.zwzw, c2
mad oT0.zw, v0.xyyx, c3.xywz, c3.xyyx
mad r0.xy, v0, c1.zwzw, c1
add oPos.xy, r0, c0
mov oPos.zw, c4.xyxy
// approximately 5 instruction slots used
vs_4_0
dcl_constantbuffer cb0[3], immediateIndexed
dcl_input v0.xy
dcl_output_siv o0.xyzw, position
dcl_output o1.xy
dcl_output o1.zw
mad o0.xy, v0.xyxx, cb0[0].zwzz, cb0[0].xyxx
mov o0.zw, l(0,0,0,1.000000)
mad o1.xy, v0.xyxx, cb0[1].zwzz, cb0[1].xyxx
mad o1.zw, v0.xxxy, cb0[2].zzzw, cb0[2].xxxy
ret
// Approximately 5 instruction slots used
};
GeometryShader = NULL;
PixelShader = asm {
//
// Generated by Microsoft (R) HLSL Shader Compiler 6.3.9600.16384
//
//
// Buffer Definitions:
//
// cbuffer $Globals
// {
//
// uint blendop; // Offset: 0 Size: 4
//
// }
//
//
// Resource Bindings:
//
// Name Type Format Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// sSampler sampler NA NA 0 1
// sBckSampler sampler NA NA 1 1
// tex texture float4 2d 0 1
// bcktex texture float4 2d 1 1
// $Globals cbuffer NA NA 0 1
//
//
//
// Input signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Position 0 xyzw 0 POS float
// TEXCOORD 0 xy 1 NONE float xy
// TEXCOORD 1 zw 1 NONE float
//