Add RISC-V Assembly Lang

[Andriamanitra]

https://riscv.org/about/
https://en.wikipedia.org/wiki/RISC-V

Description:

RISC-V is a relatively new open standard instruction set architecture (ISA). With only 40 base instructions it is rather simple compared to x86 or ARM assembly, and thus presents an unique challenge compared to the already existing assembly language.

For code golf it would probably make sense to use the RV32GC variant (32-bit base with the "GC" set of extensions) which includes support for floating point arithmetic, multiplication/division, compressed instructions, etc in addition to the 40 instructions included in base. The scoring could make sense both in (compiled) bytes and source code characters.

It could be implemented by running the qemu-system-riscv64 emulator inside docker (example image: https://hub.docker.com/r/davidburela/riscv-emulator).

[lyphyser]

I think it might be worth considering supporting RV64GC instead of RV32GC and supporting all extensions implemented by qemu or at least adding bitmanip which has a lot of potentially useful instructions.

Unlike x86, the length of RISC-V instructions is easily determined, so there isn't much need for having a DefAsm-like JavaScript assembler.

For compilation, the simplest approach is to assemble with GNU as, use a custom tool to count bytes and then use a custom linker script (plus a custom tool if essential to avoid leaks) to produce the executable.

For the UI, a simple parser that processes directives and assigns 2 byte length to instructions starting with "c.", 6+ byte length to a fixed list of instructions and 4 bytes to everything else would suffice, and showing the exact machine code bytes is not that important.