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Changes in the NetEEPROM library. Custom tftp data port setup support…

…. Renamed to Ariadne. Fuck Yeah
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1 parent 79a37ea commit 6276f405cd19d7ba72f24392121ba7ae6340be05 @LoathingKernel LoathingKernel committed Jul 24, 2012
Showing with 5,131 additions and 4,816 deletions.
  1. +67 −8 README.md
  2. +43 −0 hardware/ariadne/boards.txt
  3. +21 −21 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/Makefile
  4. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/Makefile.previous
  5. +1 −1 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/README.md
  6. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/announce.c
  7. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/announce.h
  8. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/app.c
  9. +164 −0 hardware/ariadne/bootloaders/ariadne/ariadne_atmega328.hex
  10. +2,163 −0 hardware/ariadne/bootloaders/ariadne/ariadne_atmega328.lst
  11. +164 −0 hardware/ariadne/bootloaders/ariadne/ariadne_atmega328_ethernet.hex
  12. +2,167 −0 hardware/ariadne/bootloaders/ariadne/ariadne_atmega328_ethernet.lst
  13. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/bigapp.c
  14. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/boot.h
  15. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/debug.c
  16. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/debug.h
  17. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/main.c
  18. +4 −3 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/makeall
  19. +16 −4 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/net.c
  20. +8 −6 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/net.h
  21. +21 −0 hardware/ariadne/bootloaders/ariadne/neteeprom.h
  22. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/omake
  23. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/omake.bat
  24. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/optiboot.c
  25. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/optiboot.h
  26. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/pin_defs.h
  27. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/serial.c
  28. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/serial.h
  29. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/settings.c
  30. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/stk500.h
  31. +2 −2 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/tftp.c
  32. +11 −4 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/tftp.h
  33. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/util.c
  34. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/util.h
  35. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/validate.c
  36. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/validate.h
  37. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/w5100_reg.h
  38. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/watchdog.c
  39. 0 hardware/{tftpboot/bootloaders/tftpboot → ariadne/bootloaders/ariadne}/watchdog.h
  40. 0 hardware/{tftpboot → ariadne}/programmers.txt
  41. +0 −43 hardware/tftpboot/boards.txt
  42. +0 −16 hardware/tftpboot/bootloaders/tftpboot/neteeprom.h
  43. +0 −161 hardware/tftpboot/bootloaders/tftpboot/tftpboot_atmega328.hex
  44. +0 −2,138 hardware/tftpboot/bootloaders/tftpboot/tftpboot_atmega328.lst
  45. +0 −161 hardware/tftpboot/bootloaders/tftpboot/tftpboot_atmega328_ether.hex
  46. +0 −2,142 hardware/tftpboot/bootloaders/tftpboot/tftpboot_atmega328_ether.lst
  47. +3 −0 libraries/EthernetReset/EthernetReset.h
  48. +151 −27 libraries/NetEEPROM/NetEEPROM.cpp
  49. +47 −12 libraries/NetEEPROM/NetEEPROM.h
  50. +23 −0 libraries/NetEEPROM/NetEEPROM_defs.h
  51. +18 −50 libraries/NetEEPROM/examples/ReadNetworkSettings/ReadNetworkSettings.ino
  52. +26 −16 libraries/NetEEPROM/examples/WriteNetworkSettings/WriteNetworkSettings.ino
  53. +10 −0 libraries/NetEEPROM/keywords.txt
  54. 0 {hardware/tftpboot/bootloaders/tftpboot/utils → utilities}/SConstruct
  55. 0 {hardware/tftpboot/bootloaders/tftpboot/utils → utilities}/callgraph.ps
  56. +1 −1 {hardware/tftpboot/bootloaders/tftpboot/utils → utilities}/net-setup.sh
  57. 0 {hardware/tftpboot/bootloaders/tftpboot → utilities}/tests/blink/blink.bin
  58. 0 {hardware/tftpboot/bootloaders/tftpboot → utilities}/tests/blink/blink.hex
  59. 0 {hardware/tftpboot/bootloaders/tftpboot → utilities}/tests/fade/bigapp.bin
  60. 0 {hardware/tftpboot/bootloaders/tftpboot → utilities}/tests/led_display/led_display.bin
  61. 0 {hardware/tftpboot/bootloaders/tftpboot → utilities}/tests/led_display/led_display.hex
View
75 README.md
@@ -1,14 +1,73 @@
-TFTP-Bootloader
-===================
+Ariadne-Bootloader for Arduino and WizNet W5100
+===============================================
Bootloader for Arduino with Ethernet
------------------------------------
+This is a beta stage bootloader for Arduino Ethernet board and the regular
+Arduino with Ethernet Shield. It is based on previous unfinished work by the Arduino
+developers. The bootloader implements a TFTP server on the Arduino board and flashing works
+using any regular TFTP client.
-This is a work-in-progress bootloader for Arduino Ethernet board and the regular
-Arduino with Ethernet Shield.
-It is based on previous unfinished work by the Arduino developers as the
-developer that was hired to write it never finished it.
+The files and folders in this repository
+----------------------------------------
+The structure of this repository is made to follow the standarts of the Arduino IDE.
+This way you can simply copy the folders in your sketchbook and be ready
-The bootloader implements a tftp server on the Arduino board and flashing works
-using any regular tftp client.
+* hardware: This is where the bootloader resides.
+* java-client: Demo client for the bootloader. Inherited by the initial project. Untested and probably non-functional
+* libraries: Helper libraries to support functions of the bootloader
+* utilities: Various stuff used for development and debugging
+
+
+Downloading and installing files
+--------------------------------
+First of all, you need to clone or download the repository. To clone the repository
+you need to have git installed, then you can run
+```git clone https://github.com/codebendercc/Ariadne-Bootloader.git```
+in a directory.
+This way you can later update your local repository by running
+```git pull```
+inside the **Ariadne-Bootloader** directory.
+
+In case you want to avoid this hassle, you can use the **ZIP** button at the top of the page
+to download the latest snapshot of the repository in a zip archive and extract it.
+
+After that you have to copy the **hardware** and **libraries** folders inside your sketchbook folder.
+Take extra care during coping not to overwrite any other files. Restart the Arduino IDE to load
+the new boards and libraries.
+
+
+Burning of the bootloader
+-------------------------
+To burn the bootloader, you will need an [AVR-ISP](http://www.atmel.com/dyn/products/tools_card.asp?tool_id=2726)
+(in-system programmer), [USBtinyISP](http://www.ladyada.net/make/usbtinyisp/) or you can build a
+[ParallelProgrammer](http://arduino.cc/en/Hacking/ParallelProgrammer) or an
+[ArduinoISP](http://arduino.cc/en/Tutorial/ArduinoISP).
+The first three programmers should be connected to the ICSP pins (the 2 by 3 pin header) and make sure you plug
+it in the right way. The board must be powered by an external power supply or the USB port. In the case of _ArduinoISP_
+you should consult the above link for further instructions on how to build and use.
+
+After you have connected the Arduino board and the programmer to your computer launch the Arduino IDE.
+Navigate to the __Tools__ > __Board__ menu and select ```Arduino Duemilanove/Uno(ATmega328) w/ Ariadne Bootloader```
+if you have an Arduino Duemilanove or Uno with an Ethernet Shield or ```Arduino Ethernet w/ Ariadne Bootloader```
+for Arduino Ethernet. Then go to __Tools__ > __Programmer__ and select the programmer you are using.
+In case you are using _ArduinoISP_, make sure that the selected port in the __Tools__ > __Serial Port__ menu refers to
+the _ArduinoISP_ and not the board that you want to burn the bootloader on. Now, just launch the __Tools__ > __Burn Bootloader__
+command and wait for about 15 seconds for the operation to complete.
+
+
+Serial Flashing
+---------------
+
+
+Configuring Network Settings
+----------------------------
+
+
+TFTP Flashing
+-------------
+
+
+Configuring your Router for Remote Flashing
+-------------------------------------------
View
43 hardware/ariadne/boards.txt
@@ -0,0 +1,43 @@
+##############################################################
+
+ariadne328.name=Arduino Duemilanove/Uno(ATmega328) w/ Ariadne Bootloader
+
+ariadne328.upload.protocol=arduino
+ariadne328.upload.maximum_size=28672
+ariadne328.upload.speed=115200
+
+ariadne328.bootloader.low_fuses=0xFF
+ariadne328.bootloader.high_fuses=0xD8
+ariadne328.bootloader.extended_fuses=0x05
+ariadne328.bootloader.path=ariadne
+ariadne328.bootloader.file=ariadne_atmega328.hex
+ariadne328.bootloader.unlock_bits=0x3F
+ariadne328.bootloader.lock_bits=0x2F
+
+ariadne328.build.mcu=atmega328p
+ariadne328.build.f_cpu=16000000L
+ariadne328.build.core=arduino:arduino
+ariadne328.build.variant=arduino:standard
+
+##############################################################
+
+ariadne328eth.name=Arduino Ethernet w/ Ariadne Bootloader
+
+ariadne328eth.upload.protocol=arduino
+ariadne328eth.upload.maximum_size=28672
+ariadne328eth.upload.speed=115200
+
+ariadne328eth.bootloader.low_fuses=0xFF
+ariadne328eth.bootloader.high_fuses=0xD8
+ariadne328eth.bootloader.extended_fuses=0x05
+ariadne328eth.bootloader.path=ariadne
+ariadne328eth.bootloader.file=ariadne_atmega328_ethernet.hex
+ariadne328eth.bootloader.unlock_bits=0x3F
+ariadne328eth.bootloader.lock_bits=0x2F
+
+ariadne328eth.build.mcu=atmega328p
+ariadne328eth.build.f_cpu=16000000L
+ariadne328eth.build.core=arduino:arduino
+ariadne328eth.build.variant=arduino:standard
+
+##############################################################
View
42 ...re/tftpboot/bootloaders/tftpboot/Makefile → ...ware/ariadne/bootloaders/ariadne/Makefile
@@ -21,7 +21,7 @@
# etc...
# program name should not be changed...
-PROGRAM = tftpboot
+PROGRAM = ariadne
# The default behavior is to build using tools that are in the users
# current path variables, but we can also build using an installed
@@ -35,8 +35,8 @@ PROGRAM = tftpboot
# enter the parameters for the avrdude isp tool
# for now they default to the arduinoISP on linux
-ISPTOOL = stk500v1
-ISPPORT = /dev/ttyACM0
+ISPTOOL = usbtiny
+ISPPORT = usb
ISPSPEED = -b19200
MCU_TARGET = atmega328p
@@ -194,7 +194,7 @@ SIZE = $(GCCROOT)avr-size
# # backward compatibility of makefile
# atmega168: TARGET = atmega168
# atmega168: MCU_TARGET = atmega168
-# atmega168: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
+# atmega168: CFLAGS += '-DBAUD_RATE=115200'
# atmega168: AVR_FREQ = 16000000L
# atmega168: $(PROGRAM)_atmega168.hex
# atmega168: $(PROGRAM)_atmega168.lst
@@ -210,7 +210,7 @@ SIZE = $(GCCROOT)avr-size
#
# diecimila: TARGET = diecimila
# diecimila: MCU_TARGET = atmega168
-# diecimila: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
+# diecimila: CFLAGS += '-DBAUD_RATE=115200'
# diecimila: AVR_FREQ = 16000000L
# diecimila: $(PROGRAM)_diecimila.hex
# diecimila: $(PROGRAM)_diecimila.lst
@@ -236,31 +236,31 @@ atmega328: $(PROGRAM)_atmega328.lst
atmega328_isp: atmega328
atmega328_isp: TARGET = atmega328
atmega328_isp: MCU_TARGET = atmega328p
-# 512 byte boot, SPIEN
+# 4096 byte boot, SPIEN
atmega328_isp: HFUSE = D8
# Low power xtal (16MHz) 16KCK/14CK+65ms
atmega328_isp: LFUSE = FF
# 2.7V brownout
atmega328_isp: EFUSE = 05
atmega328_isp: isp
-atmega328_ether: TARGET = atmega328_ether
-atmega328_ether: MCU_TARGET = atmega328p
-atmega328_ether: CFLAGS += '-D_ARDUINO_ETHERNET' '-DBAUD_RATE=115200'
-atmega328_ether: AVR_FREQ = 16000000L
-atmega328_ether: LDSECTIONS = -Wl,--section-start=.text=0x7000 -Wl,--section-start=.version=0x7ffe
-atmega328_ether: $(PROGRAM)_atmega328_ether.hex
-atmega328_ether: $(PROGRAM)_atmega328_ether.lst
-atmega328_ether_isp: atmega328_ether
-atmega328_ether_isp: TARGET = atmega328_ether
-atmega328_ether_isp: MCU_TARGET = atmega328p
-# 512 byte boot, SPIEN
-atmega328_ether_isp: HFUSE = D8
+atmega328_ethernet: TARGET = atmega328_ethernet
+atmega328_ethernet: MCU_TARGET = atmega328p
+atmega328_ethernet: CFLAGS += '-D_ARDUINO_ETHERNET' '-DBAUD_RATE=115200'
+atmega328_ethernet: AVR_FREQ = 16000000L
+atmega328_ethernet: LDSECTIONS = -Wl,--section-start=.text=0x7000 -Wl,--section-start=.version=0x7ffe
+atmega328_ethernet: $(PROGRAM)_atmega328_ethernet.hex
+atmega328_ethernet: $(PROGRAM)_atmega328_ethernet.lst
+atmega328_ethernet_isp: atmega328_ethernet
+atmega328_ethernet_isp: TARGET = atmega328_ethernet
+atmega328_ethernet_isp: MCU_TARGET = atmega328p
+# 4096 byte boot, SPIEN
+atmega328_ethernet_isp: HFUSE = D8
# Low power xtal (16MHz) 16KCK/14CK+65ms
-atmega328_ether_isp: LFUSE = FF
+atmega328_ethernet_isp: LFUSE = FF
# 2.7V brownout
-atmega328_ether_isp: EFUSE = 05
-atmega328_ether_isp: isp
+atmega328_ethernet_isp: EFUSE = 05
+atmega328_ethernet_isp: isp
# # Sanguino has a minimum boot size of 1024 bytes, so enable extra functions
View
0 ...ot/bootloaders/tftpboot/Makefile.previous → ...dne/bootloaders/ariadne/Makefile.previous
File renamed without changes.
View
2 ...e/tftpboot/bootloaders/tftpboot/README.md → ...are/ariadne/bootloaders/ariadne/README.md
@@ -48,7 +48,7 @@ Uploading firmware manually:
1. Check the target board is powered, and connected to the computer ethernet.
2. Verify the computer network settings: Static IP of 192.168.1.1, Subnet of 255.255.255.0.
3. In a console window: tftp 192.168.1.250
-4. At the tftp> prompt: Make sure the tftp client is in octet mode using the
+4. At the tftp> prompt: Make sure the tftp client is in octet mode using the
mode octet" command. Here you can also put the "trace" and "verbose" commands
for some more output.
5. Push reset button to start the bootloader. The LED will blink rapidly.
View
0 .../tftpboot/bootloaders/tftpboot/announce.c → ...re/ariadne/bootloaders/ariadne/announce.c
File renamed without changes.
View
0 .../tftpboot/bootloaders/tftpboot/announce.h → ...re/ariadne/bootloaders/ariadne/announce.h
File renamed without changes.
View
0 hardware/tftpboot/bootloaders/tftpboot/app.c → hardware/ariadne/bootloaders/ariadne/app.c
File renamed without changes.
View
164 hardware/ariadne/bootloaders/ariadne/ariadne_atmega328.hex
@@ -0,0 +1,164 @@
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+:10701000B8C00000B6C00000B4C00000B2C000009C
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View
2,163 hardware/ariadne/bootloaders/ariadne/ariadne_atmega328.lst
@@ -0,0 +1,2163 @@
+
+ariadne_atmega328.elf: file format elf32-avr
+
+Sections:
+Idx Name Size VMA LMA File off Algn
+ 0 .data 0000001c 00800100 000079f6 00000a8a 2**0
+ CONTENTS, ALLOC, LOAD, DATA
+ 1 .text 000009f6 00007000 00007000 00000094 2**1
+ CONTENTS, ALLOC, LOAD, READONLY, CODE
+ 2 .bss 0000000f 0080011c 0080011c 00000aa6 2**0
+ ALLOC
+ 3 .stab 00002fc4 00000000 00000000 00000aa8 2**2
+ CONTENTS, READONLY, DEBUGGING
+ 4 .stabstr 000010e9 00000000 00000000 00003a6c 2**0
+ CONTENTS, READONLY, DEBUGGING
+ 5 .comment 00000011 00000000 00000000 00004b55 2**0
+ CONTENTS, READONLY
+
+Disassembly of section .text:
+
+00007000 <__vectors>:
+ 7000: 50 c0 rjmp .+160 ; 0x70a2 <__ctors_end>
+ 7002: 00 00 nop
+ 7004: be c0 rjmp .+380 ; 0x7182 <__bad_interrupt>
+ 7006: 00 00 nop
+ 7008: bc c0 rjmp .+376 ; 0x7182 <__bad_interrupt>
+ 700a: 00 00 nop
+ 700c: ba c0 rjmp .+372 ; 0x7182 <__bad_interrupt>
+ 700e: 00 00 nop
+ 7010: b8 c0 rjmp .+368 ; 0x7182 <__bad_interrupt>
+ 7012: 00 00 nop
+ 7014: b6 c0 rjmp .+364 ; 0x7182 <__bad_interrupt>
+ 7016: 00 00 nop
+ 7018: b4 c0 rjmp .+360 ; 0x7182 <__bad_interrupt>
+ 701a: 00 00 nop
+ 701c: b2 c0 rjmp .+356 ; 0x7182 <__bad_interrupt>
+ 701e: 00 00 nop
+ 7020: b0 c0 rjmp .+352 ; 0x7182 <__bad_interrupt>
+ 7022: 00 00 nop
+ 7024: ae c0 rjmp .+348 ; 0x7182 <__bad_interrupt>
+ 7026: 00 00 nop
+ 7028: ac c0 rjmp .+344 ; 0x7182 <__bad_interrupt>
+ 702a: 00 00 nop
+ 702c: aa c0 rjmp .+340 ; 0x7182 <__bad_interrupt>
+ 702e: 00 00 nop
+ 7030: a8 c0 rjmp .+336 ; 0x7182 <__bad_interrupt>
+ 7032: 00 00 nop
+ 7034: a6 c0 rjmp .+332 ; 0x7182 <__bad_interrupt>
+ 7036: 00 00 nop
+ 7038: a4 c0 rjmp .+328 ; 0x7182 <__bad_interrupt>
+ 703a: 00 00 nop
+ 703c: a2 c0 rjmp .+324 ; 0x7182 <__bad_interrupt>
+ 703e: 00 00 nop
+ 7040: a0 c0 rjmp .+320 ; 0x7182 <__bad_interrupt>
+ 7042: 00 00 nop
+ 7044: 9e c0 rjmp .+316 ; 0x7182 <__bad_interrupt>
+ 7046: 00 00 nop
+ 7048: 9c c0 rjmp .+312 ; 0x7182 <__bad_interrupt>
+ 704a: 00 00 nop
+ 704c: 9a c0 rjmp .+308 ; 0x7182 <__bad_interrupt>
+ 704e: 00 00 nop
+ 7050: 98 c0 rjmp .+304 ; 0x7182 <__bad_interrupt>
+ 7052: 00 00 nop
+ 7054: 96 c0 rjmp .+300 ; 0x7182 <__bad_interrupt>
+ 7056: 00 00 nop
+ 7058: 94 c0 rjmp .+296 ; 0x7182 <__bad_interrupt>
+ 705a: 00 00 nop
+ 705c: 92 c0 rjmp .+292 ; 0x7182 <__bad_interrupt>
+ 705e: 00 00 nop
+ 7060: 90 c0 rjmp .+288 ; 0x7182 <__bad_interrupt>
+ 7062: 00 00 nop
+ 7064: 8e c0 rjmp .+284 ; 0x7182 <__bad_interrupt>
+ ...
+
+00007068 <tftp_invalid_image_packet>:
+ 7068: 13 00 05 00 00 49 6e 76 61 6c 69 64 20 69 6d 61 .....Invalid ima
+ 7078: 67 65 20 66 69 6c 65 00 ge file.
+
+00007080 <tftp_unknown_error_packet>:
+ 7080: 08 00 05 00 00 45 72 72 6f 72 00 .....Error.
+
+0000708b <tftp_full_error_packet>:
+ 708b: 09 00 05 00 03 46 75 6c 6c 00 .....Full.
+
+00007095 <tftp_opcode_error_packet>:
+ 7095: 0a 00 05 00 00 4f 70 63 6f 64 65 3f 00 .....Opcode?.
+
+000070a2 <__ctors_end>:
+ 70a2: 11 24 eor r1, r1
+ 70a4: 1f be out 0x3f, r1 ; 63
+ 70a6: cf ef ldi r28, 0xFF ; 255
+ 70a8: d8 e0 ldi r29, 0x08 ; 8
+ 70aa: de bf out 0x3e, r29 ; 62
+ 70ac: cd bf out 0x3d, r28 ; 61
+
+000070ae <__do_copy_data>:
+ 70ae: 11 e0 ldi r17, 0x01 ; 1
+ 70b0: a0 e0 ldi r26, 0x00 ; 0
+ 70b2: b1 e0 ldi r27, 0x01 ; 1
+ 70b4: e6 ef ldi r30, 0xF6 ; 246
+ 70b6: f9 e7 ldi r31, 0x79 ; 121
+ 70b8: 02 c0 rjmp .+4 ; 0x70be <__do_copy_data+0x10>
+ 70ba: 05 90 lpm r0, Z+
+ 70bc: 0d 92 st X+, r0
+ 70be: ac 31 cpi r26, 0x1C ; 28
+ 70c0: b1 07 cpc r27, r17
+ 70c2: d9 f7 brne .-10 ; 0x70ba <__do_copy_data+0xc>
+
+000070c4 <__do_clear_bss>:
+ 70c4: 11 e0 ldi r17, 0x01 ; 1
+ 70c6: ac e1 ldi r26, 0x1C ; 28
+ 70c8: b1 e0 ldi r27, 0x01 ; 1
+ 70ca: 01 c0 rjmp .+2 ; 0x70ce <.do_clear_bss_start>
+
+000070cc <.do_clear_bss_loop>:
+ 70cc: 1d 92 st X+, r1
+
+000070ce <.do_clear_bss_start>:
+ 70ce: ab 32 cpi r26, 0x2B ; 43
+ 70d0: b1 07 cpc r27, r17
+ 70d2: e1 f7 brne .-8 ; 0x70cc <.do_clear_bss_loop>
+ 70d4: 01 d0 rcall .+2 ; 0x70d8 <main>
+ 70d6: 8d c4 rjmp .+2330 ; 0x79f2 <_exit>
+
+000070d8 <main>:
+ 70d8: 05 d3 rcall .+1546 ; 0x76e4 <watchdogDisable>
+ 70da: 2f ef ldi r18, 0xFF ; 255
+ 70dc: 85 ea ldi r24, 0xA5 ; 165
+ 70de: 9e e0 ldi r25, 0x0E ; 14
+ 70e0: 21 50 subi r18, 0x01 ; 1
+ 70e2: 80 40 sbci r24, 0x00 ; 0
+ 70e4: 90 40 sbci r25, 0x00 ; 0
+ 70e6: e1 f7 brne .-8 ; 0x70e0 <main+0x8>
+ 70e8: 00 c0 rjmp .+0 ; 0x70ea <main+0x12>
+ 70ea: 00 00 nop
+ 70ec: 11 24 eor r1, r1
+ 70ee: 85 e0 ldi r24, 0x05 ; 5
+ 70f0: 80 93 81 00 sts 0x0081, r24
+ 70f4: fd d3 rcall .+2042 ; 0x78f0 <serialInit>
+ 70f6: 9e d0 rcall .+316 ; 0x7234 <netInit>
+ 70f8: 95 d2 rcall .+1322 ; 0x7624 <tftpInit>
+ 70fa: ef ef ldi r30, 0xFF ; 255
+ 70fc: f5 ea ldi r31, 0xA5 ; 165
+ 70fe: 2e e0 ldi r18, 0x0E ; 14
+ 7100: e1 50 subi r30, 0x01 ; 1
+ 7102: f0 40 sbci r31, 0x00 ; 0
+ 7104: 20 40 sbci r18, 0x00 ; 0
+ 7106: e1 f7 brne .-8 ; 0x7100 <main+0x28>
+ 7108: 00 c0 rjmp .+0 ; 0x710a <main+0x32>
+ 710a: 00 00 nop
+ 710c: 10 92 26 01 sts 0x0126, r1
+ 7110: 10 92 27 01 sts 0x0127, r1
+ 7114: c3 e0 ldi r28, 0x03 ; 3
+ 7116: e1 2c mov r14, r1
+ 7118: f1 2c mov r15, r1
+ 711a: 80 91 26 01 lds r24, 0x0126
+ 711e: 88 23 and r24, r24
+ 7120: 29 f0 breq .+10 ; 0x712c <main+0x54>
+ 7122: 80 91 27 01 lds r24, 0x0127
+ 7126: 88 23 and r24, r24
+ 7128: 49 f0 breq .+18 ; 0x713c <main+0x64>
+ 712a: 04 c0 rjmp .+8 ; 0x7134 <main+0x5c>
+ 712c: 97 d2 rcall .+1326 ; 0x765c <tftpPoll>
+ 712e: 81 11 cpse r24, r1
+ 7130: f8 cf rjmp .-16 ; 0x7122 <main+0x4a>
+ 7132: 20 c0 rjmp .+64 ; 0x7174 <main+0x9c>
+ 7134: 2f d4 rcall .+2142 ; 0x7994 <timedOut>
+ 7136: 81 11 cpse r24, r1
+ 7138: 05 c0 rjmp .+10 ; 0x7144 <main+0x6c>
+ 713a: 1a c0 rjmp .+52 ; 0x7170 <main+0x98>
+ 713c: cf d3 rcall .+1950 ; 0x78dc <serialPoll>
+ 713e: 81 11 cpse r24, r1
+ 7140: f9 cf rjmp .-14 ; 0x7134 <main+0x5c>
+ 7142: 18 c0 rjmp .+48 ; 0x7174 <main+0x9c>
+ 7144: 80 91 27 01 lds r24, 0x0127
+ 7148: 81 30 cpi r24, 0x01 ; 1
+ 714a: 69 f4 brne .+26 ; 0x7166 <main+0x8e>
+ 714c: 10 92 27 01 sts 0x0127, r1
+ 7150: 07 b6 in r0, 0x37 ; 55
+ 7152: 00 fc sbrc r0, 0
+ 7154: fd cf rjmp .-6 ; 0x7150 <main+0x78>
+ 7156: f9 99 sbic 0x1f, 1 ; 31
+ 7158: fe cf rjmp .-4 ; 0x7156 <main+0x7e>
+ 715a: f7 01 movw r30, r14
+ 715c: c7 bf out 0x37, r28 ; 55
+ 715e: e8 95 spm
+ 7160: 14 d4 rcall .+2088 ; 0x798a <resetTick>
+ 7162: 60 d2 rcall .+1216 ; 0x7624 <tftpInit>
+ 7164: 05 c0 rjmp .+10 ; 0x7170 <main+0x98>
+ 7166: 82 e0 ldi r24, 0x02 ; 2
+ 7168: 90 e0 ldi r25, 0x00 ; 0
+ 716a: 2d d4 rcall .+2138 ; 0x79c6 <__eerd_byte_m328p>
+ 716c: 8b 3b cpi r24, 0xBB ; 187
+ 716e: 11 f0 breq .+4 ; 0x7174 <main+0x9c>
+ 7170: ea d3 rcall .+2004 ; 0x7946 <updateLed>
+ 7172: d3 cf rjmp .-90 ; 0x711a <main+0x42>
+ 7174: e0 91 1c 01 lds r30, 0x011C
+ 7178: f0 91 1d 01 lds r31, 0x011D
+ 717c: 09 95 icall
+ 717e: 80 e0 ldi r24, 0x00 ; 0
+ 7180: 90 e0 ldi r25, 0x00 ; 0
+
+00007182 <__bad_interrupt>:
+ 7182: 3e cf rjmp .-388 ; 0x7000 <__vectors>
+
+00007184 <netWriteReg>:
+ trace(", ");
+ tracenum(value);
+#endif
+
+ // Send uint8_t to Ethernet controller
+ SPCR = _BV(SPE) | _BV(MSTR); // Set SPI as master
+ 7184: 20 e5 ldi r18, 0x50 ; 80
+ 7186: 2c bd out 0x2c, r18 ; 44
+ SS_LOW();
+ 7188: 2a 98 cbi 0x05, 2 ; 5
+ SPDR = SPI_WRITE;
+ 718a: 20 ef ldi r18, 0xF0 ; 240
+ 718c: 2e bd out 0x2e, r18 ; 46
+ while(!(SPSR & _BV(SPIF)));
+ 718e: 0d b4 in r0, 0x2d ; 45
+ 7190: 07 fe sbrs r0, 7
+ 7192: fd cf rjmp .-6 ; 0x718e <netWriteReg+0xa>
+ SPDR = address >> 8;
+ 7194: 29 2f mov r18, r25
+ 7196: 33 27 eor r19, r19
+ 7198: 2e bd out 0x2e, r18 ; 46
+ while(!(SPSR & _BV(SPIF)));
+ 719a: 0d b4 in r0, 0x2d ; 45
+ 719c: 07 fe sbrs r0, 7
+ 719e: fd cf rjmp .-6 ; 0x719a <netWriteReg+0x16>
+ SPDR = address & 0xff;
+ 71a0: 8e bd out 0x2e, r24 ; 46
+ while(!(SPSR & _BV(SPIF)));
+ 71a2: 0d b4 in r0, 0x2d ; 45
+ 71a4: 07 fe sbrs r0, 7
+ 71a6: fd cf rjmp .-6 ; 0x71a2 <netWriteReg+0x1e>
+ SPDR = value;
+ 71a8: 6e bd out 0x2e, r22 ; 46
+ while(!(SPSR & _BV(SPIF)));
+ 71aa: 0d b4 in r0, 0x2d ; 45
+ 71ac: 07 fe sbrs r0, 7
+ 71ae: fd cf rjmp .-6 ; 0x71aa <netWriteReg+0x26>
+ SS_HIGH();
+ 71b0: 2a 9a sbi 0x05, 2 ; 5
+ SPCR = 0; // Turn off SPI
+ 71b2: 1c bc out 0x2c, r1 ; 44
+ 71b4: 08 95 ret
+
+000071b6 <netReadReg>:
+// tracenum(address);
+//#endif
+
+ // Read uint8_t from Ethernet controller
+ uint8_t returnValue;
+ SPCR = _BV(SPE) | _BV(MSTR);
+ 71b6: 20 e5 ldi r18, 0x50 ; 80
+ 71b8: 2c bd out 0x2c, r18 ; 44
+ SS_LOW();
+ 71ba: 2a 98 cbi 0x05, 2 ; 5
+ SPDR = SPI_READ;
+ 71bc: 2f e0 ldi r18, 0x0F ; 15
+ 71be: 2e bd out 0x2e, r18 ; 46
+ while(!(SPSR & _BV(SPIF)));
+ 71c0: 0d b4 in r0, 0x2d ; 45
+ 71c2: 07 fe sbrs r0, 7
+ 71c4: fd cf rjmp .-6 ; 0x71c0 <netReadReg+0xa>
+ SPDR = address >> 8;
+ 71c6: 29 2f mov r18, r25
+ 71c8: 33 27 eor r19, r19
+ 71ca: 2e bd out 0x2e, r18 ; 46
+ while(!(SPSR & _BV(SPIF)));
+ 71cc: 0d b4 in r0, 0x2d ; 45
+ 71ce: 07 fe sbrs r0, 7
+ 71d0: fd cf rjmp .-6 ; 0x71cc <netReadReg+0x16>
+ SPDR = address & 0xff;
+ 71d2: 8e bd out 0x2e, r24 ; 46
+ while(!(SPSR & _BV(SPIF)));
+ 71d4: 0d b4 in r0, 0x2d ; 45
+ 71d6: 07 fe sbrs r0, 7
+ 71d8: fd cf rjmp .-6 ; 0x71d4 <netReadReg+0x1e>
+ SPDR = 0;
+ 71da: 1e bc out 0x2e, r1 ; 46
+ while(!(SPSR & _BV(SPIF)));
+ 71dc: 0d b4 in r0, 0x2d ; 45
+ 71de: 07 fe sbrs r0, 7
+ 71e0: fd cf rjmp .-6 ; 0x71dc <netReadReg+0x26>
+ SS_HIGH();
+ 71e2: 2a 9a sbi 0x05, 2 ; 5
+ returnValue = SPDR;
+ 71e4: 8e b5 in r24, 0x2e ; 46
+ SPCR = 0;
+ 71e6: 1c bc out 0x2c, r1 ; 44
+ return(returnValue);
+}
+ 71e8: 08 95 ret
+
+000071ea <netReadWord>:
+
+uint16_t netReadWord(uint16_t address)
+{
+ 71ea: ef 92 push r14
+ 71ec: ff 92 push r15
+ 71ee: cf 93 push r28
+ 71f0: 7c 01 movw r14, r24
+ // Read uint16_t from Ethernet controller
+ return((netReadReg(address) << 8) | netReadReg(address + 1));
+ 71f2: e1 df rcall .-62 ; 0x71b6 <netReadReg>
+ 71f4: c8 2f mov r28, r24
+ 71f6: c7 01 movw r24, r14
+ 71f8: 01 96 adiw r24, 0x01 ; 1
+ 71fa: dd df rcall .-70 ; 0x71b6 <netReadReg>
+ 71fc: 2c 2f mov r18, r28
+ 71fe: 30 e0 ldi r19, 0x00 ; 0
+ 7200: 32 2f mov r19, r18
+ 7202: 22 27 eor r18, r18
+}
+ 7204: a9 01 movw r20, r18
+ 7206: 48 2b or r20, r24
+ 7208: ca 01 movw r24, r20
+ 720a: cf 91 pop r28
+ 720c: ff 90 pop r15
+ 720e: ef 90 pop r14
+ 7210: 08 95 ret
+
+00007212 <netWriteWord>:
+
+void netWriteWord(uint16_t address, uint16_t value)
+{
+ 7212: cf 92 push r12
+ 7214: df 92 push r13
+ 7216: ef 92 push r14
+ 7218: ff 92 push r15
+ 721a: 7c 01 movw r14, r24
+ 721c: 6b 01 movw r12, r22
+ // Write uint16_t to Ethernet controller
+ netWriteReg(address++, value >> 8);
+ 721e: 67 2f mov r22, r23
+ 7220: 77 27 eor r23, r23
+ 7222: b0 df rcall .-160 ; 0x7184 <netWriteReg>
+ netWriteReg(address, value & 0xff);
+ 7224: 6c 2d mov r22, r12
+ 7226: c7 01 movw r24, r14
+ 7228: 01 96 adiw r24, 0x01 ; 1
+}
+ 722a: ff 90 pop r15
+ 722c: ef 90 pop r14
+ 722e: df 90 pop r13
+ 7230: cf 90 pop r12
+
+void netWriteWord(uint16_t address, uint16_t value)
+{
+ // Write uint16_t to Ethernet controller
+ netWriteReg(address++, value >> 8);
+ netWriteReg(address, value & 0xff);
+ 7232: a8 cf rjmp .-176 ; 0x7184 <netWriteReg>
+
+00007234 <netInit>:
+}
+
+void netInit()
+{
+ 7234: cf 92 push r12
+ 7236: df 92 push r13
+ 7238: ef 92 push r14
+ 723a: ff 92 push r15
+ uint8_t i;
+
+ // Set up outputs to communicate with W5100 chip
+ // Set pins as output
+ DDRB = _BV(SCK) | _BV(MOSI) | _BV(SS);
+ 723c: 8c e2 ldi r24, 0x2C ; 44
+ 723e: 84 b9 out 0x04, r24 ; 4
+ // Set pins high
+ PORTB = _BV(SCK) | _BV(MISO) | _BV(MOSI) | _BV(SS);
+ 7240: 8c e3 ldi r24, 0x3C ; 60
+ 7242: 85 b9 out 0x05, r24 ; 5
+ PORTB |= _BV(LED);
+#endif
+
+ // Set up SPI
+ // Set the Double SPI Speed Bit
+ SPSR = (1 << SPI2X);
+ 7244: 81 e0 ldi r24, 0x01 ; 1
+ 7246: 8d bd out 0x2d, r24 ; 45
+
+#ifndef _TFTP_RANDOM_PORT
+ tftpPort = TFTP_STATIC_PORT;
+ 7248: 89 e7 ldi r24, 0x79 ; 121
+ 724a: 97 eb ldi r25, 0xB7 ; 183
+ 724c: 90 93 25 01 sts 0x0125, r25
+ 7250: 80 93 24 01 sts 0x0124, r24
+#endif
+ /* Pull in altered presets
+ * if available from AVR EEPROM (if signature bytes are set)*/
+ if((eeprom_read_byte(EEPROM_SIG_1) == EEPROM_SIG_1_VALUE)
+ 7254: 80 e0 ldi r24, 0x00 ; 0
+ 7256: 90 e0 ldi r25, 0x00 ; 0
+ 7258: b6 d3 rcall .+1900 ; 0x79c6 <__eerd_byte_m328p>
+ 725a: 85 35 cpi r24, 0x55 ; 85
+ 725c: 49 f5 brne .+82 ; 0x72b0 <netInit+0x7c>
+ && (eeprom_read_byte(EEPROM_SIG_2) == EEPROM_SIG_2_VALUE)) {
+ 725e: 81 e0 ldi r24, 0x01 ; 1
+ 7260: 90 e0 ldi r25, 0x00 ; 0
+ 7262: b1 d3 rcall .+1890 ; 0x79c6 <__eerd_byte_m328p>
+ 7264: 8a 3a cpi r24, 0xAA ; 170
+ 7266: 21 f5 brne .+72 ; 0x72b0 <netInit+0x7c>
+ 7268: e1 e0 ldi r30, 0x01 ; 1
+ 726a: ce 2e mov r12, r30
+ 726c: e1 e0 ldi r30, 0x01 ; 1
+ 726e: de 2e mov r13, r30
+ 7270: f3 e0 ldi r31, 0x03 ; 3
+ 7272: ef 2e mov r14, r31
+ 7274: f1 2c mov r15, r1
+
+ for(i = 0; i < EEPROM_SETTINGS_SIZE; i++)
+ registerBuffer[i+1] = eeprom_read_byte(EEPROM_DATA+i);
+ 7276: c7 01 movw r24, r14
+ 7278: a6 d3 rcall .+1868 ; 0x79c6 <__eerd_byte_m328p>
+ 727a: f6 01 movw r30, r12
+ 727c: 81 93 st Z+, r24
+ 727e: 6f 01 movw r12, r30
+ 7280: ff ef ldi r31, 0xFF ; 255
+ 7282: ef 1a sub r14, r31
+ 7284: ff 0a sbc r15, r31
+ /* Pull in altered presets
+ * if available from AVR EEPROM (if signature bytes are set)*/
+ if((eeprom_read_byte(EEPROM_SIG_1) == EEPROM_SIG_1_VALUE)
+ && (eeprom_read_byte(EEPROM_SIG_2) == EEPROM_SIG_2_VALUE)) {
+
+ for(i = 0; i < EEPROM_SETTINGS_SIZE; i++)
+ 7286: 85 e1 ldi r24, 0x15 ; 21
+ 7288: e8 16 cp r14, r24
+ 728a: f1 04 cpc r15, r1
+ 728c: a1 f7 brne .-24 ; 0x7276 <netInit+0x42>
+ registerBuffer[i+1] = eeprom_read_byte(EEPROM_DATA+i);
+#ifndef _TFTP_RANDOM_PORT
+ tftpPort = ((eeprom_read_byte(EEPROM_PORT+1)<<8) + eeprom_read_byte(EEPROM_PORT));
+ 728e: 86 e1 ldi r24, 0x16 ; 22
+ 7290: 90 e0 ldi r25, 0x00 ; 0
+ 7292: 99 d3 rcall .+1842 ; 0x79c6 <__eerd_byte_m328p>
+ 7294: f8 2e mov r15, r24
+ 7296: 85 e1 ldi r24, 0x15 ; 21
+ 7298: 90 e0 ldi r25, 0x00 ; 0
+ 729a: 95 d3 rcall .+1834 ; 0x79c6 <__eerd_byte_m328p>
+ 729c: 2f 2d mov r18, r15
+ 729e: 30 e0 ldi r19, 0x00 ; 0
+ 72a0: 32 2f mov r19, r18
+ 72a2: 22 27 eor r18, r18
+ 72a4: 28 0f add r18, r24
+ 72a6: 31 1d adc r19, r1
+ 72a8: 30 93 25 01 sts 0x0125, r19
+ 72ac: 20 93 24 01 sts 0x0124, r18
+ 72b0: 60 e0 ldi r22, 0x00 ; 0
+ 72b2: c6 2e mov r12, r22
+ 72b4: 61 e0 ldi r22, 0x01 ; 1
+ 72b6: d6 2e mov r13, r22
+ tftpPort = TFTP_STATIC_PORT;
+#endif
+ /* Pull in altered presets
+ * if available from AVR EEPROM (if signature bytes are set)*/
+ if((eeprom_read_byte(EEPROM_SIG_1) == EEPROM_SIG_1_VALUE)
+ && (eeprom_read_byte(EEPROM_SIG_2) == EEPROM_SIG_2_VALUE)) {
+ 72b8: e1 2c mov r14, r1
+ 72ba: f1 2c mov r15, r1
+#endif
+#endif
+
+ // Configure Wiznet chip
+ for(i = 0; i < REGISTER_BLOCK_SIZE; i++)
+ netWriteReg(i, registerBuffer[i]);
+ 72bc: f6 01 movw r30, r12
+ 72be: 61 91 ld r22, Z+
+ 72c0: 6f 01 movw r12, r30
+ 72c2: c7 01 movw r24, r14
+ 72c4: 5f df rcall .-322 ; 0x7184 <netWriteReg>
+ 72c6: ff ef ldi r31, 0xFF ; 255
+ 72c8: ef 1a sub r14, r31
+ 72ca: ff 0a sbc r15, r31
+ tracenum(tftpPort);
+#endif
+#endif
+
+ // Configure Wiznet chip
+ for(i = 0; i < REGISTER_BLOCK_SIZE; i++)
+ 72cc: 8c e1 ldi r24, 0x1C ; 28
+ 72ce: e8 16 cp r14, r24
+ 72d0: f1 04 cpc r15, r1
+ 72d2: a1 f7 brne .-24 ; 0x72bc <netInit+0x88>
+ netWriteReg(i, registerBuffer[i]);
+#ifdef _VERBOSE
+ traceln(" Net: Network init done");
+#endif
+}
+ 72d4: ff 90 pop r15
+ 72d6: ef 90 pop r14
+ 72d8: df 90 pop r13
+ 72da: cf 90 pop r12
+ 72dc: 08 95 ret
+
+000072de <processPacket>:
+#ifdef _DEBUG_TFTP
+uint8_t processPacket(uint16_t packetSize)
+{
+#else
+uint8_t processPacket()
+{
+ 72de: af 92 push r10
+ 72e0: bf 92 push r11
+ 72e2: cf 92 push r12
+ 72e4: df 92 push r13
+ 72e6: ef 92 push r14
+ 72e8: ff 92 push r15
+ 72ea: cf 93 push r28
+ 72ec: df 93 push r29
+ 72ee: cd b7 in r28, 0x3d ; 61
+ 72f0: de b7 in r29, 0x3e ; 62
+ 72f2: cc 50 subi r28, 0x0C ; 12
+ 72f4: d2 40 sbci r29, 0x02 ; 2
+ 72f6: de bf out 0x3e, r29 ; 62
+ 72f8: cd bf out 0x3d, r28 ; 61
+ tracenum(packetSize);
+ if(packetSize >= 0x800) traceln("Tftp: Overflow");
+ // step();
+#endif
+
+ readPointer = netReadWord(REG_S3_RX_RD0);
+ 72fa: 88 e2 ldi r24, 0x28 ; 40
+ 72fc: 97 e0 ldi r25, 0x07 ; 7
+ 72fe: 75 df rcall .-278 ; 0x71ea <netReadWord>
+#ifdef _DEBUG_TFTP
+ traceln("Tftp: readPointer at position ");
+ tracenum(readPointer);
+#endif
+ if(readPointer == 0) readPointer += S3_RX_START;
+ 7300: 00 97 sbiw r24, 0x00 ; 0
+ 7302: 11 f4 brne .+4 ; 0x7308 <processPacket+0x2a>
+ 7304: 80 e0 ldi r24, 0x00 ; 0
+ 7306: 98 e7 ldi r25, 0x78 ; 120
+ 7308: ee 24 eor r14, r14
+ 730a: e3 94 inc r14
+ 730c: f1 2c mov r15, r1
+ 730e: ec 0e add r14, r28
+ 7310: fd 1e adc r15, r29
+
+#ifdef _DEBUG_TFTP
+uint8_t processPacket(uint16_t packetSize)
+{
+#else
+uint8_t processPacket()
+ 7312: 5e 01 movw r10, r28
+ 7314: 23 ef ldi r18, 0xF3 ; 243
+ 7316: a2 1a sub r10, r18
+ 7318: 2d ef ldi r18, 0xFD ; 253
+ 731a: b2 0a sbc r11, r18
+ if((count == TFTP_PACKET_MAX_SIZE - 1) || (count == 0)) {
+ traceln("Tftp: Reading from position ");
+ tracenum(readPointer);
+ }
+#endif
+ *bufPtr++ = netReadReg(readPointer++);
+ 731c: 6c 01 movw r12, r24
+ 731e: ef ef ldi r30, 0xFF ; 255
+ 7320: ce 1a sub r12, r30
+ 7322: de 0a sbc r13, r30
+ 7324: 48 df rcall .-368 ; 0x71b6 <netReadReg>
+ 7326: f7 01 movw r30, r14
+ 7328: 81 93 st Z+, r24
+ 732a: 7f 01 movw r14, r30
+ if(readPointer == S3_RX_END) readPointer = S3_RX_START;
+ 732c: c1 14 cp r12, r1
+ 732e: f0 e8 ldi r31, 0x80 ; 128
+ 7330: df 06 cpc r13, r31
+ 7332: 11 f0 breq .+4 ; 0x7338 <processPacket+0x5a>
+ 7334: c6 01 movw r24, r12
+ 7336: 02 c0 rjmp .+4 ; 0x733c <processPacket+0x5e>
+ 7338: 80 e0 ldi r24, 0x00 ; 0
+ 733a: 98 e7 ldi r25, 0x78 ; 120
+#ifdef _DEBUG_TFTP
+ traceln("Tftp: readPointer at position ");
+ tracenum(readPointer);
+#endif
+ if(readPointer == 0) readPointer += S3_RX_START;
+ for(count = TFTP_PACKET_MAX_SIZE; count--;) {
+ 733c: ea 14 cp r14, r10
+ 733e: fb 04 cpc r15, r11
+ 7340: 69 f7 brne .-38 ; 0x731c <processPacket+0x3e>
+ }
+#endif
+ *bufPtr++ = netReadReg(readPointer++);
+ if(readPointer == S3_RX_END) readPointer = S3_RX_START;
+ }
+ netWriteWord(REG_S3_RX_RD0, readPointer); // Write back new pointer
+ 7342: bc 01 movw r22, r24
+ 7344: 88 e2 ldi r24, 0x28 ; 40
+ 7346: 97 e0 ldi r25, 0x07 ; 7
+ 7348: 64 df rcall .-312 ; 0x7212 <netWriteWord>
+ netWriteReg(REG_S3_CR, CR_RECV);
+ 734a: 60 e4 ldi r22, 0x40 ; 64
+ 734c: 81 e0 ldi r24, 0x01 ; 1
+ 734e: 97 e0 ldi r25, 0x07 ; 7
+ 7350: 19 df rcall .-462 ; 0x7184 <netWriteReg>
+ while(netReadReg(REG_S3_CR));
+ 7352: 81 e0 ldi r24, 0x01 ; 1
+ 7354: 97 e0 ldi r25, 0x07 ; 7
+ 7356: 2f df rcall .-418 ; 0x71b6 <netReadReg>
+ 7358: 81 11 cpse r24, r1
+ 735a: fb cf rjmp .-10 ; 0x7352 <processPacket+0x74>
+ 735c: cc 24 eor r12, r12
+ 735e: c3 94 inc r12
+ 7360: d1 2c mov r13, r1
+ 7362: cc 0e add r12, r28
+ 7364: dd 1e adc r13, r29
+ 7366: 6c e0 ldi r22, 0x0C ; 12
+ 7368: e6 2e mov r14, r22
+ 736a: 67 e0 ldi r22, 0x07 ; 7
+ 736c: f6 2e mov r15, r22
+ traceln("Tftp: Setting return address");
+#endif
+
+ // Set up return IP address and port
+ uint8_t i;
+ for(i = 0; i < 6; i++) netWriteReg(REG_S3_DIPR0 + i, buffer[i]);
+ 736e: f6 01 movw r30, r12
+ 7370: 61 91 ld r22, Z+
+ 7372: 6f 01 movw r12, r30
+ 7374: c7 01 movw r24, r14
+ 7376: 06 df rcall .-500 ; 0x7184 <netWriteReg>
+ 7378: ff ef ldi r31, 0xFF ; 255
+ 737a: ef 1a sub r14, r31
+ 737c: ff 0a sbc r15, r31
+ 737e: 22 e1 ldi r18, 0x12 ; 18
+ 7380: e2 16 cp r14, r18
+ 7382: 27 e0 ldi r18, 0x07 ; 7
+ 7384: f2 06 cpc r15, r18
+ 7386: 99 f7 brne .-26 ; 0x736e <processPacket+0x90>
+
+ // Parse packet
+ uint16_t tftpDataLen = (buffer[6] << 8) + buffer[7];
+ 7388: ef 80 ldd r14, Y+7 ; 0x07
+ 738a: 28 85 ldd r18, Y+8 ; 0x08
+ uint16_t tftpOpcode = (buffer[8] << 8) + buffer[9];
+ uint16_t tftpBlock = (buffer[10] << 8) + buffer[11];
+ 738c: cb 84 ldd r12, Y+11 ; 0x0b
+ 738e: 3c 85 ldd r19, Y+12 ; 0x0c
+ uint8_t i;
+ for(i = 0; i < 6; i++) netWriteReg(REG_S3_DIPR0 + i, buffer[i]);
+
+ // Parse packet
+ uint16_t tftpDataLen = (buffer[6] << 8) + buffer[7];
+ uint16_t tftpOpcode = (buffer[8] << 8) + buffer[9];
+ 7390: 89 85 ldd r24, Y+9 ; 0x09
+ 7392: 90 e0 ldi r25, 0x00 ; 0
+ 7394: 98 2f mov r25, r24
+ 7396: 88 27 eor r24, r24
+ 7398: 4a 85 ldd r20, Y+10 ; 0x0a
+ 739a: 84 0f add r24, r20
+ 739c: 91 1d adc r25, r1
+
+ uint8_t returnCode = ERROR_UNKNOWN;
+ uint16_t packetLength;
+
+
+ switch(tftpOpcode) {
+ 739e: 83 30 cpi r24, 0x03 ; 3
+ 73a0: 91 05 cpc r25, r1
+ 73a2: d9 f1 breq .+118 ; 0x741a <processPacket+0x13c>
+ 73a4: 38 f4 brcc .+14 ; 0x73b4 <processPacket+0xd6>
+ 73a6: 81 30 cpi r24, 0x01 ; 1
+ 73a8: 91 05 cpc r25, r1
+ 73aa: 39 f0 breq .+14 ; 0x73ba <processPacket+0xdc>
+ 73ac: 02 97 sbiw r24, 0x02 ; 2
+ 73ae: 09 f0 breq .+2 ; 0x73b2 <processPacket+0xd4>
+ 73b0: a3 c0 rjmp .+326 ; 0x74f8 <processPacket+0x21a>
+ 73b2: 05 c0 rjmp .+10 ; 0x73be <processPacket+0xe0>
+ 73b4: 06 97 sbiw r24, 0x06 ; 6
+ 73b6: 08 f0 brcs .+2 ; 0x73ba <processPacket+0xdc>
+ 73b8: 9f c0 rjmp .+318 ; 0x74f8 <processPacket+0x21a>
+ tracenum(tftpOpcode);
+ trace(" and data length ");
+ tracenum(tftpDataLen - (TFTP_OPCODE_SIZE + TFTP_BLOCKNO_SIZE));
+#endif
+
+ uint8_t returnCode = ERROR_UNKNOWN;
+ 73ba: 80 e0 ldi r24, 0x00 ; 0
+ 73bc: a4 c0 rjmp .+328 ; 0x7506 <processPacket+0x228>
+ case TFTP_OPCODE_WRQ: // Write request
+#ifdef _VERBOSE
+ traceln("Tftp: Write request");
+#endif
+ // Flagging image as invalid since the flashing process has started
+ eeprom_write_byte(EEPROM_IMG_STAT, EEPROM_IMG_BAD_VALUE);
+ 73be: 6f ef ldi r22, 0xFF ; 255
+ 73c0: 82 e0 ldi r24, 0x02 ; 2
+ 73c2: 90 e0 ldi r25, 0x00 ; 0
+ 73c4: 08 d3 rcall .+1552 ; 0x79d6 <__eewr_byte_m328p>
+ netWriteReg(REG_S3_CR, CR_RECV);
+ 73c6: 60 e4 ldi r22, 0x40 ; 64
+ 73c8: 81 e0 ldi r24, 0x01 ; 1
+ 73ca: 97 e0 ldi r25, 0x07 ; 7
+ 73cc: db de rcall .-586 ; 0x7184 <netWriteReg>
+ netWriteReg(REG_S3_CR, CR_CLOSE);
+ 73ce: 60 e1 ldi r22, 0x10 ; 16
+ 73d0: 81 e0 ldi r24, 0x01 ; 1
+ 73d2: 97 e0 ldi r25, 0x07 ; 7
+ 73d4: d7 de rcall .-594 ; 0x7184 <netWriteReg>
+ do {
+ netWriteReg(REG_S3_MR, MR_UDP);
+ 73d6: 62 e0 ldi r22, 0x02 ; 2
+ 73d8: 80 e0 ldi r24, 0x00 ; 0
+ 73da: 97 e0 ldi r25, 0x07 ; 7
+ 73dc: d3 de rcall .-602 ; 0x7184 <netWriteReg>
+ netWriteReg(REG_S3_CR, CR_OPEN);
+ 73de: 61 e0 ldi r22, 0x01 ; 1
+ 73e0: 81 e0 ldi r24, 0x01 ; 1
+ 73e2: 97 e0 ldi r25, 0x07 ; 7
+ 73e4: cf de rcall .-610 ; 0x7184 <netWriteReg>
+#ifdef _TFTP_RANDOM_PORT
+ netWriteWord(REG_S3_PORT0, (buffer[4]<<8) | ~buffer[5]); // Generate a 'random' TID (RFC1350)
+#else
+ netWriteWord(REG_S3_PORT0, tftpPort);
+ 73e6: 60 91 24 01 lds r22, 0x0124
+ 73ea: 70 91 25 01 lds r23, 0x0125
+ 73ee: 84 e0 ldi r24, 0x04 ; 4
+ 73f0: 97 e0 ldi r25, 0x07 ; 7
+ 73f2: 0f df rcall .-482 ; 0x7212 <netWriteWord>
+#endif
+ if(netReadReg(REG_S3_SR) != SOCK_UDP)
+ 73f4: 83 e0 ldi r24, 0x03 ; 3
+ 73f6: 97 e0 ldi r25, 0x07 ; 7
+ 73f8: de de rcall .-580 ; 0x71b6 <netReadReg>
+ 73fa: 82 32 cpi r24, 0x22 ; 34
+ 73fc: 21 f0 breq .+8 ; 0x7406 <processPacket+0x128>
+ netWriteReg(REG_S3_CR, CR_CLOSE);
+ 73fe: 60 e1 ldi r22, 0x10 ; 16
+ 7400: 81 e0 ldi r24, 0x01 ; 1
+ 7402: 97 e0 ldi r25, 0x07 ; 7
+ 7404: bf de rcall .-642 ; 0x7184 <netWriteReg>
+ } while(netReadReg(REG_S3_SR) != SOCK_UDP);
+ 7406: 83 e0 ldi r24, 0x03 ; 3
+ 7408: 97 e0 ldi r25, 0x07 ; 7
+ 740a: d5 de rcall .-598 ; 0x71b6 <netReadReg>
+ 740c: 82 32 cpi r24, 0x22 ; 34
+ 740e: 19 f7 brne .-58 ; 0x73d6 <processPacket+0xf8>
+ tracenum((buffer[4]<<8) | (buffer[5]^0x55));
+#else
+ tracenum(tftpPort);
+#endif
+#endif
+ lastPacket = 0;
+ 7410: 10 92 1f 01 sts 0x011F, r1
+ 7414: 10 92 1e 01 sts 0x011E, r1
+ 7418: 75 c0 rjmp .+234 ; 0x7504 <processPacket+0x226>
+ for(i = 0; i < 6; i++) netWriteReg(REG_S3_DIPR0 + i, buffer[i]);
+
+ // Parse packet
+ uint16_t tftpDataLen = (buffer[6] << 8) + buffer[7];
+ uint16_t tftpOpcode = (buffer[8] << 8) + buffer[9];
+ uint16_t tftpBlock = (buffer[10] << 8) + buffer[11];
+ 741a: d1 2c mov r13, r1
+ 741c: dc 2c mov r13, r12
+ 741e: cc 24 eor r12, r12
+ 7420: c3 0e add r12, r19
+ 7422: d1 1c adc r13, r1
+ // Set up return IP address and port
+ uint8_t i;
+ for(i = 0; i < 6; i++) netWriteReg(REG_S3_DIPR0 + i, buffer[i]);
+
+ // Parse packet
+ uint16_t tftpDataLen = (buffer[6] << 8) + buffer[7];
+ 7424: f1 2c mov r15, r1
+ 7426: fe 2c mov r15, r14
+ 7428: ee 24 eor r14, r14
+ 742a: e2 0e add r14, r18
+ 742c: f1 1c adc r15, r1
+ lastPacket = 0;
+ returnCode = ACK; // Send back acknowledge for packet 0
+ break;
+
+ case TFTP_OPCODE_DATA:
+ packetLength = tftpDataLen - (TFTP_OPCODE_SIZE + TFTP_BLOCKNO_SIZE);
+ 742e: 84 e0 ldi r24, 0x04 ; 4
+ 7430: e8 1a sub r14, r24
+ 7432: f1 08 sbc r15, r1
+ lastPacket = tftpBlock;
+ 7434: d0 92 1f 01 sts 0x011F, r13
+ 7438: c0 92 1e 01 sts 0x011E, r12
+ writeAddr = (tftpBlock - 1) << 9; // Flash write address for this block
+ 743c: e1 e0 ldi r30, 0x01 ; 1
+ 743e: ce 1a sub r12, r30
+ 7440: d1 08 sbc r13, r1
+ 7442: dc 2c mov r13, r12
+ 7444: cc 24 eor r12, r12
+ 7446: dd 0c add r13, r13
+#ifdef _VERBOSE
+ traceln("Tftp: Data for block ");
+ tracenum(lastPacket);
+#endif
+
+ if((writeAddr + packetLength) > MAX_ADDR) {
+ 7448: c6 01 movw r24, r12
+ 744a: 8e 0d add r24, r14
+ 744c: 9f 1d adc r25, r15
+ 744e: 81 30 cpi r24, 0x01 ; 1
+ 7450: 90 47 sbci r25, 0x70 ; 112
+ 7452: 08 f0 brcs .+2 ; 0x7456 <processPacket+0x178>
+ 7454: 53 c0 rjmp .+166 ; 0x74fc <processPacket+0x21e>
+ 7456: 03 c0 rjmp .+6 ; 0x745e <processPacket+0x180>
+
+ uint8_t *pageBase = buffer + (UDP_HEADER_SIZE + TFTP_OPCODE_SIZE + TFTP_BLOCKNO_SIZE); // Start of block data
+ uint16_t offset = 0; // Block offset
+
+ // Round up packet length to a full flash sector size
+ while(packetLength % SPM_PAGESIZE) packetLength++;
+ 7458: 2f ef ldi r18, 0xFF ; 255
+ 745a: e2 1a sub r14, r18
+ 745c: f2 0a sbc r15, r18
+ 745e: c7 01 movw r24, r14
+ 7460: 8f 77 andi r24, 0x7F ; 127
+ 7462: 99 27 eor r25, r25
+ 7464: 89 2b or r24, r25
+ 7466: c1 f7 brne .-16 ; 0x7458 <processPacket+0x17a>
+#ifdef _DEBUG_TFTP
+ traceln("Tftp: Packet length adjusted to ");
+ tracenum(packetLength);
+#endif
+ if(writeAddr == 0) {
+ 7468: c1 14 cp r12, r1
+ 746a: d1 04 cpc r13, r1
+ 746c: 31 f4 brne .+12 ; 0x747a <processPacket+0x19c>
+ // First sector - validate
+ if(!validImage(pageBase)) {
+ 746e: ce 01 movw r24, r28
+ 7470: 0d 96 adiw r24, 0x0d ; 13
+ 7472: 24 d1 rcall .+584 ; 0x76bc <validImage>
+ 7474: 88 23 and r24, r24
+ 7476: 09 f4 brne .+2 ; 0x747a <processPacket+0x19c>
+ 7478: 43 c0 rjmp .+134 ; 0x7500 <processPacket+0x222>
+#ifdef _DEBUG_TFTP
+ traceln("Tftp: Writing data from address ");
+ tracenum(writeAddr);
+#endif
+
+ uint8_t *pageBase = buffer + (UDP_HEADER_SIZE + TFTP_OPCODE_SIZE + TFTP_BLOCKNO_SIZE); // Start of block data
+ 747a: de 01 movw r26, r28
+ 747c: 1d 96 adiw r26, 0x0d ; 13
+#endif
+ }
+ }
+
+ // Flash packets
+ for(offset = 0; offset < packetLength;) {
+ 747e: 80 e0 ldi r24, 0x00 ; 0
+ 7480: 90 e0 ldi r25, 0x00 ; 0
+ uint16_t writeValue = (pageBase[offset]) | (pageBase[offset + 1] << 8);
+ boot_page_fill(writeAddr + offset, writeValue);
+ 7482: 41 e0 ldi r20, 0x01 ; 1
+ tracenum(writeAddr + offset);
+ }
+#endif
+ offset += 2;
+ if(offset % SPM_PAGESIZE == 0) {
+ boot_page_erase(writeAddr + offset - SPM_PAGESIZE);
+ 7484: 53 e0 ldi r21, 0x03 ; 3
+ boot_spm_busy_wait();
+ boot_page_write(writeAddr + offset - SPM_PAGESIZE);
+ 7486: 65 e0 ldi r22, 0x05 ; 5
+ boot_spm_busy_wait();
+ boot_rww_enable();
+ 7488: 71 e1 ldi r23, 0x11 ; 17
+#endif
+ }
+ }
+
+ // Flash packets
+ for(offset = 0; offset < packetLength;) {
+ 748a: 29 c0 rjmp .+82 ; 0x74de <processPacket+0x200>
+
+#ifdef _DEBUG_TFTP
+uint8_t processPacket(uint16_t packetSize)
+{
+#else
+uint8_t processPacket()
+ 748c: e1 e0 ldi r30, 0x01 ; 1
+ 748e: f0 e0 ldi r31, 0x00 ; 0
+ 7490: ec 0f add r30, r28
+ 7492: fd 1f adc r31, r29
+ 7494: e8 0f add r30, r24
+ 7496: f9 1f adc r31, r25
+ }
+ }
+
+ // Flash packets
+ for(offset = 0; offset < packetLength;) {
+ uint16_t writeValue = (pageBase[offset]) | (pageBase[offset + 1] << 8);
+ 7498: 25 85 ldd r18, Z+13 ; 0x0d
+ 749a: 30 e0 ldi r19, 0x00 ; 0
+ 749c: 32 2f mov r19, r18
+ 749e: 22 27 eor r18, r18
+ 74a0: ec 91 ld r30, X
+ 74a2: 2e 2b or r18, r30
+ boot_page_fill(writeAddr + offset, writeValue);
+ 74a4: f6 01 movw r30, r12
+ 74a6: 09 01 movw r0, r18
+ 74a8: 47 bf out 0x37, r20 ; 55
+ 74aa: e8 95 spm
+ 74ac: 11 24 eor r1, r1
+ tracenum(writeValue);
+ trace(" at offset ");
+ tracenum(writeAddr + offset);
+ }
+#endif
+ offset += 2;
+ 74ae: 02 96 adiw r24, 0x02 ; 2
+ if(offset % SPM_PAGESIZE == 0) {
+ 74b0: 9c 01 movw r18, r24
+ 74b2: 2f 77 andi r18, 0x7F ; 127
+ 74b4: 33 27 eor r19, r19
+ 74b6: 23 2b or r18, r19
+ 74b8: 71 f4 brne .+28 ; 0x74d6 <processPacket+0x1f8>
+ boot_page_erase(writeAddr + offset - SPM_PAGESIZE);
+ 74ba: ee 57 subi r30, 0x7E ; 126
+ 74bc: f1 09 sbc r31, r1
+ 74be: 57 bf out 0x37, r21 ; 55
+ 74c0: e8 95 spm
+ boot_spm_busy_wait();
+ 74c2: 07 b6 in r0, 0x37 ; 55
+ 74c4: 00 fc sbrc r0, 0
+ 74c6: fd cf rjmp .-6 ; 0x74c2 <processPacket+0x1e4>
+ boot_page_write(writeAddr + offset - SPM_PAGESIZE);
+ 74c8: 67 bf out 0x37, r22 ; 55
+ 74ca: e8 95 spm
+ boot_spm_busy_wait();
+ 74cc: 07 b6 in r0, 0x37 ; 55
+ 74ce: 00 fc sbrc r0, 0
+ 74d0: fd cf rjmp .-6 ; 0x74cc <processPacket+0x1ee>
+ boot_rww_enable();
+ 74d2: 77 bf out 0x37, r23 ; 55
+ 74d4: e8 95 spm
+ 74d6: 12 96 adiw r26, 0x02 ; 2
+ 74d8: f2 e0 ldi r31, 0x02 ; 2
+ 74da: cf 0e add r12, r31
+ 74dc: d1 1c adc r13, r1
+#endif
+ }
+ }
+
+ // Flash packets
+ for(offset = 0; offset < packetLength;) {
+ 74de: 8e 15 cp r24, r14
+ 74e0: 9f 05 cpc r25, r15
+ 74e2: a0 f2 brcs .-88 ; 0x748c <processPacket+0x1ae>
+ boot_spm_busy_wait();
+ boot_rww_enable();
+ }
+ }
+
+ if(packetLength < TFTP_DATA_SIZE) {
+ 74e4: e1 14 cp r14, r1
+ 74e6: 22 e0 ldi r18, 0x02 ; 2
+ 74e8: f2 06 cpc r15, r18
+ 74ea: 60 f4 brcc .+24 ; 0x7504 <processPacket+0x226>
+ // Hand over to application
+#ifdef _VERBOSE
+ traceln("Tftp: Flash is complete");
+#endif
+ // Flag the image as valid since we received the last packet
+ eeprom_write_byte(EEPROM_IMG_STAT, EEPROM_IMG_OK_VALUE);
+ 74ec: 6b eb ldi r22, 0xBB ; 187
+ 74ee: 82 e0 ldi r24, 0x02 ; 2
+ 74f0: 90 e0 ldi r25, 0x00 ; 0
+ 74f2: 71 d2 rcall .+1250 ; 0x79d6 <__eewr_byte_m328p>
+ returnCode = FINAL_ACK;
+ 74f4: 84 e0 ldi r24, 0x04 ; 4
+ 74f6: 07 c0 rjmp .+14 ; 0x7506 <processPacket+0x228>
+#ifdef _DEBUG_TFTP
+ traceln("Tftp: Invalid opcode ");
+ tracenum(tftpOpcode);
+#endif
+ // Invalid - return error
+ returnCode = ERROR_INVALID;
+ 74f8: 81 e0 ldi r24, 0x01 ; 1
+ 74fa: 05 c0 rjmp .+10 ; 0x7506 <processPacket+0x228>
+ // Flash is full - abort with an error before a bootloader overwrite occurs
+ // Application is now corrupt, so do not hand over.
+#ifdef _VERBOSE
+ traceln("Tftp: Flash is full");
+#endif
+ returnCode = ERROR_FULL;
+ 74fc: 83 e0 ldi r24, 0x03 ; 3
+ 74fe: 03 c0 rjmp .+6 ; 0x7506 <processPacket+0x228>
+ tracenum(packetLength);
+#endif
+ if(writeAddr == 0) {
+ // First sector - validate
+ if(!validImage(pageBase)) {
+ returnCode = INVALID_IMAGE;
+ 7500: 85 e0 ldi r24, 0x05 ; 5
+ 7502: 01 c0 rjmp .+2 ; 0x7506 <processPacket+0x228>
+#endif
+ // Flag the image as valid since we received the last packet
+ eeprom_write_byte(EEPROM_IMG_STAT, EEPROM_IMG_OK_VALUE);
+ returnCode = FINAL_ACK;
+ } else {
+ returnCode = ACK;
+ 7504: 82 e0 ldi r24, 0x02 ; 2
+ returnCode = ERROR_INVALID;
+ break;
+
+ }
+ return(returnCode);
+}
+ 7506: c4 5f subi r28, 0xF4 ; 244
+ 7508: dd 4f sbci r29, 0xFD ; 253
+ 750a: de bf out 0x3e, r29 ; 62
+ 750c: cd bf out 0x3d, r28 ; 61
+ 750e: df 91 pop r29
+ 7510: cf 91 pop r28
+ 7512: ff 90 pop r15
+ 7514: ef 90 pop r14
+ 7516: df 90 pop r13
+ 7518: cf 90 pop r12
+ 751a: bf 90 pop r11
+ 751c: af 90 pop r10
+ 751e: 08 95 ret
+
+00007520 <sendResponse>:
+
+
+void sendResponse(uint16_t response)
+{
+ 7520: af 92 push r10
+ 7522: bf 92 push r11
+ 7524: cf 92 push r12
+ 7526: df 92 push r13
+ 7528: ef 92 push r14
+ 752a: ff 92 push r15
+ 752c: 1f 93 push r17
+ 752e: cf 93 push r28
+ 7530: df 93 push r29
+ 7532: cd b7 in r28, 0x3d ; 61
+ 7534: de b7 in r29, 0x3e ; 62
+ 7536: c4 56 subi r28, 0x64 ; 100
+ 7538: d1 09 sbc r29, r1
+ 753a: de bf out 0x3e, r29 ; 62
+ 753c: cd bf out 0x3d, r28 ; 61
+ 753e: 7c 01 movw r14, r24
+ uint8_t txBuffer[100];
+ uint8_t *txPtr = txBuffer;
+ uint8_t packetLength;
+ uint16_t writePointer;
+
+ writePointer = netReadWord(REG_S3_TX_WR0) + S3_TX_START;
+ 7540: 84 e2 ldi r24, 0x24 ; 36
+ 7542: 97 e0 ldi r25, 0x07 ; 7
+ 7544: 52 de rcall .-860 ; 0x71ea <netReadWord>
+ 7546: 98 5a subi r25, 0xA8 ; 168
+ 7548: 6c 01 movw r12, r24
+ switch(response) {
+ 754a: 82 e0 ldi r24, 0x02 ; 2
+ 754c: e8 16 cp r14, r24
+ 754e: f1 04 cpc r15, r1
+ 7550: 79 f1 breq .+94 ; 0x75b0 <sendResponse+0x90>
+ 7552: 20 f4 brcc .+8 ; 0x755c <sendResponse+0x3c>
+ 7554: ea 94 dec r14
+ 7556: ef 28 or r14, r15
+ 7558: 49 f4 brne .+18 ; 0x756c <sendResponse+0x4c>
+ 755a: 18 c0 rjmp .+48 ; 0x758c <sendResponse+0x6c>
+ 755c: 83 e0 ldi r24, 0x03 ; 3
+ 755e: e8 16 cp r14, r24
+ 7560: f1 04 cpc r15, r1
+ 7562: e9 f0 breq .+58 ; 0x759e <sendResponse+0x7e>
+ 7564: e4 e0 ldi r30, 0x04 ; 4
+ 7566: ee 16 cp r14, r30
+ 7568: f1 04 cpc r15, r1
+ 756a: 11 f1 breq .+68 ; 0x75b0 <sendResponse+0x90>
+ default:
+
+ case ERROR_UNKNOWN:
+ // Send unknown error packet
+ packetLength = TFTP_UNKNOWN_ERROR_LEN;
+ memcpy_P(txBuffer, tftp_unknown_error_packet, packetLength);
+ 756c: 4a e0 ldi r20, 0x0A ; 10
+ 756e: 50 e0 ldi r21, 0x00 ; 0
+ 7570: 60 e8 ldi r22, 0x80 ; 128
+ 7572: 70 e7 ldi r23, 0x70 ; 112
+ 7574: ce 01 movw r24, r28
+ 7576: 01 96 adiw r24, 0x01 ; 1
+ 7578: 1d d2 rcall .+1082 ; 0x79b4 <memcpy_P>
+ switch(response) {
+ default:
+
+ case ERROR_UNKNOWN:
+ // Send unknown error packet
+ packetLength = TFTP_UNKNOWN_ERROR_LEN;
+ 757a: 8a e0 ldi r24, 0x0A ; 10
+ }
+
+ txPtr = txBuffer;
+ while(packetLength--) {
+ netWriteReg(writePointer++, *txPtr++);
+ if(writePointer == S3_TX_END) writePointer = S3_TX_START;
+ 757c: ee 24 eor r14, r14
+ 757e: e3 94 inc r14
+ 7580: f1 2c mov r15, r1
+ 7582: ec 0e add r14, r28
+ 7584: fd 1e adc r15, r29
+ }
+ return(returnCode);
+}
+
+
+void sendResponse(uint16_t response)
+ 7586: 18 2f mov r17, r24
+ 7588: 1e 0d add r17, r14
+ 758a: 2e c0 rjmp .+92 ; 0x75e8 <sendResponse+0xc8>
+ break;
+
+ case ERROR_INVALID:
+ // Send invalid opcode packet
+ packetLength = TFTP_OPCODE_ERROR_LEN;
+ memcpy_P(txBuffer, tftp_opcode_error_packet, packetLength);
+ 758c: 4c e0 ldi r20, 0x0C ; 12
+ 758e: 50 e0 ldi r21, 0x00 ; 0
+ 7590: 65 e9 ldi r22, 0x95 ; 149
+ 7592: 70 e7 ldi r23, 0x70 ; 112
+ 7594: ce 01 movw r24, r28
+ 7596: 01 96 adiw r24, 0x01 ; 1
+ 7598: 0d d2 rcall .+1050 ; 0x79b4 <memcpy_P>
+ memcpy_P(txBuffer, tftp_unknown_error_packet, packetLength);
+ break;
+
+ case ERROR_INVALID:
+ // Send invalid opcode packet
+ packetLength = TFTP_OPCODE_ERROR_LEN;
+ 759a: 8c e0 ldi r24, 0x0C ; 12
+ memcpy_P(txBuffer, tftp_opcode_error_packet, packetLength);
+ break;
+ 759c: ef cf rjmp .-34 ; 0x757c <sendResponse+0x5c>
+
+ case ERROR_FULL:
+ // Send unknown error packet
+ packetLength = TFTP_FULL_ERROR_LEN;
+ memcpy_P(txBuffer, tftp_full_error_packet, packetLength);
+ 759e: 49 e0 ldi r20, 0x09 ; 9
+ 75a0: 50 e0 ldi r21, 0x00 ; 0
+ 75a2: 6b e8 ldi r22, 0x8B ; 139
+ 75a4: 70 e7 ldi r23, 0x70 ; 112
+ 75a6: ce 01 movw r24, r28
+ 75a8: 01 96 adiw r24, 0x01 ; 1
+ 75aa: 04 d2 rcall .+1032 ; 0x79b4 <memcpy_P>
+ memcpy_P(txBuffer, tftp_opcode_error_packet, packetLength);
+ break;
+
+ case ERROR_FULL:
+ // Send unknown error packet
+ packetLength = TFTP_FULL_ERROR_LEN;
+ 75ac: 89 e0 ldi r24, 0x09 ; 9
+ memcpy_P(txBuffer, tftp_full_error_packet, packetLength);
+ break;
+ 75ae: e6 cf rjmp .-52 ; 0x757c <sendResponse+0x5c>
+ traceln("Tftp: Sent Final ACK ");
+ tracenum(lastPacket);
+ }
+#endif
+ packetLength = 4;
+ *txPtr++ = TFTP_OPCODE_ACK >> 8;
+ 75b0: 19 82 std Y+1, r1 ; 0x01
+ *txPtr++ = TFTP_OPCODE_ACK & 0xff;
+ 75b2: 84 e0 ldi r24, 0x04 ; 4
+ 75b4: 8a 83 std Y+2, r24 ; 0x02
+ // lastPacket is block code
+ *txPtr++ = lastPacket >> 8;
+ 75b6: 80 91 1e 01 lds r24, 0x011E
+ 75ba: 90 91 1f 01 lds r25, 0x011F
+ 75be: 9b 83 std Y+3, r25 ; 0x03
+ *txPtr = lastPacket & 0xff;
+ 75c0: 8c 83 std Y+4, r24 ; 0x04
+ if(response == FINAL_ACK) {
+ traceln("Tftp: Sent Final ACK ");
+ tracenum(lastPacket);
+ }
+#endif
+ packetLength = 4;
+ 75c2: 84 e0 ldi r24, 0x04 ; 4
+ *txPtr++ = TFTP_OPCODE_ACK >> 8;
+ *txPtr++ = TFTP_OPCODE_ACK & 0xff;
+ // lastPacket is block code
+ *txPtr++ = lastPacket >> 8;
+ *txPtr = lastPacket & 0xff;
+ break;
+ 75c4: db cf rjmp .-74 ; 0x757c <sendResponse+0x5c>
+ }
+
+ txPtr = txBuffer;
+ while(packetLength--) {
+ netWriteReg(writePointer++, *txPtr++);
+ 75c6: f7 01 movw r30, r14
+ 75c8: 61 91 ld r22, Z+
+ 75ca: 7f 01 movw r14, r30
+ 75cc: 56 01 movw r10, r12
+ 75ce: ff ef ldi r31, 0xFF ; 255
+ 75d0: af 1a sub r10, r31
+ 75d2: bf 0a sbc r11, r31
+ 75d4: c6 01 movw r24, r12
+ 75d6: d6 dd rcall .-1108 ; 0x7184 <netWriteReg>
+ if(writePointer == S3_TX_END) writePointer = S3_TX_START;
+ 75d8: a1 14 cp r10, r1
+ 75da: 80 e6 ldi r24, 0x60 ; 96
+ 75dc: b8 06 cpc r11, r24
+ 75de: 19 f4 brne .+6 ; 0x75e6 <sendResponse+0xc6>
+ 75e0: a1 2c mov r10, r1
+ 75e2: e8 e5 ldi r30, 0x58 ; 88
+ 75e4: be 2e mov r11, r30
+ 75e6: 65 01 movw r12, r10
+ *txPtr = lastPacket & 0xff;
+ break;
+ }
+
+ txPtr = txBuffer;
+ while(packetLength--) {
+ 75e8: 1e 11 cpse r17, r14
+ 75ea: ed cf rjmp .-38 ; 0x75c6 <sendResponse+0xa6>
+ netWriteReg(writePointer++, *txPtr++);
+ if(writePointer == S3_TX_END) writePointer = S3_TX_START;
+ }
+ netWriteWord(REG_S3_TX_WR0, writePointer - S3_TX_START);
+ 75ec: b6 01 movw r22, r12
+ 75ee: 78 55 subi r23, 0x58 ; 88
+ 75f0: 84 e2 ldi r24, 0x24 ; 36
+ 75f2: 97 e0 ldi r25, 0x07 ; 7
+ 75f4: 0e de rcall .-996 ; 0x7212 <netWriteWord>
+ netWriteReg(REG_S3_CR, CR_SEND);
+ 75f6: 60 e2 ldi r22, 0x20 ; 32
+ 75f8: 81 e0 ldi r24, 0x01 ; 1
+ 75fa: 97 e0 ldi r25, 0x07 ; 7
+ 75fc: c3 dd rcall .-1146 ; 0x7184 <netWriteReg>
+ while(netReadReg(REG_S3_CR));
+ 75fe: 81 e0 ldi r24, 0x01 ; 1
+ 7600: 97 e0 ldi r25, 0x07 ; 7
+ 7602: d9 dd rcall .-1102 ; 0x71b6 <netReadReg>
+ 7604: 81 11 cpse r24, r1
+ 7606: fb cf rjmp .-10 ; 0x75fe <sendResponse+0xde>
+#ifdef _VERBOSE
+ traceln("Tftp: Response sent");
+#endif
+}
+ 7608: cc 59 subi r28, 0x9C ; 156
+ 760a: df 4f sbci r29, 0xFF ; 255
+ 760c: de bf out 0x3e, r29 ; 62
+ 760e: cd bf out 0x3d, r28 ; 61
+ 7610: df 91 pop r29
+ 7612: cf 91 pop r28
+ 7614: 1f 91 pop r17
+ 7616: ff 90 pop r15
+ 7618: ef 90 pop r14
+ 761a: df 90 pop r13
+ 761c: cf 90 pop r12
+ 761e: bf 90 pop r11
+ 7620: af 90 pop r10
+ 7622: 08 95 ret
+
+00007624 <tftpInit>:
+void tftpInit()
+{
+ // Open socket
+ do {
+ // Write TFTP Port
+ netWriteWord(REG_S3_PORT0, TFTP_PORT);
+ 7624: 65 e4 ldi r22, 0x45 ; 69
+ 7626: 70 e0 ldi r23, 0x00 ; 0
+ 7628: 84 e0 ldi r24, 0x04 ; 4
+ 762a: 97 e0 ldi r25, 0x07 ; 7
+ 762c: f2 dd rcall .-1052 ; 0x7212 <netWriteWord>
+ // Write mode
+ netWriteReg(REG_S3_MR, MR_UDP);
+ 762e: 62 e0 ldi r22, 0x02 ; 2
+ 7630: 80 e0 ldi r24, 0x00 ; 0
+ 7632: 97 e0 ldi r25, 0x07 ; 7
+ 7634: a7 dd rcall .-1202 ; 0x7184 <netWriteReg>
+ // Open Socket
+ netWriteReg(REG_S3_CR, CR_OPEN);
+ 7636: 61 e0 ldi r22, 0x01 ; 1
+ 7638: 81 e0 ldi r24, 0x01 ; 1
+ 763a: 97 e0 ldi r25, 0x07 ; 7
+ 763c: a3 dd rcall .-1210 ; 0x7184 <netWriteReg>
+ // Read Status
+ if(netReadReg(REG_S3_SR) != SOCK_UDP)
+ 763e: 83 e0 ldi r24, 0x03 ; 3
+ 7640: 97 e0 ldi r25, 0x07 ; 7
+ 7642: b9 dd rcall .-1166 ; 0x71b6 <netReadReg>
+ 7644: 82 32 cpi r24, 0x22 ; 34
+ 7646: 21 f0 breq .+8 ; 0x7650 <tftpInit+0x2c>
+ // Close Socket if it wasn't initialized correctly
+ netWriteReg(REG_S3_CR, CR_CLOSE);
+ 7648: 60 e1 ldi r22, 0x10 ; 16
+ 764a: 81 e0 ldi r24, 0x01 ; 1
+ 764c: 97 e0 ldi r25, 0x07 ; 7
+ 764e: 9a dd rcall .-1228 ; 0x7184 <netWriteReg>
+ // If socket correctly opened continue
+ } while(netReadReg(REG_S3_SR) != SOCK_UDP);
+ 7650: 83 e0 ldi r24, 0x03 ; 3
+ 7652: 97 e0 ldi r25, 0x07 ; 7
+ 7654: b0 dd rcall .-1184 ; 0x71b6 <netReadReg>
+ 7656: 82 32 cpi r24, 0x22 ; 34
+ 7658: 29 f7 brne .-54 ; 0x7624 <tftpInit>
+#ifdef _VERBOSE
+ traceln("Tftp: TFTP server init done");
+#endif
+}
+ 765a: 08 95 ret
+
+0000765c <tftpPoll>:
+
+/**
+ * Looks for a connection
+ */
+uint8_t tftpPoll()
+{
+ 765c: cf 93 push r28
+ uint8_t response = ACK;
+ // Get the size of the recieved data
+ uint16_t packetSize = netReadWord(REG_S3_RX_RSR0);
+ 765e: 86 e2 ldi r24, 0x26 ; 38
+ 7660: 97 e0 ldi r25, 0x07 ; 7
+ 7662: c3 dd rcall .-1146 ; 0x71ea <netReadWord>
+
+ if(packetSize) {
+ 7664: 89 2b or r24, r25
+ 7666: 11 f4 brne .+4 ; 0x766c <tftpPoll+0x10>
+ netWriteReg(REG_S3_CR, CR_CLOSE);
+ // Complete
+ return(0);
+ }
+ // Tftp continues
+ return(1);
+ 7668: 81 e0 ldi r24, 0x01 ; 1
+ 766a: 26 c0 rjmp .+76 ; 0x76b8 <tftpPoll+0x5c>
+ uint8_t response = ACK;
+ // Get the size of the recieved data
+ uint16_t packetSize = netReadWord(REG_S3_RX_RSR0);
+
+ if(packetSize) {
+ if(!tftpFlashing) resetTick();
+ 766c: 80 91 27 01 lds r24, 0x0127
+ 7670: 81 11 cpse r24, r1
+ 7672: 01 c0 rjmp .+2 ; 0x7676 <tftpPoll+0x1a>
+ 7674: 8a d1 rcall .+788 ; 0x798a <resetTick>
+ tftpFlashing = TRUE;
+ 7676: 81 e0 ldi r24, 0x01 ; 1
+ 7678: 80 93 27 01 sts 0x0127, r24
+
+ for(;;) {
+ if(!(netReadReg(REG_S3_IR) & IR_RECV)) break;
+ 767c: 82 e0 ldi r24, 0x02 ; 2
+ 767e: 97 e0 ldi r25, 0x07 ; 7
+ 7680: 9a dd rcall .-1228 ; 0x71b6 <netReadReg>
+ 7682: 82 ff sbrs r24, 2
+ 7684: 0e c0 rjmp .+28 ; 0x76a2 <tftpPoll+0x46>
+
+ netWriteReg(REG_S3_IR, IR_RECV);
+ 7686: 64 e0 ldi r22, 0x04 ; 4
+ 7688: 82 e0 ldi r24, 0x02 ; 2
+ 768a: 97 e0 ldi r25, 0x07 ; 7
+ 768c: 7b dd rcall .-1290 ; 0x7184 <netWriteReg>
+ #else
+ //round up by default
+ __ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
+ #endif
+
+ __builtin_avr_delay_cycles(__ticks_dc);
+ 768e: 2f ef ldi r18, 0xFF ; 255
+ 7690: 87 e8 ldi r24, 0x87 ; 135
+ 7692: 93 e1 ldi r25, 0x13 ; 19
+ 7694: 21 50 subi r18, 0x01 ; 1
+ 7696: 80 40 sbci r24, 0x00 ; 0
+ 7698: 90 40 sbci r25, 0x00 ; 0
+ 769a: e1 f7 brne .-8 ; 0x7694 <tftpPoll+0x38>
+ 769c: 00 c0 rjmp .+0 ; 0x769e <tftpPoll+0x42>
+ 769e: 00 00 nop
+ 76a0: ed cf rjmp .-38 ; 0x767c <tftpPoll+0x20>
+ }
+ // Process Packet and get TFTP response code
+#ifdef _DEBUG_TFTP
+ response = processPacket(packetSize);
+#else
+ response = processPacket();
+ 76a2: 1d de rcall .-966 ; 0x72de <processPacket>
+ 76a4: c8 2f mov r28, r24
+#endif
+ // Send the response
+ sendResponse(response);
+ 76a6: 90 e0 ldi r25, 0x00 ; 0
+ 76a8: 3b df rcall .-394 ; 0x7520 <sendResponse>
+ }
+ if(response==FINAL_ACK) {
+ 76aa: c4 30 cpi r28, 0x04 ; 4
+ 76ac: e9 f6 brne .-70 ; 0x7668 <tftpPoll+0xc>
+ netWriteReg(REG_S3_CR, CR_CLOSE);
+ 76ae: 60 e1 ldi r22, 0x10 ; 16
+ 76b0: 81 e0 ldi r24, 0x01 ; 1
+ 76b2: 97 e0 ldi r25, 0x07 ; 7
+ 76b4: 67 dd rcall .-1330 ; 0x7184 <netWriteReg>
+ // Complete
+ return(0);
+ 76b6: 80 e0 ldi r24, 0x00 ; 0
+ }
+ // Tftp continues
+ return(1);
+}
+ 76b8: cf 91 pop r28
+ 76ba: 08 95 ret
+
+000076bc <validImage>:
+#include "debug.h"
+#include "serial.h"
+
+
+uint8_t validImage(uint8_t *base)
+{
+ 76bc: 20 e0 ldi r18, 0x00 ; 0
+ 76be: 30 e0 ldi r19, 0x00 ; 0
+#include "validate.h"
+#include "debug.h"
+#include "serial.h"
+
+
+uint8_t validImage(uint8_t *base)
+ 76c0: fc 01 movw r30, r24
+ 76c2: e2 0f add r30, r18
+ 76c4: f3 1f adc r31, r19
+ /* Check that a jump table is present in the first flash sector */
+ uint8_t i;
+ for(i = 0; i < 0x34; i += 4) {
+ // For each vector, check it is of the form:
+ // 0x0C 0x94 0xWX 0xYZ ; JMP 0xWXYZ
+ if(base[i] != 0x0c) {
+ 76c6: 40 81 ld r20, Z
+ 76c8: 4c 30 cpi r20, 0x0C ; 12
+ 76ca: 51 f4 brne .+20 ; 0x76e0 <validImage+0x24>
+ tracenum(base[i]);
+ trace(" instead of 0x0C");
+#endif
+ return(0);
+ }
+ if(base[i + 1] != 0x94) {
+ 76cc: 41 81 ldd r20, Z+1 ; 0x01
+ 76ce: 44 39 cpi r20, 0x94 ; 148
+ 76d0: 39 f4 brne .+14 ; 0x76e0 <validImage+0x24>
+ 76d2: 2c 5f subi r18, 0xFC ; 252
+ 76d4: 3f 4f sbci r19, 0xFF ; 255
+
+uint8_t validImage(uint8_t *base)
+{
+ /* Check that a jump table is present in the first flash sector */
+ uint8_t i;
+ for(i = 0; i < 0x34; i += 4) {
+ 76d6: 24 33 cpi r18, 0x34 ; 52
+ 76d8: 31 05 cpc r19, r1
+ 76da: 91 f7 brne .-28 ; 0x76c0 <validImage+0x4>
+ }
+ }
+#ifdef _DEBUG_VALD
+ traceln("Vald: Valid image");
+#endif
+ return(1);
+ 76dc: 81 e0 ldi r24, 0x01 ; 1
+ 76de: 08 95 ret
+ tracenum(i);
+ trace(" with ");
+ tracenum(base[i]);
+ trace(" instead of 0x0C");
+#endif
+ return(0);
+ 76e0: 80 e0 ldi r24, 0x00 ; 0
+ }
+#ifdef _DEBUG_VALD
+ traceln("Vald: Valid image");
+#endif
+ return(1);
+}
+ 76e2: 08 95 ret
+
+000076e4 <watchdogDisable>:
+ */
+uint8_t watchdogDisable(void)
+{
+ uint8_t mcusr_mirror;
+
+ mcusr_mirror = MCUSR;
+ 76e4: 84 b7 in r24, 0x34 ; 52
+ MCUSR = 0;
+ 76e6: 14 be out 0x34, r1 ; 52
+ wdt_disable();
+ 76e8: 98 e1 ldi r25, 0x18 ; 24
+ 76ea: 0f b6 in r0, 0x3f ; 63
+ 76ec: f8 94 cli
+ 76ee: 90 93 60 00 sts 0x0060, r25
+ 76f2: 10 92 60 00 sts 0x0060, r1
+ 76f6: 0f be out 0x3f, r0 ; 63
+
+ return(mcusr_mirror);
+}
+ 76f8: 08 95 ret
+
+000076fa <watchdogReset>:
+
+void watchdogReset(void)
+{
+ wdt_reset();
+ 76fa: a8 95 wdr
+ 76fc: 08 95 ret
+
+000076fe <watchdogConfig>:
+}
+
+void watchdogConfig(uint8_t x)
+{
+ WDTCSR = _BV(WDCE) | _BV(WDE);
+ 76fe: e0 e6 ldi r30, 0x60 ; 96
+ 7700: f0 e0 ldi r31, 0x00 ; 0
+ 7702: 98 e1 ldi r25, 0x18 ; 24
+ 7704: 90 83 st Z, r25
+ WDTCSR = x;
+ 7706: 80 83 st Z, r24
+ 7708: 08 95 ret
+
+0000770a <verifySpace>:
+uint8_t length;
+
+
+void verifySpace()
+{
+ if(getch() != CRC_EOP) {
+ 770a: 12 d1 rcall .+548 ; 0x7930 <getch>
+ 770c: 80 32 cpi r24, 0x20 ; 32
+ 770e: 19 f0 breq .+6 ; 0x7716 <verifySpace+0xc>
+ watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
+ 7710: 88 e0 ldi r24, 0x08 ; 8
+ 7712: f5 df rcall .-22 ; 0x76fe <watchdogConfig>
+ 7714: ff cf rjmp .-2 ; 0x7714 <verifySpace+0xa>
+ while(1) // and busy-loop so that WD causes
+ ; // a reset and app start.
+ }
+ putch(STK_INSYNC);
+ 7716: 84 e1 ldi r24, 0x14 ; 20
+ 7718: f8 c0 rjmp .+496 ; 0x790a <putch>
+
+0000771a <getNch>:
+}
+
+
+void getNch(uint8_t count)
+{
+ 771a: cf 93 push r28
+ 771c: c8 2f mov r28, r24
+ do getch();
+ 771e: 08 d1 rcall .+528 ; 0x7930 <getch>
+ while(--count);
+ 7720: c1 50 subi r28, 0x01 ; 1
+ 7722: e9 f7 brne .-6 ; 0x771e <getNch+0x4>
+ verifySpace();
+}
+ 7724: cf 91 pop r28
+
+void getNch(uint8_t count)
+{
+ do getch();
+ while(--count);
+ verifySpace();
+ 7726: f1 cf rjmp .-30 ; 0x770a <verifySpace>
+
+00007728 <proccessCommand>:
+}
+
+
+uint8_t proccessCommand()
+{
+ 7728: ef 92 push r14
+ 772a: ff 92 push r15
+ 772c: cf 93 push r28
+ 772e: df 93 push r29
+ 7730: cd b7 in r28, 0x3d ; 61
+ 7732: de b7 in r29, 0x3e ; 62
+ 7734: c1 50 subi r28, 0x01 ; 1
+ 7736: d1 40 sbci r29, 0x01 ; 1
+ 7738: de bf out 0x3e, r29 ; 62
+ 773a: cd bf out 0x3d, r28 ; 61
+ uint8_t ch;
+
+ ch = getch();
+ 773c: f9 d0 rcall .+498 ; 0x7930 <getch>
+
+ if(ch == STK_GET_PARAMETER) {
+ 773e: 81 34 cpi r24, 0x41 ; 65
+ 7740: a9 f4 brne .+42 ; 0x776c <proccessCommand+0x44>
+ unsigned char which = getch();
+ 7742: f6 d0 rcall .+492 ; 0x7930 <getch>
+ verifySpace();
+ 7744: cf 5f subi r28, 0xFF ; 255
+ 7746: de 4f sbci r29, 0xFE ; 254
+ 7748: 88 83 st Y, r24
+ 774a: c1 50 subi r28, 0x01 ; 1
+ 774c: d1 40 sbci r29, 0x01 ; 1
+ 774e: dd df rcall .-70 ; 0x770a <verifySpace>
+ if(which == 0x82) {
+ 7750: cf 5f subi r28, 0xFF ; 255
+ 7752: de 4f sbci r29, 0xFE ; 254
+ 7754: 88 81 ld r24, Y
+ 7756: c1 50 subi r28, 0x01 ; 1
+ 7758: d1 40 sbci r29, 0x01 ; 1
+ 775a: 82 38 cpi r24, 0x82 ; 130
+ 775c: 11 f4 brne .+4 ; 0x7762 <proccessCommand+0x3a>
+ /*
+ * Send tftpboot version as "minor SW version"
+ */
+ putch(TFTPBOOT_MINVER);
+ 775e: 83 e0 ldi r24, 0x03 ; 3
+ 7760: 03 c0 rjmp .+6 ; 0x7768 <proccessCommand+0x40>
+ } else if(which == 0x81) {
+ 7762: 81 38 cpi r24, 0x81 ; 129
+ 7764: e1 f7 brne .-8 ; 0x775e <proccessCommand+0x36>
+ putch(TFTPBOOT_MAJVER);
+ 7766: 80 e0 ldi r24, 0x00 ; 0
+ 7768: d0 d0 rcall .+416 ; 0x790a <putch>
+ 776a: ac c0 rjmp .+344 ; 0x78c4 <proccessCommand+0x19c>
+ * GET PARAMETER returns a generic 0x03 reply for
+ * other parameters - enough to keep Avrdude happy
+ */
+ putch(0x03);
+ }
+ } else if(ch == STK_SET_DEVICE) {
+ 776c: 82 34 cpi r24, 0x42 ; 66
+ 776e: 11 f4 brne .+4 ; 0x7774 <proccessCommand+0x4c>
+ // SET DEVICE is ignored
+ getNch(20);
+ 7770: 84 e1 ldi r24, 0x14 ; 20
+ 7772: 03 c0 rjmp .+6 ; 0x777a <proccessCommand+0x52>
+ } else if(ch == STK_SET_DEVICE_EXT) {
+ 7774: 85 34 cpi r24, 0x45 ; 69
+ 7776: 19 f4 brne .+6 ; 0x777e <proccessCommand+0x56>
+ // SET DEVICE EXT is ignored
+ getNch(4);
+ 7778: 84 e0 ldi r24, 0x04 ; 4
+ 777a: cf df rcall .-98 ; 0x771a <getNch>
+ 777c: a3 c0 rjmp .+326 ; 0x78c4 <proccessCommand+0x19c>
+ } else if(ch == STK_LOAD_ADDRESS) {
+ 777e: 85 35 cpi r24, 0x55 ; 85
+ 7780: 69 f4 brne .+26 ; 0x779c <proccessCommand+0x74>
+ // LOAD ADDRESS
+ uint16_t newAddress;
+ newAddress = getch();
+ 7782: d6 d0 rcall .+428 ; 0x7930 <getch>
+ 7784: f8 2e mov r15, r24
+ newAddress = (newAddress & 0xff) | (getch() << 8);
+ 7786: d4 d0 rcall .+424 ; 0x7930 <getch>
+ 7788: 2f 2d mov r18, r15
+ 778a: 30 e0 ldi r19, 0x00 ; 0
+ 778c: 38 2b or r19, r24
+#ifdef RAMPZ
+ // Transfer top bit to RAMPZ
+ RAMPZ = (newAddress & 0x8000) ? 1 : 0;
+#endif
+
+ newAddress += newAddress; // Convert from word address to byte address
+ 778e: 22 0f add r18, r18
+ 7790: 33 1f adc r19, r19
+ address = newAddress;
+ 7792: 30 93 21 01 sts 0x0121, r19
+ 7796: 20 93 20 01 sts 0x0120, r18
+ 779a: 93 c0 rjmp .+294 ; 0x78c2 <proccessCommand+0x19a>
+ verifySpace();
+ } else if(ch == STK_UNIVERSAL) {
+ 779c: 86 35 cpi r24, 0x56 ; 86
+ 779e: 19 f4 brne .+6 ; 0x77a6 <proccessCommand+0x7e>
+ // UNIVERSAL command is ignored
+ getNch(4);
+ 77a0: 84 e0 ldi r24, 0x04 ; 4
+ 77a2: bb df rcall .-138 ; 0x771a <getNch>
+ 77a4: e0 cf rjmp .-64 ; 0x7766 <proccessCommand+0x3e>
+ putch(0x00);
+ }
+ /* Write memory, length is big endian and is in bytes */
+ else if(ch == STK_PROG_PAGE) {
+ 77a6: 84 36 cpi r24, 0x64 ; 100
+ 77a8: 09 f0 breq .+2 ; 0x77ac <proccessCommand+0x84>
+ 77aa: 5b c0 rjmp .+182 ; 0x7862 <proccessCommand+0x13a>
+ // PROGRAM PAGE - we support flash programming only, not EEPROM
+ uint8_t buff[256];
+ uint8_t* bufPtr;
+ uint16_t addrPtr;
+
+ getch(); /* getlen() */
+ 77ac: c1 d0 rcall .+386 ; 0x7930 <getch>
+ length = getch();
+ 77ae: c0 d0 rcall .+384 ; 0x7930 <getch>
+ 77b0: 80 93 28 01 sts 0x0128, r24
+ getch();
+ 77b4: bd d0 rcall .+378 ; 0x7930 <getch>
+
+ // If we are in RWW section, immediately start page erase
+ if(address < NRWWSTART) boot_page_erase((uint16_t)(void *)address);
+ 77b6: e0 91 20 01 lds r30, 0x0120
+ 77ba: f0 91 21 01 lds r31, 0x0121
+ 77be: e1 15 cp r30, r1
+ 77c0: 80 e7 ldi r24, 0x70 ; 112
+ 77c2: f8 07 cpc r31, r24
+ 77c4: 18 f4 brcc .+6 ; 0x77cc <proccessCommand+0xa4>
+ 77c6: 83 e0 ldi r24, 0x03 ; 3
+ 77c8: 87 bf out 0x37, r24 ; 55
+ 77ca: e8 95 spm
+ 77cc: ee 24 eor r14, r14
+ 77ce: e3 94 inc r14
+ 77d0: f1 2c mov r15, r1
+ 77d2: ec 0e add r14, r28
+ 77d4: fd 1e adc r15, r29
+
+ // While that is going on, read in page contents
+ bufPtr = buff;
+ do *bufPtr++ = getch();
+ 77d6: ac d0 rcall .+344 ; 0x7930 <getch>
+ 77d8: f7 01 movw r30, r14
+ 77da: 81 93 st Z+, r24
+ 77dc: 7f 01 movw r14, r30
+ while(--length);
+ 77de: 80 91 28 01 lds r24, 0x0128
+ 77e2: 81 50 subi r24, 0x01 ; 1
+ 77e4: 80 93 28 01 sts 0x0128, r24
+ 77e8: 81 11 cpse r24, r1
+ 77ea: f5 cf rjmp .-22 ; 0x77d6 <proccessCommand+0xae>
+
+ // If we are in NRWW section, page erase has to be delayed until now.
+ // Todo: Take RAMPZ into account
+ if(address >= NRWWSTART) boot_page_erase((uint16_t)(void *)address);
+ 77ec: e0 91 20 01 lds r30, 0x0120
+ 77f0: f0 91 21 01 lds r31, 0x0121
+ 77f4: e1 15 cp r30, r1
+ 77f6: 80 e7 ldi r24, 0x70 ; 112
+ 77f8: f8 07 cpc r31, r24
+ 77fa: 18 f0 brcs .+6 ; 0x7802 <proccessCommand+0xda>
+ 77fc: 83 e0 ldi r24, 0x03 ; 3
+ 77fe: 87 bf out 0x37, r24 ; 55
+ 7800: e8 95 spm
+
+ // Read command terminator, start reply
+ verifySpace();
+ 7802: 83 df rcall .-250 ; 0x770a <verifySpace>
+
+ // If only a partial page is to be programmed, the erase might not be complete.
+ // So check that here
+ boot_spm_busy_wait();
+ 7804: 07 b6 in r0, 0x37 ; 55
+ 7806: 00 fc sbrc r0, 0
+ 7808: fd cf rjmp .-6 ; 0x7804 <proccessCommand+0xdc>
+
+ // Copy buffer into programming buffer
+ bufPtr = buff;
+ addrPtr = (uint16_t)(void *)address;
+ 780a: 40 91 20 01 lds r20, 0x0120
+ 780e: 50 91 21 01 lds r21, 0x0121
+ // If only a partial page is to be programmed, the erase might not be complete.
+ // So check that here
+ boot_spm_busy_wait();
+
+ // Copy buffer into programming buffer
+ bufPtr = buff;
+ 7812: 29 81 ldd r18, Y+1 ; 0x01
+ 7814: 80 e0 ldi r24, 0x00 ; 0
+ 7816: 90 e0 ldi r25, 0x00 ; 0
+ ch = SPM_PAGESIZE / 2;
+ do {
+ uint16_t a;
+ a = *bufPtr++;
+ a |= (*bufPtr++) << 8;
+ boot_page_fill((uint16_t)(void *)addrPtr, a);
+ 7818: 61 e0 ldi r22, 0x01 ; 1
+ while(--count);
+ verifySpace();
+}
+
+
+uint8_t proccessCommand()
+ 781a: a1 e0 ldi r26, 0x01 ; 1
+ 781c: b0 e0 ldi r27, 0x00 ; 0
+ 781e: ac 0f add r26, r28
+ 7820: bd 1f adc r27, r29
+ 7822: a8 0f add r26, r24
+ 7824: b9 1f adc r27, r25
+ 7826: fc 01 movw r30, r24
+ 7828: e4 0f add r30, r20
+ 782a: f5 1f adc r31, r21
+ addrPtr = (uint16_t)(void *)address;
+ ch = SPM_PAGESIZE / 2;
+ do {
+ uint16_t a;
+ a = *bufPtr++;
+ a |= (*bufPtr++) << 8;
+ 782c: 11 96 adiw r26, 0x01 ; 1
+ 782e: 7c 91 ld r23, X
+ 7830: 11 97 sbiw r26, 0x01 ; 1
+ 7832: 30 e0 ldi r19, 0x00 ; 0
+ 7834: 37 2b or r19, r23
+ boot_page_fill((uint16_t)(void *)addrPtr, a);
+ 7836: 09 01 movw r0, r18
+ 7838: 67 bf out 0x37, r22 ; 55
+ 783a: e8 95 spm
+ 783c: 11 24 eor r1, r1
+ addrPtr += 2;
+ } while(--ch);
+ 783e: 8e 37 cpi r24, 0x7E ; 126
+ 7840: 91 05 cpc r25, r1
+ 7842: 21 f0 breq .+8 ; 0x784c <proccessCommand+0x124>
+ addrPtr = (uint16_t)(void *)address;
+ ch = SPM_PAGESIZE / 2;
+ do {
+ uint16_t a;
+ a = *bufPtr++;
+ a |= (*bufPtr++) << 8;
+ 7844: 12 96 adiw r26, 0x02 ; 2
+ 7846: 2c 91 ld r18, X
+ 7848: 02 96 adiw r24, 0x02 ; 2
+ 784a: e7 cf rjmp .-50 ; 0x781a <proccessCommand+0xf2>
+ boot_page_fill((uint16_t)(void *)addrPtr, a);
+ addrPtr += 2;
+ } while(--ch);
+
+ // Write from programming buffer
+ boot_page_write((uint16_t)(void *)address);
+ 784c: 85 e0 ldi r24, 0x05 ; 5
+ 784e: fa 01 movw r30, r20
+ 7850: 87 bf out 0x37, r24 ; 55
+ 7852: e8 95 spm
+ boot_spm_busy_wait();
+ 7854: 07 b6 in r0, 0x37 ; 55
+ 7856: 00 fc sbrc r0, 0
+ 7858: fd cf rjmp .-6 ; 0x7854 <proccessCommand+0x12c>
+
+#if defined(RWWSRE)
+ // Reenable read access to flash
+ boot_rww_enable();
+ 785a: 81 e1 ldi r24, 0x11 ; 17
+ 785c: 87 bf out 0x37, r24 ; 55
+ 785e: e8 95 spm
+ 7860: 31 c0 rjmp .+98 ; 0x78c4 <proccessCommand+0x19c>
+#endif
+ }
+ /* Read memory block mode, length is big endian. */
+ else if(ch == STK_READ_PAGE) {
+ 7862: 84 37 cpi r24, 0x74 ; 116
+ 7864: d1 f4 brne .+52 ; 0x789a <proccessCommand+0x172>
+ // READ PAGE - we only read flash
+ getch(); /* getlen() */
+ 7866: 64 d0 rcall .+200 ; 0x7930 <getch>
+ length = getch();
+ 7868: 63 d0 rcall .+198 ; 0x7930 <getch>
+ 786a: 80 93 28 01 sts 0x0128, r24
+ getch();
+ 786e: 60 d0 rcall .+192 ; 0x7930 <getch>
+
+ verifySpace();
+ 7870: 4c df rcall .-360 ; 0x770a <verifySpace>
+ __asm__("elpm %0,Z\n":"=r"(result):"z"(address));
+ putch(result);
+ address++;
+ } while(--length);
+#else
+ do putch(pgm_read_byte_near(address++));
+ 7872: e0 91 20 01 lds r30, 0x0120
+ 7876: f0 91 21 01 lds r31, 0x0121
+ 787a: cf 01 movw r24, r30
+ 787c: 01 96 adiw r24, 0x01 ; 1
+ 787e: 90 93 21 01 sts 0x0121, r25
+ 7882: 80 93 20 01 sts 0x0120, r24
+ 7886: 84 91 lpm r24, Z
+ 7888: 40 d0 rcall .+128 ; 0x790a <putch>
+ while(--length);
+ 788a: 80 91 28 01 lds r24, 0x0128
+ 788e: 81 50 subi r24, 0x01 ; 1
+ 7890: 80 93 28 01 sts 0x0128, r24
+ 7894: 81 11 cpse r24, r1
+ 7896: ed cf rjmp .-38 ; 0x7872 <proccessCommand+0x14a>
+ 7898: 15 c0 rjmp .+42 ; 0x78c4 <proccessCommand+0x19c>
+#endif
+ }
+ /* Get device signature bytes */
+ else if(ch == STK_READ_SIGN) {
+ 789a: 85 37 cpi r24, 0x75 ; 117
+ 789c: 39 f4 brne .+14 ; 0x78ac <proccessCommand+0x184>
+ // READ SIGN - return what Avrdude wants to hear
+ verifySpace();
+ 789e: 35 df rcall .-406 ; 0x770a <verifySpace>
+ putch(SIGNATURE_0);
+ 78a0: 8e e1 ldi r24, 0x1E ; 30
+ 78a2: 33 d0 rcall .+102 ; 0x790a <putch>
+ putch(SIGNATURE_1);
+ 78a4: 85 e9 ldi r24, 0x95 ; 149
+ 78a6: 31 d0 rcall .+98 ; 0x790a <putch>
+ putch(SIGNATURE_2);
+ 78a8: 8f e0 ldi r24, 0x0F ; 15
+ 78aa: 5e cf rjmp .-324 ; 0x7768 <proccessCommand+0x40>
+ } else if(ch == STK_LEAVE_PROGMODE) {
+ 78ac: 81 35 cpi r24, 0x51 ; 81
+ 78ae: 49 f4 brne .+18 ; 0x78c2 <proccessCommand+0x19a>
+ // Adaboot no-wait mod
+ //watchdogConfig(WATCHDOG_16MS);
+ verifySpace();
+ 78b0: 2c df rcall .-424 ; 0x770a <verifySpace>
+ eeprom_write_byte(EEPROM_IMG_STAT, EEPROM_IMG_OK_VALUE);
+ 78b2: 6b eb ldi r22, 0xBB ; 187
+ 78b4: 82 e0 ldi r24, 0x02 ; 2
+ 78b6: 90 e0 ldi r25, 0x00 ; 0
+ 78b8: 8e d0 rcall .+284 ; 0x79d6 <__eewr_byte_m328p>
+ putch(STK_OK);
+ 78ba: 80 e1 ldi r24, 0x10 ; 16
+ 78bc: 26 d0 rcall .+76 ; 0x790a <putch>
+ return(0);
+ 78be: 80 e0 ldi r24, 0x00 ; 0
+ 78c0: 04 c0 rjmp .+8 ; 0x78ca <proccessCommand+0x1a2>
+ } else {
+ // This covers the response to commands like STK_ENTER_PROGMODE
+ verifySpace();
+ 78c2: 23 df rcall .-442 ; 0x770a <verifySpace>
+ }
+ putch(STK_OK);
+ 78c4: 80 e1 ldi r24, 0x10 ; 16
+ 78c6: 21 d0 rcall .+66 ; 0x790a <putch>
+ return(1);
+ 78c8: 81 e0 ldi r24, 0x01 ; 1
+}
+ 78ca: cf 5f subi r28, 0xFF ; 255
+ 78cc: de 4f sbci r29, 0xFE ; 254
+ 78ce: de bf out 0x3e, r29 ; 62
+ 78d0: cd bf out 0x3d, r28 ; 61
+ 78d2: df 91 pop r29
+ 78d4: cf 91 pop r28
+ 78d6: ff 90 pop r15
+ 78d8: ef 90 pop r14
+ 78da: 08 95 ret
+
+000078dc <serialPoll>:
+
+
+uint8_t serialPoll()
+{
+ if(UCSR0A & _BV(RXC0)){
+ 78dc: 80 91 c0 00 lds r24, 0x00C0
+ 78e0: 87 ff sbrs r24, 7
+ 78e2: 04 c0 rjmp .+8 ; 0x78ec <serialPoll+0x10>
+ serialFlashing = TRUE;
+ 78e4: 81 e0 ldi r24, 0x01 ; 1
+ 78e6: 80 93 26 01 sts 0x0126, r24
+ return(proccessCommand());
+ 78ea: 1e cf rjmp .-452 ; 0x7728 <proccessCommand>
+ } else return(1);
+}
+ 78ec: 81 e0 ldi r24, 0x01 ; 1
+ 78ee: 08 95 ret
+
+000078f0 <serialInit>:
+#include "pin_defs.h"
+
+
+void serialInit()
+{
+ UCSR0A = _BV(U2X0); //Double speed mode USART0
+ 78f0: 82 e0 ldi r24, 0x02 ; 2
+ 78f2: 80 93 c0 00 sts 0x00C0, r24
+ UCSR0B = _BV(RXEN0) | _BV(TXEN0);
+ 78f6: 88 e1 ldi r24, 0x18 ; 24
+ 78f8: 80 93 c1 00 sts 0x00C1, r24
+ UCSR0C = _BV(UCSZ00) | _BV(UCSZ01);
+ 78fc: 86 e0 ldi r24, 0x06 ; 6
+ 78fe: 80 93 c2 00 sts 0x00C2, r24
+ UBRR0L = (uint8_t)((F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1);
+ 7902: 80 e1 ldi r24, 0x10 ; 16
+ 7904: 80 93 c4 00 sts 0x00C4, r24
+ 7908: 08 95 ret
+
+0000790a <putch>:
+}
+
+
+void putch(uint8_t c)
+{
+ while(!(UCSR0A & _BV(UDRE0)));
+ 790a: 90 91 c0 00 lds r25, 0x00C0
+ 790e: 95 ff sbrs r25, 5
+ 7910: fc cf rjmp .-8 ; 0x790a <putch>
+ UDR0 = c;
+ 7912: 80 93 c6 00 sts 0x00C6, r24
+ 7916: 08 95 ret
+
+00007918 <puthex>:
+}
+
+
+void puthex(uint8_t c)
+{
+ c &= 0xf;
+ 7918: 8f 70 andi r24, 0x0F ; 15
+ if(c > 9) c += 7;
+ 791a: 8a 30 cpi r24, 0x0A ; 10
+ 791c: 08 f0 brcs .+2 ; 0x7920 <puthex+0x8>
+ 791e: 89 5f subi r24, 0xF9 ; 249
+ while(!(UCSR0A & _BV(UDRE0)));
+ 7920: 90 91 c0 00 lds r25, 0x00C0
+ 7924: 95 ff sbrs r25, 5
+ 7926: fc cf rjmp .-8 ; 0x7920 <puthex+0x8>
+ UDR0 = c + '0';
+ 7928: 80 5d subi r24, 0xD0 ; 208
+ 792a: 80 93 c6 00 sts 0x00C6, r24
+ 792e: 08 95 ret
+
+00007930 <getch>:
+
+uint8_t getch(void)
+{
+ uint8_t ch;
+
+ while(!(UCSR0A & _BV(RXC0)));
+ 7930: 80 91 c0 00 lds r24, 0x00C0
+ 7934: 87 ff sbrs r24, 7
+ 7936: fc cf rjmp .-8 ; 0x7930 <getch>
+ if(!(UCSR0A & _BV(FE0))) {
+ 7938: 80 91 c0 00 lds r24, 0x00C0
+ 793c: 84 ff sbrs r24, 4
+ * expects to be talking to the application, and DON'T reset the
+ * watchdog. This should cause the bootloader to abort and run
+ * the application "soon", if it keeps happening. (Note that we
+ * don't care that an invalid char is returned...)
+ */
+ watchdogReset();
+ 793e: dd de rcall .-582 ; 0x76fa <watchdogReset>
+ }
+ ch = UDR0;
+ 7940: 80 91 c6 00 lds r24, 0x00C6
+
+ return ch;
+}
+ 7944: 08 95 ret
+
+00007946 <updateLed>:
+uint16_t tick = 0;
+
+
+void updateLed(void)
+{
+ uint16_t nextTimer1 = TCNT1;
+ 7946: 80 91 84 00 lds r24, 0x0084
+ 794a: 90 91 85 00 lds r25, 0x0085
+ if(nextTimer1 & 0x400) LED_PORT ^= _BV(LED); // Led pin high
+ 794e: 92 ff sbrs r25, 2
+ 7950: 05 c0 rjmp .+10 ; 0x795c <updateLed+0x16>
+ 7952: 25 b1 in r18, 0x05 ; 5
+ 7954: 30 e2 ldi r19, 0x20 ; 32
+ 7956: 23 27 eor r18, r19
+ 7958: 25 b9 out 0x05, r18 ; 5
+ 795a: 01 c0 rjmp .+2 ; 0x795e <updateLed+0x18>
+ else LED_PORT &= ~_BV(LED); // Led pin low
+ 795c: 2d 98 cbi 0x05, 5 ; 5
+ if(nextTimer1 < lastTimer1) tick++;
+ 795e: 20 91 29 01 lds r18, 0x0129
+ 7962: 30 91 2a 01 lds r19, 0x012A
+ 7966: 82 17 cp r24, r18
+ 7968: 93 07 cpc r25, r19
+ 796a: 50 f4 brcc .+20 ; 0x7980 <updateLed+0x3a>
+ 796c: 20 91 22 01 lds r18, 0x0122
+ 7970: 30 91 23 01 lds r19, 0x0123
+ 7974: 2f 5f subi r18, 0xFF ; 255
+ 7976: 3f 4f sbci r19, 0xFF ; 255
+ 7978: 30 93 23 01 sts 0x0123, r19
+ 797c: 20 93 22 01 sts 0x0122, r18
+ lastTimer1 = nextTimer1;
+ 7980: 90 93 2a 01 sts 0x012A, r25
+ 7984: 80 93 29 01 sts 0x0129, r24
+ 7988: 08 95 ret
+
+0000798a <resetTick>:
+}
+
+void resetTick(void)
+{
+ tick = 0;
+ 798a: 10 92 23 01 sts 0x0123, r1
+ 798e: 10 92 22 01 sts 0x0122, r1
+ 7992: 08 95 ret
+
+00007994 <timedOut>:
+}
+
+uint8_t timedOut(void)
+{
+ // Never timeout if there is no code in Flash
+ if(pgm_read_word(0x0000) == 0xFFFF) return(0);
+ 7994: e0 e0 ldi r30, 0x00 ; 0
+ 7996: f0 e0 ldi r31, 0x00 ; 0
+ 7998: 85 91 lpm r24, Z+
+ 799a: 94 91 lpm r25, Z
+ 799c: 01 96 adiw r24, 0x01 ; 1
+ 799e: 41 f0 breq .+16 ; 0x79b0 <timedOut+0x1c>
+ if(tick > TIMEOUT) return(1);
+ 79a0: 81 e0 ldi r24, 0x01 ; 1
+ 79a2: 20 91 22 01 lds r18, 0x0122
+ 79a6: 30 91 23 01 lds r19, 0x0123
+ 79aa: 24 30 cpi r18, 0x04 ; 4
+ 79ac: 31 05 cpc r19, r1
+ 79ae: 08 f4 brcc .+2 ; 0x79b2 <timedOut+0x1e>
+}
+
+uint8_t timedOut(void)
+{
+ // Never timeout if there is no code in Flash
+ if(pgm_read_word(0x0000) == 0xFFFF) return(0);
+ 79b0: 80 e0 ldi r24, 0x00 ; 0
+ if(tick > TIMEOUT) return(1);
+ return(0);
+}
+ 79b2: 08 95 ret
+
+000079b4 <memcpy_P>:
+ 79b4: fb 01 movw r30, r22
+ 79b6: dc 01 movw r26, r24
+ 79b8: 02 c0 rjmp .+4 ; 0x79be <memcpy_P+0xa>
+ 79ba: 05 90 lpm r0, Z+
+ 79bc: 0d 92 st X+, r0
+ 79be: 41 50 subi r20, 0x01 ; 1
+ 79c0: 50 40 sbci r21, 0x00 ; 0
+ 79c2: d8 f7 brcc .-10 ; 0x79ba <memcpy_P+0x6>
+ 79c4: 08 95 ret
+
+000079c6 <__eerd_byte_m328p>:
+ 79c6: f9 99 sbic 0x1f, 1 ; 31
+ 79c8: fe cf rjmp .-4 ; 0x79c6 <__eerd_byte_m328p>
+ 79ca: 92 bd out 0x22, r25 ; 34
+ 79cc: 81 bd out 0x21, r24 ; 33
+ 79ce: f8 9a sbi 0x1f, 0 ; 31
+ 79d0: 99 27 eor r25, r25
+ 79d2: 80 b5 in r24, 0x20 ; 32
+ 79d4: 08 95 ret
+
+000079d6 <__eewr_byte_m328p>:
+ 79d6: 26 2f mov r18, r22
+
+000079d8 <__eewr_r18_m328p>:
+ 79d8: f9 99 sbic 0x1f, 1 ; 31
+ 79da: fe cf rjmp .-4 ; 0x79d8 <__eewr_r18_m328p>
+ 79dc: 1f ba out 0x1f, r1 ; 31
+ 79de: 92 bd out 0x22, r25 ; 34
+ 79e0: 81 bd out 0x21, r24 ; 33
+ 79e2: 20 bd out 0x20, r18 ; 32
+ 79e4: 0f b6 in r0, 0x3f ; 63
+ 79e6: f8 94 cli
+ 79e8: fa 9a sbi 0x1f, 2 ; 31
+ 79ea: f9 9a sbi 0x1f, 1 ; 31
+ 79ec: 0f be out 0x3f, r0 ; 63
+ 79ee: 01 96 adiw r24, 0x01 ; 1
+ 79f0: 08 95 ret
+
+000079f2 <_exit>:
+ 79f2: f8 94 cli
+
+000079f4 <__stop_program>:
+ 79f4: ff cf rjmp .-2 ; 0x79f4 <__stop_program>
View
164 hardware/ariadne/bootloaders/ariadne/ariadne_atmega328_ethernet.hex
@@ -0,0 +1,164 @@
+:1070000050C00000BEC00000BCC00000BAC00000FC
+:10701000B8C00000B6C00000B4C00000B2C000009C
+:10702000B0C00000AEC00000ACC00000AAC00000AC
+:10703000A8C00000A6C00000A4C00000A2C00000BC </