/
register_info.rs
67 lines (63 loc) · 2.37 KB
/
register_info.rs
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use gdbstub::target;
use gdbstub::target::ext::register_info::Register;
use crate::gdb::Emu;
// This implementation is for illustrative purposes only. If the .xml target description is used, the qRegisterInfo Packet is not necessary. (Note: This is an LLDB specific packet)
// We have r0-pc from 0-16 but cpsr is at offset 25*4 in the 'g'/'G' packet, so we add 8 padding
// registers here. Please see gdbstub/examples/armv4t/gdb/target_description_xml_override.rs for
// more info.
const MAX_REG_NUM: u8 = 17 + 8;
const SP: u8 = 13;
const PC: u8 = 15;
const CPSR: u8 = 25;
const REG_NAMES: &[&str] = &[
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "sp", "lr",
"pc", "padding", "padding", "padding", "padding", "padding", "padding", "padding", "padding",
"padding", "cpsr",
];
impl target::ext::register_info::RegisterInfo for Emu {
fn get_register_info(&mut self, reg_id: u8) -> Result<Option<Register>, Self::Error> {
match reg_id {
0..=MAX_REG_NUM => {
let name = REG_NAMES[reg_id as usize];
let encoding = if reg_id < 16 || reg_id == CPSR {
"uint"
} else {
"vector"
};
let format = if reg_id < 16 || reg_id == CPSR {
"hex"
} else {
"vector-uint8"
};
let set = if reg_id < 16 || reg_id == CPSR {
"General Purpose Registers"
} else {
"Floating Point Registers"
};
let generic = if reg_id == SP {
Some("sp")
} else if reg_id == PC {
Some("pc")
} else {
None
};
Ok(Some(Register {
name,
alt_name: name,
bitsize: 32,
offset: (reg_id as u16) * 4,
encoding,
format,
set,
gcc: None,
dwarf: Some(reg_id as u16),
generic,
container_regs: None,
invalidate_regs: None,
}))
}
// Will end the 'qRegisterInfo' query
_ => Ok(None),
}
}
}