/
ipu_device.c
3766 lines (3417 loc) · 100 KB
/
ipu_device.c
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/*
* Copyright 2005-2015 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright 2019-2021 NXP
*/
/*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/*!
* @file ipu_device.c
*
* @brief This file contains the IPUv3 driver device interface and fops functions.
*
* @ingroup IPU
*/
#include <linux/clk.h>
#include <linux/cpumask.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/ipu-v3.h>
#include <linux/kernel.h>
#include <linux/kthread.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/poll.h>
#include <linux/sched.h>
#include <uapi/linux/sched/types.h>
#include <linux/sched/types.h>
#include <linux/sched/rt.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/time.h>
#include <linux/types.h>
#include <linux/vmalloc.h>
#include <linux/wait.h>
#include <asm/cacheflush.h>
#include <asm/outercache.h>
#include "ipu_param_mem.h"
#include "ipu_regs.h"
#include "vdoa.h"
#define CHECK_RETCODE(cont, str, err, label, ret) \
do { \
if (cont) { \
dev_err(t->dev, "ERR:[0x%p]-no:0x%x "#str" ret:%d," \
"line:%d\n", t, t->task_no, ret, __LINE__);\
if (ret != -EACCES) { \
t->state = err; \
goto label; \
} \
} \
} while (0)
#define CHECK_RETCODE_CONT(cont, str, err, ret) \
do { \
if (cont) { \
dev_err(t->dev, "ERR:[0x%p]-no:0x%x"#str" ret:%d," \
"line:%d\n", t, t->task_no, ret, __LINE__);\
if (ret != -EACCES) { \
if (t->state == STATE_OK) \
t->state = err; \
} \
} \
} while (0)
#undef DBG_IPU_PERF
#ifdef DBG_IPU_PERF
#define CHECK_PERF(ts) \
do { \
getnstimeofday(ts); \
} while (0)
#define DECLARE_PERF_VAR \
struct timespec64 ts_queue; \
struct timespec64 ts_dotask; \
struct timespec64 ts_waitirq; \
struct timespec64 ts_sche; \
struct timespec64 ts_rel; \
struct timespec64 ts_frame
#define PRINT_TASK_STATISTICS \
do { \
ts_queue = timespec_sub(tsk->ts_dotask, tsk->ts_queue); \
ts_dotask = timespec_sub(tsk->ts_waitirq, tsk->ts_dotask); \
ts_waitirq = timespec_sub(tsk->ts_inirq, tsk->ts_waitirq); \
ts_sche = timespec_sub(tsk->ts_wakeup, tsk->ts_inirq); \
ts_rel = timespec_sub(tsk->ts_rel, tsk->ts_wakeup); \
ts_frame = timespec_sub(tsk->ts_rel, tsk->ts_queue); \
dev_dbg(tsk->dev, "[0x%p] no-0x%x, ts_q:%ldus, ts_do:%ldus," \
"ts_waitirq:%ldus,ts_sche:%ldus, ts_rel:%ldus," \
"ts_frame: %ldus\n", tsk, tsk->task_no, \
ts_queue.tv_nsec / NSEC_PER_USEC + ts_queue.tv_sec * USEC_PER_SEC,\
ts_dotask.tv_nsec / NSEC_PER_USEC + ts_dotask.tv_sec * USEC_PER_SEC,\
ts_waitirq.tv_nsec / NSEC_PER_USEC + ts_waitirq.tv_sec * USEC_PER_SEC,\
ts_sche.tv_nsec / NSEC_PER_USEC + ts_sche.tv_sec * USEC_PER_SEC,\
ts_rel.tv_nsec / NSEC_PER_USEC + ts_rel.tv_sec * USEC_PER_SEC,\
ts_frame.tv_nsec / NSEC_PER_USEC + ts_frame.tv_sec * USEC_PER_SEC); \
if ((ts_frame.tv_nsec/NSEC_PER_USEC + ts_frame.tv_sec*USEC_PER_SEC) > \
80000) \
dev_dbg(tsk->dev, "ts_frame larger than 80ms [0x%p] no-0x%x.\n"\
, tsk, tsk->task_no); \
} while (0)
#else
#define CHECK_PERF(ts)
#define DECLARE_PERF_VAR
#define PRINT_TASK_STATISTICS
#endif
#define IPU_PP_CH_VF (IPU_TASK_ID_VF - 1)
#define IPU_PP_CH_PP (IPU_TASK_ID_PP - 1)
#define MAX_PP_CH (IPU_TASK_ID_MAX - 1)
#define VDOA_DEF_TIMEOUT_MS (HZ/2)
/* Strucutures and variables for exporting MXC IPU as device*/
typedef enum {
STATE_OK = 0,
STATE_QUEUE,
STATE_IN_PROGRESS,
STATE_ERR,
STATE_TIMEOUT,
STATE_RES_TIMEOUT,
STATE_NO_IPU,
STATE_NO_IRQ,
STATE_IPU_BUSY,
STATE_IRQ_FAIL,
STATE_IRQ_TIMEOUT,
STATE_ENABLE_CHAN_FAIL,
STATE_DISABLE_CHAN_FAIL,
STATE_SEL_BUF_FAIL,
STATE_INIT_CHAN_FAIL,
STATE_LINK_CHAN_FAIL,
STATE_UNLINK_CHAN_FAIL,
STATE_INIT_CHAN_BUF_FAIL,
STATE_INIT_CHAN_BAND_FAIL,
STATE_SYS_NO_MEM,
STATE_VDOA_IRQ_TIMEOUT,
STATE_VDOA_IRQ_FAIL,
STATE_VDOA_TASK_FAIL,
} ipu_state_t;
enum {
INPUT_CHAN_VDI_P = 1,
INPUT_CHAN,
INPUT_CHAN_VDI_N,
};
struct ipu_state_msg {
int state;
char *msg;
} state_msg[] = {
{STATE_OK, "ok"},
{STATE_QUEUE, "split queue"},
{STATE_IN_PROGRESS, "split in progress"},
{STATE_ERR, "error"},
{STATE_TIMEOUT, "split task timeout"},
{STATE_RES_TIMEOUT, "wait resource timeout"},
{STATE_NO_IPU, "no ipu found"},
{STATE_NO_IRQ, "no irq found for task"},
{STATE_IPU_BUSY, "ipu busy"},
{STATE_IRQ_FAIL, "request irq failed"},
{STATE_IRQ_TIMEOUT, "wait for irq timeout"},
{STATE_ENABLE_CHAN_FAIL, "ipu enable channel fail"},
{STATE_DISABLE_CHAN_FAIL, "ipu disable channel fail"},
{STATE_SEL_BUF_FAIL, "ipu select buf fail"},
{STATE_INIT_CHAN_FAIL, "ipu init channel fail"},
{STATE_LINK_CHAN_FAIL, "ipu link channel fail"},
{STATE_UNLINK_CHAN_FAIL, "ipu unlink channel fail"},
{STATE_INIT_CHAN_BUF_FAIL, "ipu init channel buffer fail"},
{STATE_INIT_CHAN_BAND_FAIL, "ipu init channel band mode fail"},
{STATE_SYS_NO_MEM, "sys no mem: -ENOMEM"},
{STATE_VDOA_IRQ_TIMEOUT, "wait for vdoa irq timeout"},
{STATE_VDOA_IRQ_FAIL, "vdoa irq fail"},
{STATE_VDOA_TASK_FAIL, "vdoa task fail"},
};
struct stripe_setting {
u32 iw;
u32 ih;
u32 ow;
u32 oh;
u32 outh_resize_ratio;
u32 outv_resize_ratio;
u32 i_left_pos;
u32 i_right_pos;
u32 i_top_pos;
u32 i_bottom_pos;
u32 o_left_pos;
u32 o_right_pos;
u32 o_top_pos;
u32 o_bottom_pos;
u32 rl_split_line;
u32 ud_split_line;
};
struct task_set {
#define NULL_MODE 0x0
#define IC_MODE 0x1
#define ROT_MODE 0x2
#define VDI_MODE 0x4
#define IPU_PREPROCESS_MODE_MASK (IC_MODE | ROT_MODE | VDI_MODE)
/* VDOA_MODE means this task use vdoa, and VDOA has two modes:
* BAND MODE and non-BAND MODE. Non-band mode will do transfer data
* to memory. BAND mode needs hareware sync with IPU, it is used default
* if connected to VDIC.
*/
#define VDOA_MODE 0x8
#define VDOA_BAND_MODE 0x10
u8 mode;
#define IC_VF 0x1
#define IC_PP 0x2
#define ROT_VF 0x4
#define ROT_PP 0x8
#define VDI_VF 0x10
#define VDOA_ONLY 0x20
u8 task;
#define NO_SPLIT 0x0
#define RL_SPLIT 0x1
#define UD_SPLIT 0x2
#define LEFT_STRIPE 0x1
#define RIGHT_STRIPE 0x2
#define UP_STRIPE 0x4
#define DOWN_STRIPE 0x8
#define SPLIT_MASK 0xF
u8 split_mode;
u8 band_lines;
ipu_channel_t ic_chan;
ipu_channel_t rot_chan;
ipu_channel_t vdi_ic_p_chan;
ipu_channel_t vdi_ic_n_chan;
u32 i_off;
u32 i_uoff;
u32 i_voff;
u32 istride;
u32 ov_off;
u32 ov_uoff;
u32 ov_voff;
u32 ovstride;
u32 ov_alpha_off;
u32 ov_alpha_stride;
u32 o_off;
u32 o_uoff;
u32 o_voff;
u32 ostride;
u32 r_fmt;
u32 r_width;
u32 r_height;
u32 r_stride;
dma_addr_t r_paddr;
struct stripe_setting sp_setting;
};
struct ipu_split_task {
struct ipu_task task;
struct ipu_task_entry *parent_task;
struct ipu_task_entry *child_task;
u32 task_no;
};
struct ipu_task_entry {
struct ipu_input input;
struct ipu_output output;
bool overlay_en;
struct ipu_overlay overlay;
#define DEF_TIMEOUT_MS 1000
#define DEF_DELAY_MS 20
int timeout;
int irq;
u8 task_id;
u8 ipu_id;
u8 task_in_list;
u8 split_done;
struct mutex split_lock;
struct mutex vdic_lock;
wait_queue_head_t split_waitq;
struct list_head node;
struct list_head split_list;
struct ipu_soc *ipu;
struct device *dev;
struct task_set set;
wait_queue_head_t task_waitq;
struct completion irq_comp;
struct kref refcount;
ipu_state_t state;
u32 task_no;
atomic_t done;
atomic_t res_free;
atomic_t res_get;
struct ipu_task_entry *parent;
char *vditmpbuf[2];
u32 old_save_lines;
u32 old_size;
bool buf1filled;
bool buf0filled;
vdoa_handle_t vdoa_handle;
struct vdoa_output_mem {
void *vaddr;
dma_addr_t paddr;
int size;
} vdoa_dma;
#ifdef DBG_IPU_PERF
struct timespec64 ts_queue;
struct timespec64 ts_dotask;
struct timespec64 ts_waitirq;
struct timespec64 ts_inirq;
struct timespec64 ts_wakeup;
struct timespec64 ts_rel;
#endif
};
struct ipu_channel_tabel {
struct mutex lock;
u8 used[MXC_IPU_MAX_NUM][MAX_PP_CH];
u8 vdoa_used;
};
struct ipu_thread_data {
struct ipu_soc *ipu;
u32 id;
u32 is_vdoa;
};
struct ipu_alloc_list {
struct list_head list;
dma_addr_t phy_addr;
void *cpu_addr;
u32 size;
void *file_index;
};
static LIST_HEAD(ipu_alloc_list);
static DEFINE_MUTEX(ipu_alloc_lock);
static struct ipu_channel_tabel ipu_ch_tbl;
static LIST_HEAD(ipu_task_list);
static DEFINE_SPINLOCK(ipu_task_list_lock);
static DECLARE_WAIT_QUEUE_HEAD(thread_waitq);
static DECLARE_WAIT_QUEUE_HEAD(res_waitq);
static atomic_t req_cnt;
static atomic_t file_index = ATOMIC_INIT(1);
static int major;
static int max_ipu_no;
static int thread_id;
static atomic_t frame_no;
static struct class *ipu_class;
static struct device *ipu_dev;
static int debug;
module_param(debug, int, 0600);
#ifdef DBG_IPU_PERF
static struct timespec64 ts_frame_max;
static u32 ts_frame_avg;
static atomic_t frame_cnt;
#endif
static bool deinterlace_3_field(struct ipu_task_entry *t)
{
return ((t->set.mode & VDI_MODE) &&
(t->input.deinterlace.motion != HIGH_MOTION));
}
static u32 tiled_filed_size(struct ipu_task_entry *t)
{
u32 field_size;
/* note: page_align is required by VPU hw ouput buffer */
field_size = TILED_NV12_FRAME_SIZE(t->input.width, t->input.height/2);
return field_size;
}
static bool only_ic(u8 mode)
{
mode = mode & IPU_PREPROCESS_MODE_MASK;
return ((mode == IC_MODE) || (mode == VDI_MODE));
}
static bool only_rot(u8 mode)
{
mode = mode & IPU_PREPROCESS_MODE_MASK;
return (mode == ROT_MODE);
}
static bool ic_and_rot(u8 mode)
{
mode = mode & IPU_PREPROCESS_MODE_MASK;
return ((mode == (IC_MODE | ROT_MODE)) ||
(mode == (VDI_MODE | ROT_MODE)));
}
static bool need_split(struct ipu_task_entry *t)
{
return ((t->set.split_mode != NO_SPLIT) || (t->task_no & SPLIT_MASK));
}
unsigned int fmt_to_bpp(unsigned int pixelformat)
{
u32 bpp;
switch (pixelformat) {
case IPU_PIX_FMT_RGB565:
/*interleaved 422*/
case IPU_PIX_FMT_YUYV:
case IPU_PIX_FMT_UYVY:
/*non-interleaved 422*/
case IPU_PIX_FMT_YUV422P:
case IPU_PIX_FMT_YVU422P:
bpp = 16;
break;
case IPU_PIX_FMT_BGR24:
case IPU_PIX_FMT_RGB24:
case IPU_PIX_FMT_YUV444:
case IPU_PIX_FMT_YUV444P:
bpp = 24;
break;
case IPU_PIX_FMT_BGR32:
case IPU_PIX_FMT_BGRA32:
case IPU_PIX_FMT_RGB32:
case IPU_PIX_FMT_RGBA32:
case IPU_PIX_FMT_ABGR32:
bpp = 32;
break;
/*non-interleaved 420*/
case IPU_PIX_FMT_YUV420P:
case IPU_PIX_FMT_YVU420P:
case IPU_PIX_FMT_YUV420P2:
case IPU_PIX_FMT_NV12:
bpp = 12;
break;
default:
bpp = 8;
break;
}
return bpp;
}
EXPORT_SYMBOL_GPL(fmt_to_bpp);
cs_t colorspaceofpixel(int fmt)
{
switch (fmt) {
case IPU_PIX_FMT_RGB565:
case IPU_PIX_FMT_RGB666:
case IPU_PIX_FMT_BGR24:
case IPU_PIX_FMT_RGB24:
case IPU_PIX_FMT_BGRA32:
case IPU_PIX_FMT_BGR32:
case IPU_PIX_FMT_RGBA32:
case IPU_PIX_FMT_RGB32:
case IPU_PIX_FMT_ABGR32:
return RGB_CS;
break;
case IPU_PIX_FMT_UYVY:
case IPU_PIX_FMT_YUYV:
case IPU_PIX_FMT_YUV420P2:
case IPU_PIX_FMT_YUV420P:
case IPU_PIX_FMT_YVU420P:
case IPU_PIX_FMT_YVU422P:
case IPU_PIX_FMT_YUV422P:
case IPU_PIX_FMT_YUV444:
case IPU_PIX_FMT_YUV444P:
case IPU_PIX_FMT_NV12:
case IPU_PIX_FMT_TILED_NV12:
case IPU_PIX_FMT_TILED_NV12F:
return YUV_CS;
break;
default:
return NULL_CS;
}
}
EXPORT_SYMBOL_GPL(colorspaceofpixel);
int need_csc(int ifmt, int ofmt)
{
cs_t ics, ocs;
ics = colorspaceofpixel(ifmt);
ocs = colorspaceofpixel(ofmt);
if ((ics == NULL_CS) || (ocs == NULL_CS))
return -1;
else if (ics != ocs)
return 1;
return 0;
}
EXPORT_SYMBOL_GPL(need_csc);
static int soc_max_in_width(u32 is_vdoa)
{
return is_vdoa ? 8192 : 4096;
}
static int soc_max_vdi_in_width(struct ipu_soc *ipu)
{
int i;
if (!ipu) {
for (i = 0; i < max_ipu_no; i++) {
ipu = ipu_get_soc(i);
if (!IS_ERR_OR_NULL(ipu))
break;
}
if (i == max_ipu_no)
return 720;
}
return IPU_MAX_VDI_IN_WIDTH(ipu->devtype);
}
static int soc_max_in_height(void)
{
return 4096;
}
static int soc_max_out_width(void)
{
/* mx51/mx53/mx6q is 1024*/
return 1024;
}
static int soc_max_out_height(void)
{
/* mx51/mx53/mx6q is 1024*/
return 1024;
}
static void dump_task_info(struct ipu_task_entry *t)
{
if (!debug)
return;
dev_dbg(t->dev, "[0x%p]input:\n", (void *)t);
dev_dbg(t->dev, "[0x%p]\tformat = 0x%x\n", (void *)t, t->input.format);
dev_dbg(t->dev, "[0x%p]\twidth = %d\n", (void *)t, t->input.width);
dev_dbg(t->dev, "[0x%p]\theight = %d\n", (void *)t, t->input.height);
dev_dbg(t->dev, "[0x%p]\tcrop.w = %d\n", (void *)t, t->input.crop.w);
dev_dbg(t->dev, "[0x%p]\tcrop.h = %d\n", (void *)t, t->input.crop.h);
dev_dbg(t->dev, "[0x%p]\tcrop.pos.x = %d\n",
(void *)t, t->input.crop.pos.x);
dev_dbg(t->dev, "[0x%p]\tcrop.pos.y = %d\n",
(void *)t, t->input.crop.pos.y);
dev_dbg(t->dev, "[0x%p]input buffer:\n", (void *)t);
dev_dbg(t->dev, "[0x%p]\tpaddr = 0x%x\n", (void *)t, t->input.paddr);
dev_dbg(t->dev, "[0x%p]\ti_off = 0x%x\n", (void *)t, t->set.i_off);
dev_dbg(t->dev, "[0x%p]\ti_uoff = 0x%x\n", (void *)t, t->set.i_uoff);
dev_dbg(t->dev, "[0x%p]\ti_voff = 0x%x\n", (void *)t, t->set.i_voff);
dev_dbg(t->dev, "[0x%p]\tistride = %d\n", (void *)t, t->set.istride);
if (t->input.deinterlace.enable) {
dev_dbg(t->dev, "[0x%p]deinterlace enabled with:\n", (void *)t);
if (t->input.deinterlace.motion != HIGH_MOTION) {
dev_dbg(t->dev, "[0x%p]\tlow/medium motion\n", (void *)t);
dev_dbg(t->dev, "[0x%p]\tpaddr_n = 0x%x\n",
(void *)t, t->input.paddr_n);
} else
dev_dbg(t->dev, "[0x%p]\thigh motion\n", (void *)t);
}
dev_dbg(t->dev, "[0x%p]output:\n", (void *)t);
dev_dbg(t->dev, "[0x%p]\tformat = 0x%x\n", (void *)t, t->output.format);
dev_dbg(t->dev, "[0x%p]\twidth = %d\n", (void *)t, t->output.width);
dev_dbg(t->dev, "[0x%p]\theight = %d\n", (void *)t, t->output.height);
dev_dbg(t->dev, "[0x%p]\tcrop.w = %d\n", (void *)t, t->output.crop.w);
dev_dbg(t->dev, "[0x%p]\tcrop.h = %d\n", (void *)t, t->output.crop.h);
dev_dbg(t->dev, "[0x%p]\tcrop.pos.x = %d\n",
(void *)t, t->output.crop.pos.x);
dev_dbg(t->dev, "[0x%p]\tcrop.pos.y = %d\n",
(void *)t, t->output.crop.pos.y);
dev_dbg(t->dev, "[0x%p]\trotate = %d\n", (void *)t, t->output.rotate);
dev_dbg(t->dev, "[0x%p]output buffer:\n", (void *)t);
dev_dbg(t->dev, "[0x%p]\tpaddr = 0x%x\n", (void *)t, t->output.paddr);
dev_dbg(t->dev, "[0x%p]\to_off = 0x%x\n", (void *)t, t->set.o_off);
dev_dbg(t->dev, "[0x%p]\to_uoff = 0x%x\n", (void *)t, t->set.o_uoff);
dev_dbg(t->dev, "[0x%p]\to_voff = 0x%x\n", (void *)t, t->set.o_voff);
dev_dbg(t->dev, "[0x%p]\tostride = %d\n", (void *)t, t->set.ostride);
if (t->overlay_en) {
dev_dbg(t->dev, "[0x%p]overlay:\n", (void *)t);
dev_dbg(t->dev, "[0x%p]\tformat = 0x%x\n",
(void *)t, t->overlay.format);
dev_dbg(t->dev, "[0x%p]\twidth = %d\n",
(void *)t, t->overlay.width);
dev_dbg(t->dev, "[0x%p]\theight = %d\n",
(void *)t, t->overlay.height);
dev_dbg(t->dev, "[0x%p]\tcrop.w = %d\n",
(void *)t, t->overlay.crop.w);
dev_dbg(t->dev, "[0x%p]\tcrop.h = %d\n",
(void *)t, t->overlay.crop.h);
dev_dbg(t->dev, "[0x%p]\tcrop.pos.x = %d\n",
(void *)t, t->overlay.crop.pos.x);
dev_dbg(t->dev, "[0x%p]\tcrop.pos.y = %d\n",
(void *)t, t->overlay.crop.pos.y);
dev_dbg(t->dev, "[0x%p]overlay buffer:\n", (void *)t);
dev_dbg(t->dev, "[0x%p]\tpaddr = 0x%x\n",
(void *)t, t->overlay.paddr);
dev_dbg(t->dev, "[0x%p]\tov_off = 0x%x\n",
(void *)t, t->set.ov_off);
dev_dbg(t->dev, "[0x%p]\tov_uoff = 0x%x\n",
(void *)t, t->set.ov_uoff);
dev_dbg(t->dev, "[0x%p]\tov_voff = 0x%x\n",
(void *)t, t->set.ov_voff);
dev_dbg(t->dev, "[0x%p]\tovstride = %d\n",
(void *)t, t->set.ovstride);
if (t->overlay.alpha.mode == IPU_ALPHA_MODE_LOCAL) {
dev_dbg(t->dev, "[0x%p]local alpha enabled with:\n",
(void *)t);
dev_dbg(t->dev, "[0x%p]\tpaddr = 0x%x\n",
(void *)t, t->overlay.alpha.loc_alp_paddr);
dev_dbg(t->dev, "[0x%p]\tov_alpha_off = 0x%x\n",
(void *)t, t->set.ov_alpha_off);
dev_dbg(t->dev, "[0x%p]\tov_alpha_stride = %d\n",
(void *)t, t->set.ov_alpha_stride);
} else
dev_dbg(t->dev, "[0x%p]globle alpha enabled with value 0x%x\n",
(void *)t, t->overlay.alpha.gvalue);
if (t->overlay.colorkey.enable)
dev_dbg(t->dev, "[0x%p]colorkey enabled with value 0x%x\n",
(void *)t, t->overlay.colorkey.value);
}
dev_dbg(t->dev, "[0x%p]want task_id = %d\n", (void *)t, t->task_id);
dev_dbg(t->dev, "[0x%p]want task mode is 0x%x\n",
(void *)t, t->set.mode);
dev_dbg(t->dev, "[0x%p]\tIC_MODE = 0x%x\n", (void *)t, IC_MODE);
dev_dbg(t->dev, "[0x%p]\tROT_MODE = 0x%x\n", (void *)t, ROT_MODE);
dev_dbg(t->dev, "[0x%p]\tVDI_MODE = 0x%x\n", (void *)t, VDI_MODE);
dev_dbg(t->dev, "[0x%p]\tTask_no = 0x%x\n\n\n", (void *)t, t->task_no);
}
static void dump_check_err(struct device *dev, int err)
{
switch (err) {
case IPU_CHECK_ERR_INPUT_CROP:
dev_err(dev, "input crop setting error\n");
break;
case IPU_CHECK_ERR_OUTPUT_CROP:
dev_err(dev, "output crop setting error\n");
break;
case IPU_CHECK_ERR_OVERLAY_CROP:
dev_err(dev, "overlay crop setting error\n");
break;
case IPU_CHECK_ERR_INPUT_OVER_LIMIT:
dev_err(dev, "input over limitation\n");
break;
case IPU_CHECK_ERR_OVERLAY_WITH_VDI:
dev_err(dev, "do not support overlay with deinterlace\n");
break;
case IPU_CHECK_ERR_OV_OUT_NO_FIT:
dev_err(dev,
"width/height of overlay and ic output should be same\n");
break;
case IPU_CHECK_ERR_PROC_NO_NEED:
dev_err(dev, "no ipu processing need\n");
break;
case IPU_CHECK_ERR_SPLIT_INPUTW_OVER:
dev_err(dev, "split mode input width overflow\n");
break;
case IPU_CHECK_ERR_SPLIT_INPUTH_OVER:
dev_err(dev, "split mode input height overflow\n");
break;
case IPU_CHECK_ERR_SPLIT_OUTPUTW_OVER:
dev_err(dev, "split mode output width overflow\n");
break;
case IPU_CHECK_ERR_SPLIT_OUTPUTH_OVER:
dev_err(dev, "split mode output height overflow\n");
break;
case IPU_CHECK_ERR_SPLIT_WITH_ROT:
dev_err(dev, "not support split mode with rotation\n");
break;
case IPU_CHECK_ERR_W_DOWNSIZE_OVER:
dev_err(dev, "horizontal downsizing ratio overflow\n");
break;
case IPU_CHECK_ERR_H_DOWNSIZE_OVER:
dev_err(dev, "vertical downsizing ratio overflow\n");
break;
default:
break;
}
}
static void dump_check_warn(struct device *dev, int warn)
{
if (warn & IPU_CHECK_WARN_INPUT_OFFS_NOT8ALIGN)
dev_warn(dev, "input u/v offset not 8 align\n");
if (warn & IPU_CHECK_WARN_OUTPUT_OFFS_NOT8ALIGN)
dev_warn(dev, "output u/v offset not 8 align\n");
if (warn & IPU_CHECK_WARN_OVERLAY_OFFS_NOT8ALIGN)
dev_warn(dev, "overlay u/v offset not 8 align\n");
}
static int set_crop(struct ipu_crop *crop, int width, int height, int fmt)
{
if ((width == 0) || (height == 0)) {
pr_err("Invalid param: width=%d, height=%d\n", width, height);
return -EINVAL;
}
if ((IPU_PIX_FMT_TILED_NV12 == fmt) ||
(IPU_PIX_FMT_TILED_NV12F == fmt)) {
if (crop->w || crop->h) {
if (((crop->w + crop->pos.x) > width)
|| ((crop->h + crop->pos.y) > height)
|| (0 != (crop->w % IPU_PIX_FMT_TILED_NV12_MBALIGN))
|| (0 != (crop->h % IPU_PIX_FMT_TILED_NV12_MBALIGN))
|| (0 != (crop->pos.x % IPU_PIX_FMT_TILED_NV12_MBALIGN))
|| (0 != (crop->pos.y % IPU_PIX_FMT_TILED_NV12_MBALIGN))
) {
pr_err("set_crop error MB align.\n");
return -EINVAL;
}
} else {
crop->pos.x = 0;
crop->pos.y = 0;
crop->w = width;
crop->h = height;
if ((0 != (crop->w % IPU_PIX_FMT_TILED_NV12_MBALIGN))
|| (0 != (crop->h % IPU_PIX_FMT_TILED_NV12_MBALIGN))) {
pr_err("set_crop error w/h MB align.\n");
return -EINVAL;
}
}
} else {
if (crop->w || crop->h) {
if (((crop->w + crop->pos.x) > (width + 16))
|| ((crop->h + crop->pos.y) > height + 16)) {
pr_err("set_crop error exceeds width/height.\n");
return -EINVAL;
}
} else {
crop->pos.x = 0;
crop->pos.y = 0;
crop->w = width;
crop->h = height;
}
crop->w -= crop->w%8;
crop->h -= crop->h%8;
}
if ((crop->w == 0) || (crop->h == 0)) {
pr_err("Invalid crop param: crop.w=%d, crop.h=%d\n",
crop->w, crop->h);
return -EINVAL;
}
return 0;
}
static void update_offset(unsigned int fmt,
unsigned int width, unsigned int height,
unsigned int pos_x, unsigned int pos_y,
int *off, int *uoff, int *voff, int *stride)
{
/* NOTE: u v offset should based on start point of off*/
switch (fmt) {
case IPU_PIX_FMT_YUV420P2:
case IPU_PIX_FMT_YUV420P:
*off = pos_y * width + pos_x;
*uoff = (width * (height - pos_y) - pos_x)
+ (width/2) * (pos_y/2) + pos_x/2;
/* In case height is odd, round up to even */
*voff = *uoff + (width/2) * ((height+1)/2);
break;
case IPU_PIX_FMT_YVU420P:
*off = pos_y * width + pos_x;
*voff = (width * (height - pos_y) - pos_x)
+ (width/2) * (pos_y/2) + pos_x/2;
/* In case height is odd, round up to even */
*uoff = *voff + (width/2) * ((height+1)/2);
break;
case IPU_PIX_FMT_YVU422P:
*off = pos_y * width + pos_x;
*voff = (width * (height - pos_y) - pos_x)
+ (width/2) * pos_y + pos_x/2;
*uoff = *voff + (width/2) * height;
break;
case IPU_PIX_FMT_YUV422P:
*off = pos_y * width + pos_x;
*uoff = (width * (height - pos_y) - pos_x)
+ (width/2) * pos_y + pos_x/2;
*voff = *uoff + (width/2) * height;
break;
case IPU_PIX_FMT_YUV444P:
*off = pos_y * width + pos_x;
*uoff = width * height;
*voff = width * height * 2;
break;
case IPU_PIX_FMT_NV12:
*off = pos_y * width + pos_x;
*uoff = (width * (height - pos_y) - pos_x)
+ width * (pos_y/2) + pos_x;
break;
case IPU_PIX_FMT_TILED_NV12:
/*
* tiled format, progressive:
* assuming that line is aligned with MB height (aligned to 16)
* offset = line * stride + (pixel / MB_width) * pixels_in_MB
* = line * stride + (pixel / 16) * 256
* = line * stride + pixel * 16
*/
*off = pos_y * width + (pos_x << 4);
*uoff = ALIGN(width * height, SZ_4K) + (*off >> 1) - *off;
break;
case IPU_PIX_FMT_TILED_NV12F:
/*
* tiled format, interlaced:
* same as above, only number of pixels in MB is 128,
* instead of 256
*/
*off = (pos_y >> 1) * width + (pos_x << 3);
*uoff = ALIGN(width * height/2, SZ_4K) + (*off >> 1) - *off;
break;
default:
*off = (pos_y * width + pos_x) * fmt_to_bpp(fmt)/8;
break;
}
*stride = width * bytes_per_pixel(fmt);
}
static int update_split_setting(struct ipu_task_entry *t, bool vdi_split)
{
struct stripe_param left_stripe;
struct stripe_param right_stripe;
struct stripe_param up_stripe;
struct stripe_param down_stripe;
u32 iw, ih, ow, oh;
u32 max_width;
int ret;
if (t->output.rotate >= IPU_ROTATE_90_RIGHT)
return IPU_CHECK_ERR_SPLIT_WITH_ROT;
iw = t->input.crop.w;
ih = t->input.crop.h;
ow = t->output.crop.w;
oh = t->output.crop.h;
memset(&left_stripe, 0, sizeof(left_stripe));
memset(&right_stripe, 0, sizeof(right_stripe));
memset(&up_stripe, 0, sizeof(up_stripe));
memset(&down_stripe, 0, sizeof(down_stripe));
if (t->set.split_mode & RL_SPLIT) {
/*
* We do want equal strips: initialize stripes in case
* calc_stripes returns before actually doing the calculation
*/
left_stripe.input_width = iw / 2;
left_stripe.output_width = ow / 2;
right_stripe.input_column = iw / 2;
right_stripe.output_column = ow / 2;
if (vdi_split)
max_width = soc_max_vdi_in_width(t->ipu);
else
max_width = soc_max_out_width();
ret = ipu_calc_stripes_sizes(iw,
ow,
max_width,
(((unsigned long long)1) << 32), /* 32bit for fractional*/
1, /* equal stripes */
t->input.format,
t->output.format,
&left_stripe,
&right_stripe);
if (ret < 0)
return IPU_CHECK_ERR_W_DOWNSIZE_OVER;
else if (ret)
dev_dbg(t->dev, "Warn: no:0x%x,calc_stripes ret:%d\n",
t->task_no, ret);
t->set.sp_setting.iw = left_stripe.input_width;
t->set.sp_setting.ow = left_stripe.output_width;
t->set.sp_setting.outh_resize_ratio = left_stripe.irr;
t->set.sp_setting.i_left_pos = left_stripe.input_column;
t->set.sp_setting.o_left_pos = left_stripe.output_column;
t->set.sp_setting.i_right_pos = right_stripe.input_column;
t->set.sp_setting.o_right_pos = right_stripe.output_column;
} else {
t->set.sp_setting.iw = iw;
t->set.sp_setting.ow = ow;
t->set.sp_setting.outh_resize_ratio = 0;
t->set.sp_setting.i_left_pos = 0;
t->set.sp_setting.o_left_pos = 0;
t->set.sp_setting.i_right_pos = 0;
t->set.sp_setting.o_right_pos = 0;
}
if ((t->set.sp_setting.iw + t->set.sp_setting.i_right_pos) > (iw+16))
return IPU_CHECK_ERR_SPLIT_INPUTW_OVER;
if (((t->set.sp_setting.ow + t->set.sp_setting.o_right_pos) > ow)
|| (t->set.sp_setting.ow > soc_max_out_width()))
return IPU_CHECK_ERR_SPLIT_OUTPUTW_OVER;
if (rounddown(t->set.sp_setting.ow, 8) * 8 <=
rounddown(t->set.sp_setting.iw, 8))
return IPU_CHECK_ERR_W_DOWNSIZE_OVER;
if (t->set.split_mode & UD_SPLIT) {
/*
* We do want equal strips: initialize stripes in case
* calc_stripes returns before actually doing the calculation
*/
up_stripe.input_width = ih / 2;
up_stripe.output_width = oh / 2;
down_stripe.input_column = ih / 2;
down_stripe.output_column = oh / 2;
ret = ipu_calc_stripes_sizes(ih,
oh,
soc_max_out_height(),
(((unsigned long long)1) << 32), /* 32bit for fractional*/
0x1 | 0x2, /* equal stripes and vertical */
t->input.format,
t->output.format,
&up_stripe,
&down_stripe);
if (ret < 0)
return IPU_CHECK_ERR_H_DOWNSIZE_OVER;
else if (ret)
dev_err(t->dev, "Warn: no:0x%x,calc_stripes ret:%d\n",
t->task_no, ret);
t->set.sp_setting.ih = up_stripe.input_width;
t->set.sp_setting.oh = up_stripe.output_width;
t->set.sp_setting.outv_resize_ratio = up_stripe.irr;
t->set.sp_setting.i_top_pos = up_stripe.input_column;
t->set.sp_setting.o_top_pos = up_stripe.output_column;
t->set.sp_setting.i_bottom_pos = down_stripe.input_column;
t->set.sp_setting.o_bottom_pos = down_stripe.output_column;
} else {
t->set.sp_setting.ih = ih;
t->set.sp_setting.oh = oh;
t->set.sp_setting.outv_resize_ratio = 0;
t->set.sp_setting.i_top_pos = 0;
t->set.sp_setting.o_top_pos = 0;
t->set.sp_setting.i_bottom_pos = 0;
t->set.sp_setting.o_bottom_pos = 0;
}
/* downscale case: enforce limits */
if (((t->set.sp_setting.ih + t->set.sp_setting.i_bottom_pos) > (ih))
&& (t->set.sp_setting.ih >= t->set.sp_setting.oh))
return IPU_CHECK_ERR_SPLIT_INPUTH_OVER;
/* upscale case: relax limits because ipu_calc_stripes_sizes() may
create input stripe that falls just outside of the input window */
else if ((t->set.sp_setting.ih + t->set.sp_setting.i_bottom_pos)
> (ih+16))
return IPU_CHECK_ERR_SPLIT_INPUTH_OVER;
if (((t->set.sp_setting.oh + t->set.sp_setting.o_bottom_pos) > oh)
|| (t->set.sp_setting.oh > soc_max_out_height()))
return IPU_CHECK_ERR_SPLIT_OUTPUTH_OVER;
if (rounddown(t->set.sp_setting.oh, 8) * 8 <=
rounddown(t->set.sp_setting.ih, 8))
return IPU_CHECK_ERR_H_DOWNSIZE_OVER;
return IPU_CHECK_OK;
}
static int check_task(struct ipu_task_entry *t)
{
int tmp;
int ret = IPU_CHECK_OK;
int timeout;
bool vdi_split = false;
int ocw, och;
if ((IPU_PIX_FMT_TILED_NV12 == t->overlay.format) ||
(IPU_PIX_FMT_TILED_NV12F == t->overlay.format) ||
(IPU_PIX_FMT_TILED_NV12 == t->output.format) ||
(IPU_PIX_FMT_TILED_NV12F == t->output.format) ||
((IPU_PIX_FMT_TILED_NV12F == t->input.format) &&
!t->input.deinterlace.enable)) {
ret = IPU_CHECK_ERR_NOT_SUPPORT;
goto done;
}
/* check input */
ret = set_crop(&t->input.crop, t->input.width, t->input.height,
t->input.format);
if (ret < 0) {
ret = IPU_CHECK_ERR_INPUT_CROP;
goto done;
} else
update_offset(t->input.format, t->input.width, t->input.height,
t->input.crop.pos.x, t->input.crop.pos.y,
&t->set.i_off, &t->set.i_uoff,
&t->set.i_voff, &t->set.istride);