ccmp157-dvk.dts

 /*
 * Copyright 2022, Digi International Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

/dts-v1/;

/* STM32MP157 CPU */
#include "stm32mp157.dtsi"
#include "stm32mp15xa.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"
/* Digi ConnectCore CCMP15 */
#include "ccmp15.dtsi"
#include <dt-bindings/pwm/pwm.h>

/ {
	model = "Digi International ConnectCore MP15 DVK.";
	compatible = "digi,ccmp15-dvk", "digi,ccmp15", "digi,ccmp1", "st,stm32mp157";
	digi,machine,name = "ccmp157-dvk";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	aliases {
		mmc1 = &sdmmc2; /* Micro SD */
		serial3 = &uart7;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_5v_board: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "5v_board";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpioc 10 GPIO_ACTIVE_HIGH>;
			enable-active-high;
			status = "okay";
		};
	};

	clocks {
		clk_ext_camera: clk-ext-camera {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <24000000>;
		};
	};

	display_bl: display-bl {
		compatible = "pwm-backlight";
		/* node TIM2_CH1 period (ns) */
		pwms = <&pwm2 0 500000 PWM_POLARITY_INVERTED>;
		brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
		default-brightness-level = <8>;
		power-supply = <&reg_5v_board>;
		status = "disabled";
	};

	usb_phy_tuning: usb-phy-tuning {
		st,hs-dc-level = <2>;
		st,fs-rftime-tuning;
		st,hs-rftime-reduction;
		st,hs-current-trim = <15>;
		st,hs-impedance-trim = <1>;
		st,squelch-level = <3>;
		st,hs-rx-offset = <2>;
		st,no-lsfs-sc;
	};

	sound_max98089: sound-max98089 {
		compatible = "simple-audio-card";
		simple-audio-card,name = "stm32max98088";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&cpu_dai>;
		simple-audio-card,frame-master = <&cpu_dai>;
		routing =
			"Headphone Jack", "HPL",
			"Headphone Jack", "HPR",
			"Ext Spk", "SPKL",
			"Ext Spk", "SPKR",
			"LineOut", "RECL",
			"LineOut", "RECR",
			"Mic1", "MIC1",
			"Mic2", "MIC2",
			"LineInA", "INA1",
			"LineInA", "INA2",
			"LineInB", "INB1",
			"LineInB", "INB2";

		cpu_dai: simple-audio-card,cpu {
			sound-dai = <&i2s2>;
			system-clock-direction-out;
			clocks = <&rcc SPI2_K>;
		};

		codec_dai: simple-audio-card,codec {
			sound-dai = <&max98089>;
		};
	};

	usb-b-connector {
		compatible = "gpio-usb-b-connector", "usb-b-connector";
		label = "micro-USB";
		type = "micro";
		id-gpios = <&gpioa 10 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* USB_OTG_ID */
		vbus-gpios = <&gpioc 8 GPIO_ACTIVE_HIGH>; /* VBUS_SENSE */
		vbus-supply = <&vbus_otg>;

		port {
			con_usbotg_hs_ep: endpoint {
				remote-endpoint = <&usbotg_hs_ep>;
			};
		};
	};
};

/*
 * Internal VREFBUF can be set to 2.5 V, 2.048 V, 1.8 V or 1.5 V which are output
 * at VREF+ pad.
 * If you plan to use an external voltage reference, disable vrefbuf and change
 * the ADC 'vref-supply' to the external regulator.
 */
&vrefbuf {
	regulator-min-microvolt = <2500000>;
	regulator-max-microvolt = <2500000>;
	status = "okay";
};

&adc {
	/* ANA0, ANA1 are dedicated pins and don't need pinctrl */
	vref-supply = <&vrefbuf>;
	status = "okay";

	adc1: adc@0 {
		st,adc-channels = <0 1>;
		/* 16.5 ck_cycles sampling time */
		st,min-sample-time-nsecs = <400>;
		status = "okay";
	};
};

/* Console */
&uart4 {
	pinctrl-names = "default", "sleep", "idle";
	pinctrl-0 = <&ccmp15_uart4_pins_a>;
	pinctrl-1 = <&uart4_sleep_pins_a>;
	pinctrl-2 = <&ccmp15_uart4_idle_pins_a>;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
};

&cpu1{
	cpu-supply = <&vddcore>;
};

&gpu {
	contiguous-area = <&gpu_reserved>;
};

/* Micro SD */
&sdmmc2 {
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc2_b4_pins_a>;
	pinctrl-1 = <&sdmmc2_b4_od_pins_a>;
	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
	broken-cd;
	disable-wp;
	st,neg-edge;
	bus-width = <4>;
	no-1-8-v;
	vmmc-supply = <&vdd>;
	status = "okay";
};

/* 10/100/1000 Ethernet */
&ethernet0 {
	status = "okay";
	pinctrl-0 = <&ccmp15_ethernet0_rgmii_pins>;
	pinctrl-1 = <&ccmp15_ethernet0_rgmii_sleep_pins>;
	pinctrl-names = "default", "sleep";
	phy-mode = "rgmii-id";
	max-speed = <1000>;
	phy-handle = <&phy0>;
	phy-supply = <&v3v3>;

	mdio0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";

		phy0: ethernet-phy@0 {
			reg = <0>;
			compatible = "ethernet-phy-id0141.0dd0"; /* PHY ID for Marvell 88E1512 */
			reset-gpios = <&gpiog 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
			reset-assert-us = <1000>;
			reset-deassert-us = <2000>;
		};
	};
};

&hash1 {
	status = "okay";
};

/* Connected to XBee some pins are shared with LTDC */
&usart3 {
	pinctrl-names = "default", "sleep", "idle";
	pinctrl-0 = <&ccmp15_usart3_pins>;
	pinctrl-1 = <&ccmp15_usart3_sleep_pins>;
	pinctrl-2 = <&ccmp15_usart3_idle_pins>;
	uart-has-rtscts;
	status = "okay";
};

&i2s2 {
	#clock-cells = <0>;
	#sound-dai-cells = <0>;
	clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
	clock-names = "pclk", "i2sclk", "x8k", "x11k";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&ccmp15_i2s2_pins_a>;
	pinctrl-1 = <&ccmp15_i2s2_sleep_pins_a>;
	digi,i2s-master;
	status = "okay";
};

/* Display Controller for MIPI-DSI to HDMI */
&ltdc {
	status = "okay";

	port {
		ltdc_ep0_out: endpoint {
			remote-endpoint = <&dsi_in>;
		};
	};
};

&dsi {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
			dsi_in: endpoint {
				remote-endpoint = <&ltdc_ep0_out>;
			};
		};

		port@1 {
			reg = <1>;
			dsi_out: endpoint {
				remote-endpoint = <&lt8912_1_in>;
			};
		};

	};

};

&spi4 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&spi4_pins_b>;
	pinctrl-1 = <&spi4_sleep_pins_b>;
	cs-gpios = <&gpioe 11 0>;
	status = "okay";

	spidev@0{
		/*
		 * spidev uses a compatible string 'rohm,fs2228fv' to have the
		 * driver create an spi device node. This is just an example,
		 * there is not a real device connected on the SPI bus.
		 */
		compatible = "rohm,dh2228fv";
		reg = <0>;
		spi-max-frequency = <4000000>;
	};
};

&timers2 {
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
	pwm2: pwm {
		pinctrl-0 = <&ccmp15_pwm2_pins>;
		pinctrl-1 = <&ccmp15_pwm2_sleep_pins>;
		pinctrl-names = "default", "sleep";
		status = "okay";
	};
	timer@1 {
		status = "okay";
	};
};

&timers4 {
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
	pwm4: pwm {
		pinctrl-0 = <&ccmp15_pwm4_pins>;
		pinctrl-1 = <&ccmp15_pwm4_sleep_pins>;
		pinctrl-names = "default", "sleep";
		status = "okay";
	};
	timer@3 {
		status = "okay";
	};
};

&i2c2 {
	clock-frequency = <400000>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c2_pins_a>;
	pinctrl-1 = <&i2c2_sleep_pins_a>;
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	status = "okay";
	/* spare dmas for other usage */
	/delete-property/dmas;
	/delete-property/dma-names;

	/* Touch */
	fusion_touch: fusion@14 {
		compatible = "touchrev,fusion-touch";
		reg = <0x14>;
		interrupt-parent = <&gpiog>;
		interrupts = <1 IRQ_TYPE_EDGE_RISING>;
		irq-gpios = <&gpiog 1 GPIO_ACTIVE_LOW>;
		status = "disabled";
	};

	goodix_touch: goodix_touch@14 {
		compatible = "goodix,gt9271";
		reg = <0x14>;
		interrupt-parent = <&gpiog>;
		interrupts = <1 IRQ_TYPE_EDGE_RISING>;
		irq-gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
		status = "disabled";
	};

	goodix_touch2: goodix_touch2@5d {
		compatible = "goodix,gt9271";
		reg = <0x5d>;
		interrupt-parent = <&gpiog>;
		interrupts = <1 IRQ_TYPE_EDGE_RISING>;
		irq-gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
		status = "disabled";
	};

	max98089: codec@10 {
		compatible = "maxim,max98089";
		reg = <0x10>;
		clocks = <&rcc SPI2_K>;
		clock-names = "mclk";
		#sound-dai-cells = <0>;
		#clock-cells = <0>;
	        status = "okay";
	};

	ov5640: camera@3c {
		compatible = "ovti,ov5640";
		reg = <0x3c>;
		clocks = <&clk_ext_camera>;
		clock-names = "xclk";
		DOVDD-supply = <&ldo2>;
		powerdown-gpios = <&gpiof 14 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>;
		reset-gpios = <&gpioe 0 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
		rotation = <180>;
		status = "okay";

		port {
			ov5640_0: endpoint {
				remote-endpoint = <&dcmi_0>;
				bus-width = <8>;
				data-shift = <0>;
				hsync-active = <0>;
				vsync-active = <0>;
				pclk-sample = <1>;
				pclk-max-frequency = <24000000>;
			};
		};
	};
};

&i2c6 {
	clock-frequency = <400000>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&ccmp15_i2c6_pins_a>;
	pinctrl-1 = <&ccmp15_i2c6_sleep_pins_a>;
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	status = "okay";
	/* spare dmas for other usage */
	/delete-property/dmas;
	/delete-property/dma-names;

	lt_bridge: lt8912@48 {
		compatible = "lontium,lt8912";
		reg = <0x48>;
		reset-gpios = <&gpioa 9 GPIO_ACTIVE_LOW>;
		hpd-gpios = <&gpiof 15 GPIO_ACTIVE_HIGH>;
		no-edid;
		digi,dsi-lanes = <2>;
		vdd1-supply = <&reg_5v_board>;
		status = "okay";

		port {
			lt8912_1_in: endpoint {
				/* add lanes */
				remote-endpoint = <&dsi_out>;
			};
		};

		display-timings {
			native-mode = <&timing0>;

			/* High Definition */
			timing0: timing0 {
				clock-frequency = <74250000>;
				hactive = <1280>;
				vactive = <720>;
				hfront-porch = <110>;
				hsync-len = <40>;
				hback-porch = <220>;
				vfront-porch = <5>;
				vsync-len = <5>;
				vback-porch = <20>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <0>;
				pixelclk-active = <0>;
			};

			/* Full HD */
			timing1: timing1 {
				clock-frequency = <148500000>;
				hactive = <1920>;
				vactive = <1080>;
				hfront-porch = <88>;
				hsync-len = <44>;
				hback-porch = <148>;
				vfront-porch = <36>;
				vsync-len = <5>;
				vback-porch = <4>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <0>;
				pixelclk-active = <0>;
			};
		};
	};

	ext_rtc: ext_rtc@52 {
		compatible = "microcrystal,rv3028";
		reg = <0x52>;
		interrupt-parent = <&gpioa>;
		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
		wakeup-source;
	};
};

&usbh_ehci {
	phys = <&usbphyc_port0>;
	phy-names = "usb";
	status = "okay";
};

&usbotg_hs {
	phys = <&usbphyc_port1 0>;
	phy-names = "usb2-phy";
	usb-role-switch;
	status = "okay";

	port {
		usbotg_hs_ep: endpoint {
			remote-endpoint = <&con_usbotg_hs_ep>;
		};
	};
};

&usbphyc {
	status = "okay";
};

&usbphyc_port0 {
	phy-supply = <&vdd_usb>;
	st,phy-tuning = <&usb_phy_tuning>;
};

&usbphyc_port1 {
	phy-supply = <&vdd_usb>;
	st,phy-tuning = <&usb_phy_tuning>;
};

&dcmi {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&ccmp15_dcmi_pins_a>;
	pinctrl-1 = <&ccmp15_dcmi_sleep_pins_a>;

	port {
		dcmi_0: endpoint {
			remote-endpoint = <&ov5640_0>;
			bus-type = <5>;
			bus-width = <8>;
			hsync-active = <0>;
			vsync-active = <0>;
			pclk-sample = <1>;
			pclk-max-frequency = <24000000>;
		};
	};
};

/* Pins shared with parallel on DVK (DCMI_D6, DCMI_D7) */
&m_can1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&ccmp15_can1_pins_a>;
	pinctrl-1 = <&ccmp15_can1_sleep_pins_a>;
	status = "disabled";
};

/* Pins shared with USART3 on DVK (USART3_CTS, USART3_RX) */
&m_can2 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&ccmp15_can2_pins_a>;
	pinctrl-1 = <&ccmp15_can2_sleep_pins_a>;
	status = "disabled";
};

/* PCIe connector uses USB */
&gpioc {
	pcie {
		gpio-hog;
		gpios = <11 0>;
		output-high;
		line-name = "PCIe-EN";
	};
};

/* RS485 */
&uart7 {
	linux,rs485-enabled-at-boot-time;
	pinctrl-names = "default";
	pinctrl-0 = <&ccmp15_uart7_pins_a &ccmp15_uart7_rtscts_pins_a>;
	pinctrl-1 = <&ccmp15_uart7_sleep_pins_a>;
	uart-has-rtscts;
	status = "okay";
};

&pinctrl {
	ccmp15_usart3_pins: usart3-1 {
		pins1 {
			pinmux = <STM32_PINMUX('D', 8, AF7)>, /* USART3_TX */
				 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
				 <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */
			bias-disable;
		};
	};

	ccmp15_usart3_idle_pins: usart3-idle-1 {
		pins1 {
			pinmux = <STM32_PINMUX('D', 8, ANALOG)>, /* USART3_TX */
				 <STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */
		};
		pins2 {
			pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins3 {
			pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
			bias-disable;
		};
	};

	ccmp15_usart3_sleep_pins: usart3-sleep-1 {
		pins {
			pinmux = <STM32_PINMUX('D', 8, ANALOG)>, /* USART3_TX */
				 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
				 <STM32_PINMUX('B', 13, ANALOG)>, /* USART3_CTS_NSS */
				 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
		};
	};

	ccmp15_ltdc_18_bits_pins: ltdc-18bits-0 {
		pins1 {
			pinmux = <STM32_PINMUX('G',  7, AF14)>, /* LCD_CLK */
				 <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
				 <STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
				 <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
				 <STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
				 <STM32_PINMUX('B',  0,  AF9)>, /* LCD_R3 */
				 <STM32_PINMUX('A',  5, AF14)>, /* LCD_R4 */
				 <STM32_PINMUX('C',  0, AF14)>, /* LCD_R5 */
				 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
				 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
				 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
				 <STM32_PINMUX('G', 10,  AF9)>, /* LCD_G3 */
				 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
				 <STM32_PINMUX('F', 11, AF14)>, /* LCD_G5 */
				 <STM32_PINMUX('I', 11,  AF9)>, /* LCD_G6 */
				 <STM32_PINMUX('B',  5, AF14)>, /* LCD_G7 */
				 <STM32_PINMUX('A',  3,  AF9)>, /* LCD_B2 */
				 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
				 <STM32_PINMUX('I',  4, AF14)>, /* LCD_B4 */
				 <STM32_PINMUX('I',  5, AF14)>, /* LCD_B5 */
				 <STM32_PINMUX('I',  6, AF14)>, /* LCD_B6 */
				 <STM32_PINMUX('I',  7, AF14)>; /* LCD_B7 */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('H',  2, GPIO)>, /* LCD_R0 */
				 <STM32_PINMUX('H',  3, GPIO)>, /* LCD_R1 */
				 <STM32_PINMUX('B',  1, GPIO)>, /* LCD_G0 */
				 <STM32_PINMUX('E',  6, GPIO)>, /* LCD_G1 */
				 <STM32_PINMUX('E',  4, GPIO)>, /* LCD_B0 */
				 <STM32_PINMUX('G', 12, GPIO)>; /* LCD_B1 */
			bias-pull-down;
			drive-push-pull;
			slew-rate = <0>;
		};
	};

	ccmp15_ltdc_24_bits_pins: ltdc-24bits-0 {
		pins {
			pinmux = <STM32_PINMUX('G',  7, AF14)>, /* LCD_CLK */
				 <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
				 <STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
				 <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
				 <STM32_PINMUX('H',  2, AF14)>, /* LCD_R0 */
				 <STM32_PINMUX('H',  3, AF14)>, /* LCD_R1 */
				 <STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
				 <STM32_PINMUX('B',  0,  AF9)>, /* LCD_R3 */
				 <STM32_PINMUX('A',  5, AF14)>, /* LCD_R4 */
				 <STM32_PINMUX('C',  0, AF14)>, /* LCD_R5 */
				 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
				 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
				 <STM32_PINMUX('B',  1, AF14)>, /* LCD_G0 */
				 <STM32_PINMUX('E',  6, AF14)>, /* LCD_G1 */
				 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
				 <STM32_PINMUX('G', 10,  AF9)>, /* LCD_G3 */
				 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
				 <STM32_PINMUX('F', 11, AF14)>, /* LCD_G5 */
				 <STM32_PINMUX('I', 11,  AF9)>, /* LCD_G6 */
				 <STM32_PINMUX('B',  5, AF14)>, /* LCD_G7 */
				 <STM32_PINMUX('E',  4, AF14)>, /* LCD_B0 */
				 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
				 <STM32_PINMUX('A',  3,  AF9)>, /* LCD_B2 */
				 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
				 <STM32_PINMUX('I',  4, AF14)>, /* LCD_B4 */
				 <STM32_PINMUX('I',  5, AF14)>, /* LCD_B5 */
				 <STM32_PINMUX('I',  6, AF14)>, /* LCD_B6 */
				 <STM32_PINMUX('I',  7, AF14)>; /* LCD_B7 */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
	};

	ccmp15_ltdc_sleep_pins: ltdc-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_CLK */
				 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
				 <STM32_PINMUX('I',  9, ANALOG)>, /* LCD_VSYNC */
				 <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
				 <STM32_PINMUX('H',  2, ANALOG)>, /* LCD_R0 */
				 <STM32_PINMUX('H',  3, ANALOG)>, /* LCD_R1 */
				 <STM32_PINMUX('H',  8, ANALOG)>, /* LCD_R2 */
				 <STM32_PINMUX('B',  0, ANALOG)>, /* LCD_R3 */
				 <STM32_PINMUX('A',  5, ANALOG)>, /* LCD_R4 */
				 <STM32_PINMUX('C',  0, ANALOG)>, /* LCD_R5 */
				 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
				 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
				 <STM32_PINMUX('B',  1, ANALOG)>, /* LCD_G0 */
				 <STM32_PINMUX('E',  6, ANALOG)>, /* LCD_G1 */
				 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
				 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_G3 */
				 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
				 <STM32_PINMUX('F', 11, ANALOG)>, /* LCD_G5 */
				 <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
				 <STM32_PINMUX('B',  5, ANALOG)>, /* LCD_G7 */
				 <STM32_PINMUX('E',  4, ANALOG)>, /* LCD_B0 */
				 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
				 <STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B2 */
				 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
				 <STM32_PINMUX('I',  4, ANALOG)>, /* LCD_B4 */
				 <STM32_PINMUX('I',  5, ANALOG)>, /* LCD_B5 */
				 <STM32_PINMUX('I',  6, ANALOG)>, /* LCD_B6 */
				 <STM32_PINMUX('I',  7, ANALOG)>; /* LCD_B7 */
		};
	};

	ccmp15_i2s2_pins_a: i2s2-0 {
		pins {
			pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
				 <STM32_PINMUX('I', 2, AF5)>, /* I2S2_SDI */
				 <STM32_PINMUX('I', 0, AF5)>, /* I2S2_WS */
				 <STM32_PINMUX('C', 6, AF5)>, /* I2S2_MCK */
				 <STM32_PINMUX('I', 1, AF5)>; /* I2S2_CK */
			slew-rate = <1>;
			drive-push-pull;
			bias-disable;
		};
	};

	ccmp15_i2s2_sleep_pins_a: i2s2-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
				 <STM32_PINMUX('I', 2, ANALOG)>, /* I2S2_SDI */
				 <STM32_PINMUX('I', 0, ANALOG)>, /* I2S2_WS */
				 <STM32_PINMUX('C', 6, ANALOG)>, /* I2S2_MCK */
				 <STM32_PINMUX('I', 1, ANALOG)>; /* I2S2_CK */
		};
	};

	ccmp15_dcmi_pins_a: dcmi-0 {
		pins {
			pinmux = <STM32_PINMUX('D', 9,  AF13)>,/* DCMI_HSYNC */
				 <STM32_PINMUX('B', 7,  AF13)>,/* DCMI_VSYNC */
				 <STM32_PINMUX('A', 6,  AF13)>,/* DCMI_PIXCLK */
				 <STM32_PINMUX('H', 9,  AF13)>,/* DCMI_D0 */
				 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
				 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
				 <STM32_PINMUX('E',  1, AF13)>,/* DCMI_D3 */
				 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
				 <STM32_PINMUX('D', 3,  AF13)>,/* DCMI_D5 */
				 <STM32_PINMUX('B', 8,  AF13)>,/* DCMI_D6 */
				 <STM32_PINMUX('B', 9,  AF13)>;/* DCMI_D7 */
			bias-disable;
		};
	};

	ccmp15_dcmi_sleep_pins_a: dcmi-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('D', 9,  ANALOG)>,/* DCMI_HSYNC */
				 <STM32_PINMUX('B', 7,  ANALOG)>,/* DCMI_VSYNC */
				 <STM32_PINMUX('A', 6,  ANALOG)>,/* DCMI_PIXCLK */
				 <STM32_PINMUX('H', 9,  ANALOG)>,/* DCMI_D0 */
				 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
				 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
				 <STM32_PINMUX('E',  1, ANALOG)>,/* DCMI_D3 */
				 <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
				 <STM32_PINMUX('D', 3,  ANALOG)>,/* DCMI_D5 */
				 <STM32_PINMUX('B', 8,  ANALOG)>,/* DCMI_D6 */
				 <STM32_PINMUX('B', 9,  ANALOG)>;/* DCMI_D7 */
		};
	};

	ccmp15_ethernet0_rgmii_pins: rgmii-1 {
		pins1 {
			pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
				 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
				 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
				 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
				 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
				 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
				 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
				 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins3 {
			pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
				 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
				 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
				 <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
				 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
				 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
			bias-disable;
		};
	};

	ccmp15_ethernet0_rgmii_sleep_pins: rgmii-sleep-1 {
		pins1 {
			pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
				 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
				 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
				 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
				 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
				 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
				 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
				 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
				 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
				 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
				 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
				 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
				 <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
				 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
				 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
		 };
	};

	ccmp15_pwm2_pins: pwm2-0 {
		pins {
			pinmux = <STM32_PINMUX('A', 15, AF1)>; /* TIM2_CH1 */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
	};

	ccmp15_pwm2_sleep_pins: pwm2-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('A', 15, ANALOG)>;
		};
	};

	ccmp15_pwm4_pins: ccmp15-pwm4-0 {
		pins {
			pinmux = <STM32_PINMUX('B', 6, AF2)>; /* TIM4_CH1 */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
	};

	ccmp15_pwm4_sleep_pins: ccmp15-pwm4-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('B', 6, ANALOG)>;
		};
	};

	ccmp15_can1_pins_a: ccmp15-can1-0 {
		pins1 {
			pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */
			slew-rate = <1>;
			drive-push-pull;
			bias-disable;
		};
		pins2 {
			pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */
			bias-disable;
		};
		pins3 {
			pinmux = <STM32_PINMUX('C', 7, GPIO)>; /* FDCAN1_STB */
			bias-pull-down;
			drive-push-pull;
			slew-rate = <0>;
		};
	};

	ccmp15_can1_sleep_pins_a: ccmp15-can1-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('B', 9, ANALOG)>, /* CAN1_TX */
				 <STM32_PINMUX('B', 8, ANALOG)>, /* CAN1_RX */
				 <STM32_PINMUX('C', 7, ANALOG)>; /* FDCAN1_STB */
		};
	};

	ccmp15_can2_pins_a: ccmp15-can2-0 {
		pins1 {
			pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
			slew-rate = <1>;
			drive-push-pull;
			bias-disable;
		};
		pins2 {
			pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */
			bias-disable;
		};
		pins3 {
			pinmux = <STM32_PINMUX('E', 5, GPIO)>; /* FDCAN2_STB */
			bias-pull-down;
			drive-push-pull;
			slew-rate = <0>;
		};
	};

	ccmp15_can2_sleep_pins_a: ccmp15-can2-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */
				 <STM32_PINMUX('B', 12, ANALOG)>, /* CAN2_RX */
				 <STM32_PINMUX('E', 5, ANALOG)>; /* FDCAN2_STB */
		};
	};

	ccmp15_uart4_pins_a: ccmp15_uart4-0 {
		pins1 {
			pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
			bias-pull-up;
		};
	};

	ccmp15_uart4_idle_pins_a: ccmp15_uart4-idle-0 {
		pins1 {
			pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
		};
		pins2 {
			pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
			bias-pull-up;
		};
	};

	ccmp15_uart7_pins_a: ccmp15-uart7-0 {
		pins1 {
			pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
			bias-disable;
		};
	};

	ccmp15_uart7_rtscts_pins_a: ccmp15-uart7rtscts-0 {
		pins1 {
			pinmux = <STM32_PINMUX('F', 8, AF7)>; /* UART7_RTS */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('F', 9, AF7)>; /* UART7_CTS */
			bias-disable;
		};
	};

	ccmp15_uart7_sleep_pins_a: ccmp15-uart7-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('F', 6, ANALOG)>, /* UART7_RX */
				 <STM32_PINMUX('F', 7, ANALOG)>, /* UART7_TX */
				 <STM32_PINMUX('F', 8, ANALOG)>, /* UART7_RTS */
				 <STM32_PINMUX('F', 9, ANALOG)>; /* UART7_CTS */
		};
	};
};

&pinctrl_z {
	ccmp15_i2c6_pins_a: ccmp15_i2c6-0 {
		pins {
			pinmux = <STM32_PINMUX('Z', 0, AF2)>, /* I2C6_SCL */
				 <STM32_PINMUX('Z', 3, AF2)>; /* I2C6_SDA */
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	ccmp15_i2c6_sleep_pins_a: ccmp15_i2c6-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('Z', 0, ANALOG)>, /* I2C6_SCL */
				 <STM32_PINMUX('Z', 3, ANALOG)>; /* I2C6_SDA */
		};
	};
};