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JitArm64_Integer.cpp
2117 lines (1856 loc) · 45.8 KB
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JitArm64_Integer.cpp
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// Copyright 2014 Dolphin Emulator Project
// SPDX-License-Identifier: GPL-2.0-or-later
#include "Core/PowerPC/JitArm64/Jit.h"
#include <bit>
#include "Common/Arm64Emitter.h"
#include "Common/Assert.h"
#include "Common/BitUtils.h"
#include "Common/CommonTypes.h"
#include "Common/MathUtil.h"
#include "Core/Core.h"
#include "Core/CoreTiming.h"
#include "Core/PowerPC/Interpreter/Interpreter.h"
#include "Core/PowerPC/JitArm64/JitArm64_RegCache.h"
#include "Core/PowerPC/JitCommon/DivUtils.h"
#include "Core/PowerPC/PPCTables.h"
#include "Core/PowerPC/PowerPC.h"
using namespace Arm64Gen;
using namespace JitCommon;
#define CARRY_IF_NEEDED(inst_without_carry, inst_with_carry, ...) \
do \
{ \
if (js.op->wantsCA) \
inst_with_carry(__VA_ARGS__); \
else \
inst_without_carry(__VA_ARGS__); \
} while (0)
void JitArm64::ComputeRC0(ARM64Reg reg)
{
gpr.BindCRToRegister(0, false);
SXTW(gpr.CR(0), reg);
}
void JitArm64::ComputeRC0(u64 imm)
{
gpr.BindCRToRegister(0, false);
MOVI2R(gpr.CR(0), imm);
if (imm & 0x80000000)
SXTW(gpr.CR(0), EncodeRegTo32(gpr.CR(0)));
}
void JitArm64::ComputeCarry(ARM64Reg reg)
{
js.carryFlag = CarryFlag::InPPCState;
if (!js.op->wantsCA)
return;
if (CanMergeNextInstructions(1) && js.op[1].wantsCAInFlags)
{
CMP(reg, 1);
js.carryFlag = CarryFlag::InHostCarry;
}
else
{
STRB(IndexType::Unsigned, reg, PPC_REG, PPCSTATE_OFF(xer_ca));
}
}
void JitArm64::ComputeCarry(bool carry)
{
js.carryFlag = carry ? CarryFlag::ConstantTrue : CarryFlag::ConstantFalse;
}
void JitArm64::ComputeCarry()
{
js.carryFlag = CarryFlag::InPPCState;
if (!js.op->wantsCA)
return;
js.carryFlag = CarryFlag::InHostCarry;
if (CanMergeNextInstructions(1) && js.op[1].opinfo->type == ::OpType::Integer)
return;
FlushCarry();
}
void JitArm64::LoadCarry()
{
switch (js.carryFlag)
{
case CarryFlag::InPPCState:
{
ARM64Reg WA = gpr.GetReg();
LDRB(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(xer_ca));
CMP(WA, 1);
gpr.Unlock(WA);
break;
}
case CarryFlag::InHostCarry:
{
break;
}
case CarryFlag::ConstantTrue:
{
CMP(ARM64Reg::WZR, ARM64Reg::WZR);
break;
}
case CarryFlag::ConstantFalse:
{
CMN(ARM64Reg::WZR, ARM64Reg::WZR);
break;
}
}
}
void JitArm64::FlushCarry()
{
switch (js.carryFlag)
{
case CarryFlag::InPPCState:
{
break;
}
case CarryFlag::InHostCarry:
{
ARM64Reg WA = gpr.GetReg();
CSET(WA, CC_CS);
STRB(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(xer_ca));
gpr.Unlock(WA);
break;
}
case CarryFlag::ConstantTrue:
{
ARM64Reg WA = gpr.GetReg();
MOVI2R(WA, 1);
STRB(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(xer_ca));
gpr.Unlock(WA);
break;
}
case CarryFlag::ConstantFalse:
{
STRB(IndexType::Unsigned, ARM64Reg::WZR, PPC_REG, PPCSTATE_OFF(xer_ca));
break;
}
}
js.carryFlag = CarryFlag::InPPCState;
}
void JitArm64::reg_imm(u32 d, u32 a, u32 value, u32 (*do_op)(u32, u32),
void (ARM64XEmitter::*op)(ARM64Reg, ARM64Reg, u64, ARM64Reg), bool Rc)
{
if (gpr.IsImm(a))
{
gpr.SetImmediate(d, do_op(gpr.GetImm(a), value));
if (Rc)
ComputeRC0(gpr.GetImm(d));
}
else
{
gpr.BindToRegister(d, d == a);
ARM64Reg WA = gpr.GetReg();
(this->*op)(gpr.R(d), gpr.R(a), value, WA);
gpr.Unlock(WA);
if (Rc)
ComputeRC0(gpr.R(d));
}
}
static constexpr u32 BitOR(u32 a, u32 b)
{
return a | b;
}
static constexpr u32 BitAND(u32 a, u32 b)
{
return a & b;
}
static constexpr u32 BitXOR(u32 a, u32 b)
{
return a ^ b;
}
void JitArm64::arith_imm(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITIntegerOff);
u32 a = inst.RA, s = inst.RS;
switch (inst.OPCD)
{
case 24: // ori
case 25: // oris
{
// check for nop
if (a == s && inst.UIMM == 0)
{
// NOP
return;
}
const u32 immediate = inst.OPCD == 24 ? inst.UIMM : inst.UIMM << 16;
reg_imm(a, s, immediate, BitOR, &ARM64XEmitter::ORRI2R);
break;
}
case 28: // andi
reg_imm(a, s, inst.UIMM, BitAND, &ARM64XEmitter::ANDI2R, true);
break;
case 29: // andis
reg_imm(a, s, inst.UIMM << 16, BitAND, &ARM64XEmitter::ANDI2R, true);
break;
case 26: // xori
case 27: // xoris
{
if (a == s && inst.UIMM == 0)
{
// NOP
return;
}
const u32 immediate = inst.OPCD == 26 ? inst.UIMM : inst.UIMM << 16;
reg_imm(a, s, immediate, BitXOR, &ARM64XEmitter::EORI2R);
break;
}
}
}
void JitArm64::addix(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITIntegerOff);
u32 d = inst.RD, a = inst.RA;
u32 imm = (u32)(s32)inst.SIMM_16;
if (inst.OPCD == 15)
{
imm <<= 16;
}
if (a)
{
if (gpr.IsImm(a))
{
gpr.SetImmediate(d, gpr.GetImm(a) + imm);
}
else
{
gpr.BindToRegister(d, d == a);
ARM64Reg WA = gpr.GetReg();
ADDI2R(gpr.R(d), gpr.R(a), imm, WA);
gpr.Unlock(WA);
}
}
else
{
// a == 0, implies zero register
gpr.SetImmediate(d, imm);
}
}
void JitArm64::boolX(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITIntegerOff);
int a = inst.RA, s = inst.RS, b = inst.RB;
if (gpr.IsImm(s) && gpr.IsImm(b))
{
if (inst.SUBOP10 == 28) // andx
gpr.SetImmediate(a, (u32)gpr.GetImm(s) & (u32)gpr.GetImm(b));
else if (inst.SUBOP10 == 476) // nandx
gpr.SetImmediate(a, ~((u32)gpr.GetImm(s) & (u32)gpr.GetImm(b)));
else if (inst.SUBOP10 == 60) // andcx
gpr.SetImmediate(a, (u32)gpr.GetImm(s) & (~(u32)gpr.GetImm(b)));
else if (inst.SUBOP10 == 444) // orx
gpr.SetImmediate(a, (u32)gpr.GetImm(s) | (u32)gpr.GetImm(b));
else if (inst.SUBOP10 == 124) // norx
gpr.SetImmediate(a, ~((u32)gpr.GetImm(s) | (u32)gpr.GetImm(b)));
else if (inst.SUBOP10 == 412) // orcx
gpr.SetImmediate(a, (u32)gpr.GetImm(s) | (~(u32)gpr.GetImm(b)));
else if (inst.SUBOP10 == 316) // xorx
gpr.SetImmediate(a, (u32)gpr.GetImm(s) ^ (u32)gpr.GetImm(b));
else if (inst.SUBOP10 == 284) // eqvx
gpr.SetImmediate(a, ~((u32)gpr.GetImm(s) ^ (u32)gpr.GetImm(b)));
if (inst.Rc)
ComputeRC0(gpr.GetImm(a));
}
else if (s == b)
{
if ((inst.SUBOP10 == 28 /* andx */) || (inst.SUBOP10 == 444 /* orx */))
{
if (a != s)
{
gpr.BindToRegister(a, false);
MOV(gpr.R(a), gpr.R(s));
}
if (inst.Rc)
ComputeRC0(gpr.R(a));
}
else if ((inst.SUBOP10 == 476 /* nandx */) || (inst.SUBOP10 == 124 /* norx */))
{
gpr.BindToRegister(a, a == s);
MVN(gpr.R(a), gpr.R(s));
if (inst.Rc)
ComputeRC0(gpr.R(a));
}
else if ((inst.SUBOP10 == 412 /* orcx */) || (inst.SUBOP10 == 284 /* eqvx */))
{
gpr.SetImmediate(a, 0xFFFFFFFF);
if (inst.Rc)
ComputeRC0(gpr.GetImm(a));
}
else if ((inst.SUBOP10 == 60 /* andcx */) || (inst.SUBOP10 == 316 /* xorx */))
{
gpr.SetImmediate(a, 0);
if (inst.Rc)
ComputeRC0(gpr.GetImm(a));
}
else
{
PanicAlertFmt("WTF!");
}
}
else if ((gpr.IsImm(s) && (gpr.GetImm(s) == 0 || gpr.GetImm(s) == 0xFFFFFFFF ||
LogicalImm(gpr.GetImm(s), GPRSize::B32))) ||
(gpr.IsImm(b) && (gpr.GetImm(b) == 0 || gpr.GetImm(b) == 0xFFFFFFFF ||
LogicalImm(gpr.GetImm(b), GPRSize::B32))))
{
int i, j;
if (gpr.IsImm(s))
{
i = s;
j = b;
}
else
{
i = b;
j = s;
}
bool complement_b = (inst.SUBOP10 == 60 /* andcx */) || (inst.SUBOP10 == 412 /* orcx */);
const bool final_not = (inst.SUBOP10 == 476 /* nandx */) || (inst.SUBOP10 == 124 /* norx */);
const bool is_and = (inst.SUBOP10 == 28 /* andx */) || (inst.SUBOP10 == 60 /* andcx */) ||
(inst.SUBOP10 == 476 /* nandx */);
const bool is_or = (inst.SUBOP10 == 444 /* orx */) || (inst.SUBOP10 == 412 /* orcx */) ||
(inst.SUBOP10 == 124 /* norx */);
const bool is_xor = (inst.SUBOP10 == 316 /* xorx */) || (inst.SUBOP10 == 284 /* eqvx */);
u32 imm = gpr.GetImm(i);
if ((complement_b && i == b) || (inst.SUBOP10 == 284 /* eqvx */))
{
imm = ~imm;
complement_b = false;
}
const bool is_zero = imm == 0;
const bool is_ones = imm == 0xFFFFFFFF;
// If imm can be represented as LogicalImm, so can ~imm.
const auto log_imm = LogicalImm(imm, GPRSize::B32);
if (is_xor)
{
if (is_zero)
{
if (a != j)
{
gpr.BindToRegister(a, false);
MOV(gpr.R(a), gpr.R(j));
}
}
else
{
gpr.BindToRegister(a, a == j);
if (is_ones)
{
MVN(gpr.R(a), gpr.R(j));
}
else
{
EOR(gpr.R(a), gpr.R(j), log_imm);
}
}
if (inst.Rc)
ComputeRC0(gpr.R(a));
}
else if (is_and)
{
if (is_zero)
{
gpr.SetImmediate(a, final_not ? 0xFFFFFFFF : 0);
if (inst.Rc)
ComputeRC0(gpr.GetImm(a));
}
else if (is_ones)
{
if (final_not || complement_b)
{
gpr.BindToRegister(a, a == j);
MVN(gpr.R(a), gpr.R(j));
}
else if (a != j)
{
gpr.BindToRegister(a, false);
MOV(gpr.R(a), gpr.R(j));
}
if (inst.Rc)
ComputeRC0(gpr.R(a));
}
else
{
if (!complement_b)
{
gpr.BindToRegister(a, a == j);
AND(gpr.R(a), gpr.R(j), log_imm);
if (final_not)
MVN(gpr.R(a), gpr.R(a));
}
else
{
// No shorter instruction sequence is possible. Just materialize the
// immediate in a register as usual, so subsequent uses can leech off
// of it.
gpr.BindToRegister(a, (a == i) || (a == j));
BIC(gpr.R(a), gpr.R(i), gpr.R(j));
}
if (inst.Rc)
ComputeRC0(gpr.R(a));
}
}
else if (is_or)
{
if (is_ones)
{
gpr.SetImmediate(a, final_not ? 0 : 0xFFFFFFFF);
if (inst.Rc)
ComputeRC0(gpr.GetImm(a));
}
else if (is_zero)
{
if (final_not || complement_b)
{
gpr.BindToRegister(a, a == j);
MVN(gpr.R(a), gpr.R(j));
}
else if (a != j)
{
gpr.BindToRegister(a, false);
MOV(gpr.R(a), gpr.R(j));
}
if (inst.Rc)
ComputeRC0(gpr.R(a));
}
else
{
if (!complement_b)
{
gpr.BindToRegister(a, a == j);
ORR(gpr.R(a), gpr.R(j), log_imm);
if (final_not)
MVN(gpr.R(a), gpr.R(a));
}
else
{
// No shorter instruction sequence is possible. Just materialize the
// immediate in a register as usual, so subsequent uses can leech off
// of it.
gpr.BindToRegister(a, (a == i) || (a == j));
ORN(gpr.R(a), gpr.R(i), gpr.R(j));
}
if (inst.Rc)
ComputeRC0(gpr.R(a));
}
}
else
{
PanicAlertFmt("WTF!");
}
}
else
{
gpr.BindToRegister(a, (a == s) || (a == b));
if (inst.SUBOP10 == 28) // andx
{
AND(gpr.R(a), gpr.R(s), gpr.R(b));
}
else if (inst.SUBOP10 == 476) // nandx
{
AND(gpr.R(a), gpr.R(s), gpr.R(b));
MVN(gpr.R(a), gpr.R(a));
}
else if (inst.SUBOP10 == 60) // andcx
{
BIC(gpr.R(a), gpr.R(s), gpr.R(b));
}
else if (inst.SUBOP10 == 444) // orx
{
ORR(gpr.R(a), gpr.R(s), gpr.R(b));
}
else if (inst.SUBOP10 == 124) // norx
{
ORR(gpr.R(a), gpr.R(s), gpr.R(b));
MVN(gpr.R(a), gpr.R(a));
}
else if (inst.SUBOP10 == 412) // orcx
{
ORN(gpr.R(a), gpr.R(s), gpr.R(b));
}
else if (inst.SUBOP10 == 316) // xorx
{
EOR(gpr.R(a), gpr.R(s), gpr.R(b));
}
else if (inst.SUBOP10 == 284) // eqvx
{
EON(gpr.R(a), gpr.R(b), gpr.R(s));
}
else
{
PanicAlertFmt("WTF!");
}
if (inst.Rc)
ComputeRC0(gpr.R(a));
}
}
void JitArm64::addx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITIntegerOff);
FALLBACK_IF(inst.OE);
int a = inst.RA, b = inst.RB, d = inst.RD;
if (gpr.IsImm(a) && gpr.IsImm(b))
{
s32 i = (s32)gpr.GetImm(a), j = (s32)gpr.GetImm(b);
gpr.SetImmediate(d, i + j);
if (inst.Rc)
ComputeRC0(gpr.GetImm(d));
}
else if (gpr.IsImm(a) || gpr.IsImm(b))
{
int imm_reg = gpr.IsImm(a) ? a : b;
int in_reg = gpr.IsImm(a) ? b : a;
int imm_value = gpr.GetImm(imm_reg);
gpr.BindToRegister(d, d == in_reg);
ARM64Reg WA = gpr.GetReg();
ADDI2R(gpr.R(d), gpr.R(in_reg), imm_value, WA);
gpr.Unlock(WA);
if (inst.Rc)
ComputeRC0(gpr.R(d));
}
else
{
gpr.BindToRegister(d, d == a || d == b);
ADD(gpr.R(d), gpr.R(a), gpr.R(b));
if (inst.Rc)
ComputeRC0(gpr.R(d));
}
}
void JitArm64::extsXx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITIntegerOff);
int a = inst.RA, s = inst.RS;
int size = inst.SUBOP10 == 922 ? 16 : 8;
if (gpr.IsImm(s))
{
gpr.SetImmediate(a, (u32)(s32)(size == 16 ? (s16)gpr.GetImm(s) : (s8)gpr.GetImm(s)));
if (inst.Rc)
ComputeRC0(gpr.GetImm(a));
}
else
{
gpr.BindToRegister(a, a == s);
SBFM(gpr.R(a), gpr.R(s), 0, size - 1);
if (inst.Rc)
ComputeRC0(gpr.R(a));
}
}
void JitArm64::cntlzwx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITIntegerOff);
int a = inst.RA;
int s = inst.RS;
if (gpr.IsImm(s))
{
gpr.SetImmediate(a, static_cast<u32>(std::countl_zero(gpr.GetImm(s))));
if (inst.Rc)
ComputeRC0(gpr.GetImm(a));
}
else
{
gpr.BindToRegister(a, a == s);
CLZ(gpr.R(a), gpr.R(s));
if (inst.Rc)
ComputeRC0(gpr.R(a));
}
}
void JitArm64::negx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITIntegerOff);
int a = inst.RA;
int d = inst.RD;
FALLBACK_IF(inst.OE);
if (gpr.IsImm(a))
{
gpr.SetImmediate(d, ~((u32)gpr.GetImm(a)) + 1);
if (inst.Rc)
ComputeRC0(gpr.GetImm(d));
}
else
{
gpr.BindToRegister(d, d == a);
SUB(gpr.R(d), ARM64Reg::WSP, gpr.R(a));
if (inst.Rc)
ComputeRC0(gpr.R(d));
}
}
void JitArm64::cmp(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITIntegerOff);
int crf = inst.CRFD;
u32 a = inst.RA, b = inst.RB;
gpr.BindCRToRegister(crf, false);
ARM64Reg CR = gpr.CR(crf);
if (gpr.IsImm(a) && gpr.IsImm(b))
{
s64 A = static_cast<s32>(gpr.GetImm(a));
s64 B = static_cast<s32>(gpr.GetImm(b));
MOVI2R(CR, A - B);
}
else if (gpr.IsImm(a) && !gpr.GetImm(a))
{
SXTW(CR, gpr.R(b));
NEG(CR, CR);
}
else if (gpr.IsImm(a) && gpr.GetImm(a) == 0xFFFFFFFF)
{
SXTW(CR, gpr.R(b));
MVN(CR, CR);
}
else if (gpr.IsImm(b) && !gpr.GetImm(b))
{
SXTW(CR, gpr.R(a));
}
else
{
ARM64Reg RA = gpr.R(a);
ARM64Reg RB = gpr.R(b);
SXTW(CR, RA);
SUB(CR, CR, RB, ArithOption(RB, ExtendSpecifier::SXTW));
}
}
void JitArm64::cmpl(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITIntegerOff);
int crf = inst.CRFD;
u32 a = inst.RA, b = inst.RB;
gpr.BindCRToRegister(crf, false);
ARM64Reg CR = gpr.CR(crf);
if (gpr.IsImm(a) && gpr.IsImm(b))
{
u64 A = gpr.GetImm(a);
u64 B = gpr.GetImm(b);
MOVI2R(CR, A - B);
}
else if (gpr.IsImm(a) && !gpr.GetImm(a))
{
NEG(CR, EncodeRegTo64(gpr.R(b)));
}
else if (gpr.IsImm(b) && !gpr.GetImm(b))
{
MOV(EncodeRegTo32(CR), gpr.R(a));
}
else
{
SUB(CR, EncodeRegTo64(gpr.R(a)), EncodeRegTo64(gpr.R(b)));
}
}
void JitArm64::cmpi(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITIntegerOff);
u32 a = inst.RA;
s64 B = inst.SIMM_16;
int crf = inst.CRFD;
gpr.BindCRToRegister(crf, false);
ARM64Reg CR = gpr.CR(crf);
if (gpr.IsImm(a))
{
s64 A = static_cast<s32>(gpr.GetImm(a));
MOVI2R(CR, A - B);
return;
}
SXTW(CR, gpr.R(a));
if (B != 0)
{
ARM64Reg WA = gpr.GetReg();
SUBI2R(CR, CR, B, EncodeRegTo64(WA));
gpr.Unlock(WA);
}
}
void JitArm64::cmpli(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITIntegerOff);
u32 a = inst.RA;
u64 B = inst.UIMM;
int crf = inst.CRFD;
gpr.BindCRToRegister(crf, false);
ARM64Reg CR = gpr.CR(crf);
if (gpr.IsImm(a))
{
u64 A = gpr.GetImm(a);
MOVI2R(CR, A - B);
return;
}
if (!B)
{
MOV(EncodeRegTo32(CR), gpr.R(a));
return;
}
SUBI2R(CR, EncodeRegTo64(gpr.R(a)), B, CR);
}
void JitArm64::rlwinmx_internal(UGeckoInstruction inst, u32 sh)
{
u32 a = inst.RA, s = inst.RS;
const u32 mask = MakeRotationMask(inst.MB, inst.ME);
if (gpr.IsImm(inst.RS))
{
gpr.SetImmediate(a, std::rotl(gpr.GetImm(s), sh) & mask);
if (inst.Rc)
ComputeRC0(gpr.GetImm(a));
return;
}
gpr.BindToRegister(a, a == s);
if (sh == 0 && mask == 0xFFFFFFFF)
{
if (a != s)
MOV(gpr.R(a), gpr.R(s));
}
else if (sh == 0)
{
// Immediate mask
AND(gpr.R(a), gpr.R(s), LogicalImm(mask, GPRSize::B32));
}
else if (mask == 0xFFFFFFFF)
{
ROR(gpr.R(a), gpr.R(s), 32 - sh);
}
else if (inst.ME == 31 && 31 < sh + inst.MB)
{
// Bit select of the upper part
UBFX(gpr.R(a), gpr.R(s), 32 - sh, 32 - inst.MB);
}
else if (inst.ME == 31 - sh && 32 > sh + inst.MB)
{
// Bit select of the lower part
UBFIZ(gpr.R(a), gpr.R(s), sh, 32 - sh - inst.MB);
}
else
{
ARM64Reg WA = gpr.GetReg();
MOVI2R(WA, mask);
AND(gpr.R(a), WA, gpr.R(s), ArithOption(gpr.R(s), ShiftType::ROR, 32 - sh));
gpr.Unlock(WA);
}
if (inst.Rc)
ComputeRC0(gpr.R(a));
}
void JitArm64::rlwinmx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITIntegerOff);
rlwinmx_internal(inst, inst.SH);
}
void JitArm64::rlwnmx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITIntegerOff);
const u32 a = inst.RA, b = inst.RB, s = inst.RS;
if (gpr.IsImm(b))
{
rlwinmx_internal(inst, gpr.GetImm(b) & 0x1F);
return;
}
const u32 mask = MakeRotationMask(inst.MB, inst.ME);
gpr.BindToRegister(a, a == s || a == b);
ARM64Reg WA = gpr.GetReg();
NEG(WA, gpr.R(b));
RORV(gpr.R(a), gpr.R(s), WA);
ANDI2R(gpr.R(a), gpr.R(a), mask, WA);
gpr.Unlock(WA);
if (inst.Rc)
ComputeRC0(gpr.R(a));
}
void JitArm64::srawix(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITIntegerOff);
int a = inst.RA;
int s = inst.RS;
int amount = inst.SH;
bool inplace_carry = CanMergeNextInstructions(1) && js.op[1].wantsCAInFlags;
if (gpr.IsImm(s))
{
s32 imm = (s32)gpr.GetImm(s);
gpr.SetImmediate(a, imm >> amount);
ComputeCarry(amount != 0 && (imm < 0) && (u32(imm) << (32 - amount)));
if (inst.Rc)
ComputeRC0(gpr.GetImm(a));
}
else if (amount == 0)
{
gpr.BindToRegister(a, a == s);
ARM64Reg RA = gpr.R(a);
ARM64Reg RS = gpr.R(s);
MOV(RA, RS);
ComputeCarry(false);
if (inst.Rc)
ComputeRC0(RA);
}
else
{
gpr.BindToRegister(a, a == s);
ARM64Reg RA = gpr.R(a);
ARM64Reg RS = gpr.R(s);
if (js.op->wantsCA)
{
ARM64Reg WA = gpr.GetReg();
ARM64Reg dest = inplace_carry ? WA : ARM64Reg::WSP;
if (a != s)
{
ASR(RA, RS, amount);
ANDS(dest, RA, RS, ArithOption(RS, ShiftType::LSL, 32 - amount));
}
else
{
LSL(WA, RS, 32 - amount);
ASR(RA, RS, amount);
ANDS(dest, WA, RA);
}
if (inplace_carry)
{
CMP(dest, 1);
ComputeCarry();
}
else
{
CSINC(WA, ARM64Reg::WSP, ARM64Reg::WSP, CC_EQ);
ComputeCarry(WA);
}
gpr.Unlock(WA);
}
else
{
ASR(RA, RS, amount);
}
if (inst.Rc)
ComputeRC0(RA);
}
}
void JitArm64::addic(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITIntegerOff);
int a = inst.RA, d = inst.RD;
bool rc = inst.OPCD == 13;
s32 simm = inst.SIMM_16;
u32 imm = (u32)simm;
if (gpr.IsImm(a))
{
u32 i = gpr.GetImm(a);
gpr.SetImmediate(d, i + imm);
bool has_carry = Interpreter::Helper_Carry(i, imm);
ComputeCarry(has_carry);
if (rc)
ComputeRC0(gpr.GetImm(d));
}
else
{
gpr.BindToRegister(d, d == a);
ARM64Reg WA = gpr.GetReg();
CARRY_IF_NEEDED(ADDI2R, ADDSI2R, gpr.R(d), gpr.R(a), simm, WA);
gpr.Unlock(WA);
ComputeCarry();
if (rc)
ComputeRC0(gpr.R(d));
}
}
bool JitArm64::MultiplyImmediate(u32 imm, int a, int d, bool rc)
{
if (imm == 0)
{
// Multiplication by zero (0).
gpr.SetImmediate(d, 0);
if (rc)
ComputeRC0(gpr.GetImm(d));
}
else if (imm == 1)
{
// Multiplication by one (1).
if (d != a)
{
gpr.BindToRegister(d, false);
MOV(gpr.R(d), gpr.R(a));
}
if (rc)
ComputeRC0(gpr.R(d));
}
else if (MathUtil::IsPow2(imm))
{
// Multiplication by a power of two (2^n).
const int shift = MathUtil::IntLog2(imm);
gpr.BindToRegister(d, d == a);
LSL(gpr.R(d), gpr.R(a), shift);
if (rc)
ComputeRC0(gpr.R(d));
}
else if (MathUtil::IsPow2(imm - 1))
{
// Multiplication by a power of two plus one (2^n + 1).
const int shift = MathUtil::IntLog2(imm - 1);
gpr.BindToRegister(d, d == a);
ADD(gpr.R(d), gpr.R(a), gpr.R(a), ArithOption(gpr.R(a), ShiftType::LSL, shift));
if (rc)
ComputeRC0(gpr.R(d));
}
else if (MathUtil::IsPow2(~imm + 1))
{
// Multiplication by a negative power of two (-(2^n)).
const int shift = MathUtil::IntLog2(~imm + 1);
gpr.BindToRegister(d, d == a);
NEG(gpr.R(d), gpr.R(a), ArithOption(gpr.R(a), ShiftType::LSL, shift));
if (rc)
ComputeRC0(gpr.R(d));
}