Strange cases

[semiversus]

I found strange solutions to some inputs.

If you take this example:

t = logicmin.TT(4,4)
t.add('0001', '0001')
print(t.solve().printN())

The output is:

y0 <= x3'.x2'.x1'.x0
y1 <= 0
y2 <= 0
y3 <= 0

I would think y0 should be either 1 or x0. Basically the same solution is presented for 3 bit.

If you use 2 bit input/output, the output gets:

y0 <= 1
y1 <= 0

[dreylago]

I could not replicate your example

>>> t = logicmin.TT(2,2)
>>> t.add('01','01')
>>> print(t.solve().printN())
y0 <= x1'.x0
y1 <= 0
>>> 

[semiversus]

Also for your example I would expect y0 <= 1 and y1 <= 0. I found the issue while trying your example: I thought that not defining the other cases would result in "undefined" outputs. But it's like defining the outputs to 0. So your example is equal to

>>> t = logicmin.TT(2,2)
>>> t.add('00','00')
>>> t.add('01','01')
>>> t.add('10','00')
>>> t.add('11','00')

and not like I thought:

>>> t = logicmin.TT(2,2)
>>> t.add('00','--')
>>> t.add('01','01')
>>> t.add('10','--')
>>> t.add('11','--')

You can close this issue, as the library is working, when you know how to use it correctly. Good and helpful work by the way!