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sx1231h.h
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sx1231h.h
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/*
* sx1231h.h
* The RFM69HW uses a Semtech SX1231H module but handles all of the RF board layout
*
* Created on: May 13, 2015
* Author: Dustin
*
* Copyright (c) 2015, Dustin Reynolds
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of [project] nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef SX1231H_H_
#define SX1231H_H_
#include <stdint.h>
#include <stdbool.h>
/*******************************************************************
** Global definitions **
*******************************************************************/
/*******************************************************************
** RF packet definition **
*******************************************************************/
#define RF_BUFFER_SIZE_MAX 66 // Set to FIFO size in this API implementation but SX1231's packet mode itself allows up to infinite payload length
#define RF_BUFFER_SIZE 66 //
#define RF_TIMEOUT_WAIT 3000 //3000ms
#define RF_TIMEOUT_RX_WAIT 10000
/*******************************************************************
** RF State machine **
*******************************************************************/
#define RF_STOP 0x01
#define RF_BUSY 0x02
#define RF_RX_DONE 0x04
#define RF_TX_DONE 0x08
#define RF_ERROR 0x10
#define RF_TIMEOUT 0x20
/*******************************************************************
** RF function return codes **
*******************************************************************/
#define OK 0x00
#define ERROR 0x01
#define RX_TIMEOUT 0x02
#define RX_RUNNING 0x03
#define TX_TIMEOUT 0x04
#define TX_RUNNING 0x05
/*******************************************************************
** SX1231 definitions **
*******************************************************************/
/*******************************************************************
** SX1231 Operating modes definition **
*******************************************************************/
#define RF_SLEEP 0x00
#define RF_STANDBY 0x04
#define RF_SYNTHESIZER 0x08
#define RF_TRANSMITTER 0x0C
#define RF_RECEIVER 0x10
#define RF_LISTEN 0x40
#define RF_LISTEN_THEN_TX 0x4C
#define RF_LISTEN_THEN_RX 0x50
#define RF_LISTEN_THEN_SLEEP 0x40
#define RF_LISTEN_THEN_STANDBY 0x44
#define RF_ABORT_LISTEN_SLEEP 0x20
/*******************************************************************
** SX1231 Internal registers Address **
*******************************************************************/
#define REG_FIFO 0x00
#define REG_OPMODE 0x01
#define REG_DATAMODUL 0x02
#define REG_BITRATEMSB 0x03
#define REG_BITRATELSB 0x04
#define REG_FDEVMSB 0x05
#define REG_FDEVLSB 0x06
#define REG_FRFMSB 0x07
#define REG_FRFMID 0x08
#define REG_FRFLSB 0x09
#define REG_OSC1 0x0A
#define REG_OSC2 0x0B
#define REG_LOWBAT 0x0C
#define REG_LISTEN1 0x0D
#define REG_LISTEN2 0x0E
#define REG_LISTEN3 0x0F
#define REG_VERSION 0x10
#define REG_PALEVEL 0x11
#define REG_PARAMP 0x12
#define REG_OCP 0x13
#define REG_AGCREF 0x14
#define REG_AGCTHRESH1 0x15
#define REG_AGCTHRESH2 0x16
#define REG_AGCTHRESH3 0x17
#define REG_LNA 0x18
#define REG_RXBW 0x19
#define REG_AFCBW 0x1A
#define REG_OOKPEAK 0x1B
#define REG_OOKAVG 0x1C
#define REG_OOKFIX 0x1D
#define REG_AFCFEI 0x1E
#define REG_AFCMSB 0x1F
#define REG_AFCLSB 0x20
#define REG_FEIMSB 0x21
#define REG_FEILSB 0x22
#define REG_RSSICONFIG 0x23
#define REG_RSSIVALUE 0x24
#define REG_DIOMAPPING1 0x25
#define REG_DIOMAPPING2 0x26
#define REG_IRQFLAGS1 0x27
#define REG_IRQFLAGS2 0x28
#define REG_RSSITHRESH 0x29
#define REG_RXTIMEOUT1 0x2A
#define REG_RXTIMEOUT2 0x2B
#define REG_PREAMBLEMSB 0x2C
#define REG_PREAMBLELSB 0x2D
#define REG_SYNCCONFIG 0x2E
#define REG_SYNCVALUE1 0x2F
#define REG_SYNCVALUE2 0x30
#define REG_SYNCVALUE3 0x31
#define REG_SYNCVALUE4 0x32
#define REG_SYNCVALUE5 0x33
#define REG_SYNCVALUE6 0x34
#define REG_SYNCVALUE7 0x35
#define REG_SYNCVALUE8 0x36
#define REG_PACKETCONFIG1 0x37
#define REG_PAYLOADLENGTH 0x38
#define REG_NODEADRS 0x39
#define REG_BROADCASTADRS 0x3A
#define REG_AUTOMODES 0x3B
#define REG_FIFOTHRESH 0x3C
#define REG_PACKETCONFIG2 0x3D
#define REG_AESKEY1 0x3E
#define REG_AESKEY2 0x3F
#define REG_AESKEY3 0x40
#define REG_AESKEY4 0x41
#define REG_AESKEY5 0x42
#define REG_AESKEY6 0x43
#define REG_AESKEY7 0x44
#define REG_AESKEY8 0x45
#define REG_AESKEY9 0x46
#define REG_AESKEY10 0x47
#define REG_AESKEY11 0x48
#define REG_AESKEY12 0x49
#define REG_AESKEY13 0x4A
#define REG_AESKEY14 0x4B
#define REG_AESKEY15 0x4C
#define REG_AESKEY16 0x4D
#define REG_TEMP1 0x4E
#define REG_TEMP2 0x4F
#define REG_TESTLNA 0x58
#define REG_TESTPA1 0x5A
#define REG_TESTPA2 0x5C
/*******************************************************************
** SX1231 initialisation register values definition **
*******************************************************************/
#define DEF_FIFO 0x00 // FIFO not to be initialized
#define DEF_OPMODE 0x00
#define DEF_DATAMODUL 0x00
#define DEF_BITRATEMSB 0x00
#define DEF_BITRATELSB 0x00
#define DEF_FDEVMSB 0x00
#define DEF_FDEVLSB 0x00
#define DEF_FRFMSB 0x00
#define DEF_FRFMID 0x00
#define DEF_FRFLSB 0x00
#define DEF_OSC1 0x01
#define DEF_AFCCTRL 0x00
#define DEF_LOWBAT 0x00
#define DEF_LISTEN1 0x00
#define DEF_LISTEN2 0x00
#define DEF_LISTEN3 0x00
#define DEF_VERSION 0x00
#define DEF_PALEVEL 0x00
#define DEF_PARAMP 0x00
#define DEF_OCP 0x00
#define DEF_AGCREF 0x00
#define DEF_AGCTHRESH1 0x00
#define DEF_AGCTHRESH2 0x00
#define DEF_AGCTHRESH3 0x00
#define DEF_LNA 0x00
#define DEF_RXBW 0x00
#define DEF_AFCBW 0x00
#define DEF_OOKPEAK 0x00
#define DEF_OOKAVG 0x00
#define DEF_OOKFIX 0x00
#define DEF_AFCFEI 0x00
#define DEF_AFCMSB 0x00
#define DEF_AFCLSB 0x00
#define DEF_FEIMSB 0x00
#define DEF_FEILSB 0x00
#define DEF_RSSICONFIG 0x00
#define DEF_RSSIVALUE 0x00
#define DEF_DIOMAPPING1 0x00
#define DEF_DIOMAPPING2 0x00
#define DEF_IRQFLAGS1 0x00
#define DEF_IRQFLAGS2 0x00
#define DEF_RSSITHRESH 0x00
#define DEF_RXTIMEOUT1 0x00
#define DEF_RXTIMEOUT2 0x00
#define DEF_PREAMBLEMSB 0x00
#define DEF_PREAMBLELSB 0x00
#define DEF_SYNCCONFIG 0x00
#define DEF_SYNCVALUE1 0x00
#define DEF_SYNCVALUE2 0x00
#define DEF_SYNCVALUE3 0x00
#define DEF_SYNCVALUE4 0x00
#define DEF_SYNCVALUE5 0x00
#define DEF_SYNCVALUE6 0x00
#define DEF_SYNCVALUE7 0x00
#define DEF_SYNCVALUE8 0x00
#define DEF_PACKETCONFIG1 0x00
#define DEF_PAYLOADLENGTH 0x00
#define DEF_NODEADRS 0x00
#define DEF_BROADCASTADRS 0x00
#define DEF_AUTOMODES 0x00
#define DEF_FIFOTHRESH 0x00
#define DEF_PACKETCONFIG2 0x00
#define DEF_AESKEY1 0x00
#define DEF_AESKEY2 0x00
#define DEF_AESKEY3 0x00
#define DEF_AESKEY4 0x00
#define DEF_AESKEY5 0x00
#define DEF_AESKEY6 0x00
#define DEF_AESKEY7 0x00
#define DEF_AESKEY8 0x00
#define DEF_AESKEY9 0x00
#define DEF_AESKEY10 0x00
#define DEF_AESKEY11 0x00
#define DEF_AESKEY12 0x00
#define DEF_AESKEY13 0x00
#define DEF_AESKEY14 0x00
#define DEF_AESKEY15 0x00
#define DEF_AESKEY16 0x00
#define DEF_TEMP1 0x00
#define DEF_TEMP2 0x00
/*******************************************************************
** SX1231 bit control definition **
*******************************************************************/
// RegFifo
// RegOpMode
#define RF_OPMODE_SEQUENCER_OFF 0x80
#define RF_OPMODE_SEQUENCER_ON 0x00 // Default
#define RF_OPMODE_LISTEN_ON 0x40
#define RF_OPMODE_LISTEN_OFF 0x00 // Default
#define RF_OPMODE_LISTENABORT 0x20
#define RF_OPMODE_SLEEP 0x00
#define RF_OPMODE_STANDBY 0x04 // Default
#define RF_OPMODE_SYNTHESIZER 0x08
#define RF_OPMODE_TRANSMITTER 0x0C
#define RF_OPMODE_RECEIVER 0x10
// RegDataModul
#define RF_DATAMODUL_DATAMODE_PACKET 0x00 // Default
#define RF_DATAMODUL_DATAMODE_CONTINUOUS 0x40
#define RF_DATAMODUL_DATAMODE_CONTINUOUSNOBSYNC 0x60
#define RF_DATAMODUL_MODULATIONTYPE_FSK 0x00 // Default
#define RF_DATAMODUL_MODULATIONTYPE_OOK 0x08
#define RF_DATAMODUL_MODULATIONSHAPING_00 0x00 // Default
#define RF_DATAMODUL_MODULATIONSHAPING_01 0x01
#define RF_DATAMODUL_MODULATIONSHAPING_10 0x02
#define RF_DATAMODUL_MODULATIONSHAPING_11 0x03
// RegBitRate (bits/sec)
#define RF_BITRATEMSB_1200 0x68
#define RF_BITRATELSB_1200 0x2B
#define RF_BITRATEMSB_2400 0x34
#define RF_BITRATELSB_2400 0x15
#define RF_BITRATEMSB_4800 0x1A // Default
#define RF_BITRATELSB_4800 0x0B // Default
#define RF_BITRATEMSB_9600 0x0D
#define RF_BITRATELSB_9600 0x05
#define RF_BITRATEMSB_19200 0x06
#define RF_BITRATELSB_19200 0x83
#define RF_BITRATEMSB_38400 0x03
#define RF_BITRATELSB_38400 0x41
#define RF_BITRATEMSB_57600 0x02
#define RF_BITRATELSB_57600 0x2C
#define RF_BITRATEMSB_76800 0x01
#define RF_BITRATELSB_76800 0xA1
#define RF_BITRATEMSB_115200 0x01
#define RF_BITRATELSB_115200 0x16
#define RF_BITRATEMSB_153600 0x00
#define RF_BITRATELSB_153600 0xD0
#define RF_BITRATEMSB_12500 0x0A
#define RF_BITRATELSB_12500 0x00
#define RF_BITRATEMSB_25000 0x05
#define RF_BITRATELSB_25000 0x00
#define RF_BITRATEMSB_32768 0x03
#define RF_BITRATELSB_32768 0xD1
#define RF_BITRATEMSB_50000 0x02
#define RF_BITRATELSB_50000 0x80
#define RF_BITRATEMSB_55555 0x02
#define RF_BITRATELSB_55555 0x40
#define RF_BITRATEMSB_100000 0x01
#define RF_BITRATELSB_100000 0x40
#define RF_BITRATEMSB_150000 0x00
#define RF_BITRATELSB_150000 0xD5
#define RF_BITRATEMSB_200000 0x00
#define RF_BITRATELSB_200000 0xA0
#define RF_BITRATEMSB_250000 0x00
#define RF_BITRATELSB_250000 0x80
#define RF_BITRATEMSB_300000 0x00
#define RF_BITRATELSB_300000 0x6B
// RegFdev (Hz)
#define RF_FDEVMSB_2000 0x00
#define RF_FDEVLSB_2000 0x21
#define RF_FDEVMSB_5000 0x00 // Default
#define RF_FDEVLSB_5000 0x52 // Default
#define RF_FDEVMSB_10000 0x00
#define RF_FDEVLSB_10000 0xA4
#define RF_FDEVMSB_15000 0x00
#define RF_FDEVLSB_15000 0xF6
#define RF_FDEVMSB_20000 0x01
#define RF_FDEVLSB_20000 0x48
#define RF_FDEVMSB_25000 0x01
#define RF_FDEVLSB_25000 0x9A
#define RF_FDEVMSB_30000 0x01
#define RF_FDEVLSB_30000 0xEC
#define RF_FDEVMSB_35000 0x02
#define RF_FDEVLSB_35000 0x3D
#define RF_FDEVMSB_40000 0x02
#define RF_FDEVLSB_40000 0x8F
#define RF_FDEVMSB_45000 0x02
#define RF_FDEVLSB_45000 0xE1
#define RF_FDEVMSB_50000 0x03
#define RF_FDEVLSB_50000 0x33
#define RF_FDEVMSB_55000 0x03
#define RF_FDEVLSB_55000 0x85
#define RF_FDEVMSB_60000 0x03
#define RF_FDEVLSB_60000 0xD7
#define RF_FDEVMSB_65000 0x04
#define RF_FDEVLSB_65000 0x29
#define RF_FDEVMSB_70000 0x04
#define RF_FDEVLSB_70000 0x7B
#define RF_FDEVMSB_75000 0x04
#define RF_FDEVLSB_75000 0xCD
#define RF_FDEVMSB_80000 0x05
#define RF_FDEVLSB_80000 0x1F
#define RF_FDEVMSB_85000 0x05
#define RF_FDEVLSB_85000 0x71
#define RF_FDEVMSB_90000 0x05
#define RF_FDEVLSB_90000 0xC3
#define RF_FDEVMSB_95000 0x06
#define RF_FDEVLSB_95000 0x14
#define RF_FDEVMSB_100000 0x06
#define RF_FDEVLSB_100000 0x66
#define RF_FDEVMSB_110000 0x07
#define RF_FDEVLSB_110000 0x0A
#define RF_FDEVMSB_120000 0x07
#define RF_FDEVLSB_120000 0xAE
#define RF_FDEVMSB_130000 0x08
#define RF_FDEVLSB_130000 0x52
#define RF_FDEVMSB_140000 0x08
#define RF_FDEVLSB_140000 0xF6
#define RF_FDEVMSB_150000 0x09
#define RF_FDEVLSB_150000 0x9A
#define RF_FDEVMSB_160000 0x0A
#define RF_FDEVLSB_160000 0x3D
#define RF_FDEVMSB_170000 0x0A
#define RF_FDEVLSB_170000 0xE1
#define RF_FDEVMSB_180000 0x0B
#define RF_FDEVLSB_180000 0x85
#define RF_FDEVMSB_190000 0x0C
#define RF_FDEVLSB_190000 0x29
#define RF_FDEVMSB_200000 0x0C
#define RF_FDEVLSB_200000 0xCD
#define RF_FDEVMSB_210000 0x0D
#define RF_FDEVLSB_210000 0x71
#define RF_FDEVMSB_220000 0x0E
#define RF_FDEVLSB_220000 0x14
#define RF_FDEVMSB_230000 0x0E
#define RF_FDEVLSB_230000 0xB8
#define RF_FDEVMSB_240000 0x0F
#define RF_FDEVLSB_240000 0x5C
#define RF_FDEVMSB_250000 0x10
#define RF_FDEVLSB_250000 0x00
#define RF_FDEVMSB_260000 0x10
#define RF_FDEVLSB_260000 0xA4
#define RF_FDEVMSB_270000 0x11
#define RF_FDEVLSB_270000 0x48
#define RF_FDEVMSB_280000 0x11
#define RF_FDEVLSB_280000 0xEC
#define RF_FDEVMSB_290000 0x12
#define RF_FDEVLSB_290000 0x8F
#define RF_FDEVMSB_300000 0x13
#define RF_FDEVLSB_300000 0x33
// RegFrf (MHz)
#define RF_FRFMSB_314 0x4E
#define RF_FRFMID_314 0x80
#define RF_FRFLSB_314 0x00
#define RF_FRFMSB_315 0x4E
#define RF_FRFMID_315 0xC0
#define RF_FRFLSB_315 0x00
#define RF_FRFMSB_316 0x4F
#define RF_FRFMID_316 0x00
#define RF_FRFLSB_316 0x00
#define RF_FRFMSB_433 0x6C
#define RF_FRFMID_433 0x40
#define RF_FRFLSB_433 0x00
#define RF_FRFMSB_434 0x6C
#define RF_FRFMID_434 0x80
#define RF_FRFLSB_434 0x00
#define RF_FRFMSB_435 0x6C
#define RF_FRFMID_435 0xC0
#define RF_FRFLSB_435 0x00
#define RF_FRFMSB_863 0xD7
#define RF_FRFMID_863 0xC0
#define RF_FRFLSB_863 0x00
#define RF_FRFMSB_864 0xD8
#define RF_FRFMID_864 0x00
#define RF_FRFLSB_864 0x00
#define RF_FRFMSB_865 0xD8
#define RF_FRFMID_865 0x40
#define RF_FRFLSB_865 0x00
#define RF_FRFMSB_866 0xD8
#define RF_FRFMID_866 0x80
#define RF_FRFLSB_866 0x00
#define RF_FRFMSB_867 0xD8
#define RF_FRFMID_867 0xC0
#define RF_FRFLSB_867 0x00
#define RF_FRFMSB_868 0xD9
#define RF_FRFMID_868 0x00
#define RF_FRFLSB_868 0x00
#define RF_FRFMSB_869 0xD9
#define RF_FRFMID_869 0x40
#define RF_FRFLSB_869 0x00
#define RF_FRFMSB_870 0xD9
#define RF_FRFMID_870 0x80
#define RF_FRFLSB_870 0x00
#define RF_FRFMSB_902 0xE1
#define RF_FRFMID_902 0x80
#define RF_FRFLSB_902 0x00
#define RF_FRFMSB_903 0xE1
#define RF_FRFMID_903 0xC0
#define RF_FRFLSB_903 0x00
#define RF_FRFMSB_904 0xE2
#define RF_FRFMID_904 0x00
#define RF_FRFLSB_904 0x00
#define RF_FRFMSB_905 0xE2
#define RF_FRFMID_905 0x40
#define RF_FRFLSB_905 0x00
#define RF_FRFMSB_906 0xE2
#define RF_FRFMID_906 0x80
#define RF_FRFLSB_906 0x00
#define RF_FRFMSB_907 0xE2
#define RF_FRFMID_907 0xC0
#define RF_FRFLSB_907 0x00
#define RF_FRFMSB_908 0xE3
#define RF_FRFMID_908 0x00
#define RF_FRFLSB_908 0x00
#define RF_FRFMSB_909 0xE3
#define RF_FRFMID_909 0x40
#define RF_FRFLSB_909 0x00
#define RF_FRFMSB_910 0xE3
#define RF_FRFMID_910 0x80
#define RF_FRFLSB_910 0x00
#define RF_FRFMSB_911 0xE3
#define RF_FRFMID_911 0xC0
#define RF_FRFLSB_911 0x00
#define RF_FRFMSB_912 0xE4
#define RF_FRFMID_912 0x00
#define RF_FRFLSB_912 0x00
#define RF_FRFMSB_913 0xE4
#define RF_FRFMID_913 0x40
#define RF_FRFLSB_913 0x00
#define RF_FRFMSB_914 0xE4
#define RF_FRFMID_914 0x80
#define RF_FRFLSB_914 0x00
#define RF_FRFMSB_915 0xE4 // Default
#define RF_FRFMID_915 0xC0 // Default
#define RF_FRFLSB_915 0x00 // Default
#define RF_FRFMSB_916 0xE5
#define RF_FRFMID_916 0x00
#define RF_FRFLSB_916 0x00
#define RF_FRFMSB_917 0xE5
#define RF_FRFMID_917 0x40
#define RF_FRFLSB_917 0x00
#define RF_FRFMSB_918 0xE5
#define RF_FRFMID_918 0x80
#define RF_FRFLSB_918 0x00
#define RF_FRFMSB_919 0xE5
#define RF_FRFMID_919 0xC0
#define RF_FRFLSB_919 0x00
#define RF_FRFMSB_920 0xE6
#define RF_FRFMID_920 0x00
#define RF_FRFLSB_920 0x00
#define RF_FRFMSB_921 0xE6
#define RF_FRFMID_921 0x40
#define RF_FRFLSB_921 0x00
#define RF_FRFMSB_922 0xE6
#define RF_FRFMID_922 0x80
#define RF_FRFLSB_922 0x00
#define RF_FRFMSB_923 0xE6
#define RF_FRFMID_923 0xC0
#define RF_FRFLSB_923 0x00
#define RF_FRFMSB_924 0xE7
#define RF_FRFMID_924 0x00
#define RF_FRFLSB_924 0x00
#define RF_FRFMSB_925 0xE7
#define RF_FRFMID_925 0x40
#define RF_FRFLSB_925 0x00
#define RF_FRFMSB_926 0xE7
#define RF_FRFMID_926 0x80
#define RF_FRFLSB_926 0x00
#define RF_FRFMSB_927 0xE7
#define RF_FRFMID_927 0xC0
#define RF_FRFLSB_927 0x00
#define RF_FRFMSB_928 0xE8
#define RF_FRFMID_928 0x00
#define RF_FRFLSB_928 0x00
// RegOsc1
#define RF_OSC1_RCCAL_START 0x80
#define RF_OSC1_RCCAL_DONE 0x40
// RegAfcCtrl
#define RF_AFC_CTRL_STANDARD 0x00
#define RF_AFC_CTRL_IMPROVED 0x20
// RegLowBat
#define RF_LOWBAT_MONITOR 0x10
#define RF_LOWBAT_ON 0x08
#define RF_LOWBAT_OFF 0x00 // Default
#define RF_LOWBAT_TRIM_1695 0x00
#define RF_LOWBAT_TRIM_1764 0x01
#define RF_LOWBAT_TRIM_1835 0x02 // Default
#define RF_LOWBAT_TRIM_1905 0x03
#define RF_LOWBAT_TRIM_1976 0x04
#define RF_LOWBAT_TRIM_2045 0x05
#define RF_LOWBAT_TRIM_2116 0x06
#define RF_LOWBAT_TRIM_2185 0x07
// RegListen1
#define RF_LISTEN1_RESOL_64 0x50
#define RF_LISTEN1_RESOL_4100 0xA0 // Default
#define RF_LISTEN1_RESOL_262000 0xF0
#define RF_LISTEN1_RESOLIDLE_64 0x40
#define RF_LISTEN1_RESOLIDLE_4100 0x80 // Default
#define RF_LISTEN1_RESOLIDLE_262000 0xC0
#define RF_LISTEN1_RESOLRX_64 0x10
#define RF_LISTEN1_RESOLRX_4100 0x20 // Default
#define RF_LISTEN1_RESOLRX_262000 0x30
#define RF_LISTEN1_CRITERIA_RSSI 0x00 // Default
#define RF_LISTEN1_CRITERIA_RSSIANDSYNC 0x08
#define RF_LISTEN1_END_00 0x00
#define RF_LISTEN1_END_01 0x02 // Default
#define RF_LISTEN1_END_10 0x04
#define RF_LISTEN1_END_SWITCH_TO_RX 0x00
#define RF_LISTEN1_END_SWITCH_TO_MODE 0x02
#define RF_LISTEN1_END_STAY_LISTEN 0x04
// RegListen2
#define RF_LISTEN2_COEFIDLE_VALUE 0xF5 // Default
// RegListen3
#define RF_LISTEN3_COEFRX_VALUE 0x20 // Default
// RegVersion (Read Only)
#define RF_CHIP_ID 0x24
// RegPaLevel
#define RF_PALEVEL_PA0_ON 0x80 // Default
#define RF_PALEVEL_PA0_OFF 0x00
#define RF_PALEVEL_PA1_ON 0x40
#define RF_PALEVEL_PA1_OFF 0x00 // Default
#define RF_PALEVEL_PA2_ON 0x20
#define RF_PALEVEL_PA2_OFF 0x00 // Default
#define RF_PALEVEL_OUTPUTPOWER_00000 0x00
#define RF_PALEVEL_OUTPUTPOWER_00001 0x01
#define RF_PALEVEL_OUTPUTPOWER_00010 0x02
#define RF_PALEVEL_OUTPUTPOWER_00011 0x03
#define RF_PALEVEL_OUTPUTPOWER_00100 0x04
#define RF_PALEVEL_OUTPUTPOWER_00101 0x05
#define RF_PALEVEL_OUTPUTPOWER_00110 0x06
#define RF_PALEVEL_OUTPUTPOWER_00111 0x07
#define RF_PALEVEL_OUTPUTPOWER_01000 0x08
#define RF_PALEVEL_OUTPUTPOWER_01001 0x09
#define RF_PALEVEL_OUTPUTPOWER_01010 0x0A
#define RF_PALEVEL_OUTPUTPOWER_01011 0x0B
#define RF_PALEVEL_OUTPUTPOWER_01100 0x0C
#define RF_PALEVEL_OUTPUTPOWER_01101 0x0D
#define RF_PALEVEL_OUTPUTPOWER_01110 0x0E
#define RF_PALEVEL_OUTPUTPOWER_01111 0x0F
#define RF_PALEVEL_OUTPUTPOWER_10000 0x10
#define RF_PALEVEL_OUTPUTPOWER_10001 0x11
#define RF_PALEVEL_OUTPUTPOWER_10010 0x12
#define RF_PALEVEL_OUTPUTPOWER_10011 0x13
#define RF_PALEVEL_OUTPUTPOWER_10100 0x14
#define RF_PALEVEL_OUTPUTPOWER_10101 0x15
#define RF_PALEVEL_OUTPUTPOWER_10110 0x16
#define RF_PALEVEL_OUTPUTPOWER_10111 0x17
#define RF_PALEVEL_OUTPUTPOWER_11000 0x18
#define RF_PALEVEL_OUTPUTPOWER_11001 0x19
#define RF_PALEVEL_OUTPUTPOWER_11010 0x1A
#define RF_PALEVEL_OUTPUTPOWER_11011 0x1B
#define RF_PALEVEL_OUTPUTPOWER_11100 0x1C
#define RF_PALEVEL_OUTPUTPOWER_11101 0x1D
#define RF_PALEVEL_OUTPUTPOWER_11110 0x1E
#define RF_PALEVEL_OUTPUTPOWER_11111 0x1F // Default
// Minimum dBm that can be used to change an actual power level into a zero based number
#define RF_PALEVEL_PA0_OFFSET 18
#define RF_PALEVEL_PA1_OFFSET 18
#define RF_PALEVEL_PA1_PA2_OFFSET 14
#define RF_PALEVEL_PA1_PA2_HIGH_OFFSET 11
// RegPaRamp
#define RF_PARAMP_3400 0x00
#define RF_PARAMP_2000 0x01
#define RF_PARAMP_1000 0x02
#define RF_PARAMP_500 0x03
#define RF_PARAMP_250 0x04
#define RF_PARAMP_125 0x05
#define RF_PARAMP_100 0x06
#define RF_PARAMP_62 0x07
#define RF_PARAMP_50 0x08
#define RF_PARAMP_40 0x09 // Default
#define RF_PARAMP_31 0x0A
#define RF_PARAMP_25 0x0B
#define RF_PARAMP_20 0x0C
#define RF_PARAMP_15 0x0D
#define RF_PARAMP_12 0x0E
#define RF_PARAMP_10 0x0F
// RegOcp
#define RF_OCP_OFF 0x00
#define RF_OCP_ON 0x10 // Default
#define RF_OCP_TRIM_45 0x00
#define RF_OCP_TRIM_50 0x01
#define RF_OCP_TRIM_55 0x02
#define RF_OCP_TRIM_60 0x03
#define RF_OCP_TRIM_65 0x04
#define RF_OCP_TRIM_70 0x05
#define RF_OCP_TRIM_75 0x06
#define RF_OCP_TRIM_80 0x07
#define RF_OCP_TRIM_85 0x08
#define RF_OCP_TRIM_90 0x09
#define RF_OCP_TRIM_95 0x0A
#define RF_OCP_TRIM_100 0x0B // Default
#define RF_OCP_TRIM_105 0x0C
#define RF_OCP_TRIM_110 0x0D
#define RF_OCP_TRIM_115 0x0E
#define RF_OCP_TRIM_120 0x0F
// RegAgcRef
#define RF_AGCREF_AUTO_ON 0x40 // Default
#define RF_AGCREF_AUTO_OFF 0x00
#define RF_AGCREF_LEVEL_MINUS80 0x00 // Default
#define RF_AGCREF_LEVEL_MINUS81 0x01
#define RF_AGCREF_LEVEL_MINUS82 0x02
#define RF_AGCREF_LEVEL_MINUS83 0x03
#define RF_AGCREF_LEVEL_MINUS84 0x04
#define RF_AGCREF_LEVEL_MINUS85 0x05
#define RF_AGCREF_LEVEL_MINUS86 0x06
#define RF_AGCREF_LEVEL_MINUS87 0x07
#define RF_AGCREF_LEVEL_MINUS88 0x08
#define RF_AGCREF_LEVEL_MINUS89 0x09
#define RF_AGCREF_LEVEL_MINUS90 0x0A
#define RF_AGCREF_LEVEL_MINUS91 0x0B
#define RF_AGCREF_LEVEL_MINUS92 0x0C
#define RF_AGCREF_LEVEL_MINUS93 0x0D
#define RF_AGCREF_LEVEL_MINUS94 0x0E
#define RF_AGCREF_LEVEL_MINUS95 0x0F
#define RF_AGCREF_LEVEL_MINUS96 0x10
#define RF_AGCREF_LEVEL_MINUS97 0x11
#define RF_AGCREF_LEVEL_MINUS98 0x12
#define RF_AGCREF_LEVEL_MINUS99 0x13
#define RF_AGCREF_LEVEL_MINUS100 0x14
#define RF_AGCREF_LEVEL_MINUS101 0x15
#define RF_AGCREF_LEVEL_MINUS102 0x16
#define RF_AGCREF_LEVEL_MINUS103 0x17
#define RF_AGCREF_LEVEL_MINUS104 0x18
#define RF_AGCREF_LEVEL_MINUS105 0x19
#define RF_AGCREF_LEVEL_MINUS106 0x1A
#define RF_AGCREF_LEVEL_MINUS107 0x1B
#define RF_AGCREF_LEVEL_MINUS108 0x1C
#define RF_AGCREF_LEVEL_MINUS109 0x1D
#define RF_AGCREF_LEVEL_MINUS110 0x1E
#define RF_AGCREF_LEVEL_MINUS111 0x1F
#define RF_AGCREF_LEVEL_MINUS112 0x20
#define RF_AGCREF_LEVEL_MINUS113 0x21
#define RF_AGCREF_LEVEL_MINUS114 0x22
#define RF_AGCREF_LEVEL_MINUS115 0x23
#define RF_AGCREF_LEVEL_MINUS116 0x24
#define RF_AGCREF_LEVEL_MINUS117 0x25
#define RF_AGCREF_LEVEL_MINUS118 0x26
#define RF_AGCREF_LEVEL_MINUS119 0x27
#define RF_AGCREF_LEVEL_MINUS120 0x28
#define RF_AGCREF_LEVEL_MINUS121 0x29
#define RF_AGCREF_LEVEL_MINUS122 0x2A
#define RF_AGCREF_LEVEL_MINUS123 0x2B
#define RF_AGCREF_LEVEL_MINUS124 0x2C
#define RF_AGCREF_LEVEL_MINUS125 0x2D
#define RF_AGCREF_LEVEL_MINUS126 0x2E
#define RF_AGCREF_LEVEL_MINUS127 0x2F
#define RF_AGCREF_LEVEL_MINUS128 0x30
#define RF_AGCREF_LEVEL_MINUS129 0x31
#define RF_AGCREF_LEVEL_MINUS130 0x32
#define RF_AGCREF_LEVEL_MINUS131 0x33
#define RF_AGCREF_LEVEL_MINUS132 0x34
#define RF_AGCREF_LEVEL_MINUS133 0x35
#define RF_AGCREF_LEVEL_MINUS134 0x36
#define RF_AGCREF_LEVEL_MINUS135 0x37
#define RF_AGCREF_LEVEL_MINUS136 0x38
#define RF_AGCREF_LEVEL_MINUS137 0x39
#define RF_AGCREF_LEVEL_MINUS138 0x3A
#define RF_AGCREF_LEVEL_MINUS139 0x3B
#define RF_AGCREF_LEVEL_MINUS140 0x3C
#define RF_AGCREF_LEVEL_MINUS141 0x3D
#define RF_AGCREF_LEVEL_MINUS142 0x3E
#define RF_AGCREF_LEVEL_MINUS143 0x3F
// RegAgcThresh1
#define RF_AGCTHRESH1_SNRMARGIN_000 0x00
#define RF_AGCTHRESH1_SNRMARGIN_001 0x20
#define RF_AGCTHRESH1_SNRMARGIN_010 0x40
#define RF_AGCTHRESH1_SNRMARGIN_011 0x60
#define RF_AGCTHRESH1_SNRMARGIN_100 0x80
#define RF_AGCTHRESH1_SNRMARGIN_101 0xA0 // Default
#define RF_AGCTHRESH1_SNRMARGIN_110 0xC0
#define RF_AGCTHRESH1_SNRMARGIN_111 0xE0
#define RF_AGCTHRESH1_STEP1_0 0x00
#define RF_AGCTHRESH1_STEP1_1 0x01
#define RF_AGCTHRESH1_STEP1_2 0x02
#define RF_AGCTHRESH1_STEP1_3 0x03
#define RF_AGCTHRESH1_STEP1_4 0x04
#define RF_AGCTHRESH1_STEP1_5 0x05
#define RF_AGCTHRESH1_STEP1_6 0x06
#define RF_AGCTHRESH1_STEP1_7 0x07
#define RF_AGCTHRESH1_STEP1_8 0x08
#define RF_AGCTHRESH1_STEP1_9 0x09
#define RF_AGCTHRESH1_STEP1_10 0x0A
#define RF_AGCTHRESH1_STEP1_11 0x0B
#define RF_AGCTHRESH1_STEP1_12 0x0C
#define RF_AGCTHRESH1_STEP1_13 0x0D
#define RF_AGCTHRESH1_STEP1_14 0x0E
#define RF_AGCTHRESH1_STEP1_15 0x0F
#define RF_AGCTHRESH1_STEP1_16 0x10 // Default
#define RF_AGCTHRESH1_STEP1_17 0x11
#define RF_AGCTHRESH1_STEP1_18 0x12
#define RF_AGCTHRESH1_STEP1_19 0x13
#define RF_AGCTHRESH1_STEP1_20 0x14
#define RF_AGCTHRESH1_STEP1_21 0x15
#define RF_AGCTHRESH1_STEP1_22 0x16
#define RF_AGCTHRESH1_STEP1_23 0x17
#define RF_AGCTHRESH1_STEP1_24 0x18
#define RF_AGCTHRESH1_STEP1_25 0x19
#define RF_AGCTHRESH1_STEP1_26 0x1A
#define RF_AGCTHRESH1_STEP1_27 0x1B
#define RF_AGCTHRESH1_STEP1_28 0x1C
#define RF_AGCTHRESH1_STEP1_29 0x1D
#define RF_AGCTHRESH1_STEP1_30 0x1E
#define RF_AGCTHRESH1_STEP1_31 0x1F
// RegAgcThresh2
#define RF_AGCTHRESH2_STEP2_0 0x00
#define RF_AGCTHRESH2_STEP2_1 0x10
#define RF_AGCTHRESH2_STEP2_2 0x20
#define RF_AGCTHRESH2_STEP2_3 0x30
#define RF_AGCTHRESH2_STEP2_4 0x40
#define RF_AGCTHRESH2_STEP2_5 0x50
#define RF_AGCTHRESH2_STEP2_6 0x60
#define RF_AGCTHRESH2_STEP2_7 0x70 // Default
#define RF_AGCTHRESH2_STEP2_8 0x80
#define RF_AGCTHRESH2_STEP2_9 0x90
#define RF_AGCTHRESH2_STEP2_10 0xA0
#define RF_AGCTHRESH2_STEP2_11 0xB0
#define RF_AGCTHRESH2_STEP2_12 0xC0
#define RF_AGCTHRESH2_STEP2_13 0xD0
#define RF_AGCTHRESH2_STEP2_14 0xE0
#define RF_AGCTHRESH2_STEP2_15 0xF0
#define RF_AGCTHRESH2_STEP3_0 0x00
#define RF_AGCTHRESH2_STEP3_1 0x01
#define RF_AGCTHRESH2_STEP3_2 0x02
#define RF_AGCTHRESH2_STEP3_3 0x03
#define RF_AGCTHRESH2_STEP3_4 0x04
#define RF_AGCTHRESH2_STEP3_5 0x05
#define RF_AGCTHRESH2_STEP3_6 0x06
#define RF_AGCTHRESH2_STEP3_7 0x07
#define RF_AGCTHRESH2_STEP3_8 0x08
#define RF_AGCTHRESH2_STEP3_9 0x09
#define RF_AGCTHRESH2_STEP3_10 0x0A
#define RF_AGCTHRESH2_STEP3_11 0x0B // Default
#define RF_AGCTHRESH2_STEP3_12 0x0C
#define RF_AGCTHRESH2_STEP3_13 0x0D
#define RF_AGCTHRESH2_STEP3_14 0x0E
#define RF_AGCTHRESH2_STEP3_15 0x0F
// RegAgcThresh3
#define RF_AGCTHRESH3_STEP4_0 0x00
#define RF_AGCTHRESH3_STEP4_1 0x10
#define RF_AGCTHRESH3_STEP4_2 0x20
#define RF_AGCTHRESH3_STEP4_3 0x30
#define RF_AGCTHRESH3_STEP4_4 0x40
#define RF_AGCTHRESH3_STEP4_5 0x50
#define RF_AGCTHRESH3_STEP4_6 0x60
#define RF_AGCTHRESH3_STEP4_7 0x70
#define RF_AGCTHRESH3_STEP4_8 0x80
#define RF_AGCTHRESH3_STEP4_9 0x90 // Default
#define RF_AGCTHRESH3_STEP4_10 0xA0
#define RF_AGCTHRESH3_STEP4_11 0xB0
#define RF_AGCTHRESH3_STEP4_12 0xC0
#define RF_AGCTHRESH3_STEP4_13 0xD0
#define RF_AGCTHRESH3_STEP4_14 0xE0
#define RF_AGCTHRESH3_STEP4_15 0xF0
#define RF_AGCTHRESH3_STEP5_0 0x00
#define RF_AGCTHRESH3_STEP5_1 0x01
#define RF_AGCTHRESH3_STEP5_2 0x02
#define RF_AGCTHRESH3_STEP5_3 0x03
#define RF_AGCTHRESH3_STEP5_4 0x04
#define RF_AGCTHRESH3_STEP5_5 0x05
#define RF_AGCTHRESH3_STEP5_6 0x06
#define RF_AGCTHRESH3_STEP5_7 0x07
#define RF_AGCTHRES33_STEP5_8 0x08
#define RF_AGCTHRESH3_STEP5_9 0x09
#define RF_AGCTHRESH3_STEP5_10 0x0A
#define RF_AGCTHRESH3_STEP5_11 0x0B // Default
#define RF_AGCTHRESH3_STEP5_12 0x0C
#define RF_AGCTHRESH3_STEP5_13 0x0D
#define RF_AGCTHRESH3_STEP5_14 0x0E
#define RF_AGCTHRESH3_STEP5_15 0x0F
// RegLna
#define RF_LNA_ZIN_50 0x00
#define RF_LNA_ZIN_200 0x80 // Default
#define RF_LNA_LOWPOWER_OFF 0x00 // Default
#define RF_LNA_LOWPOWER_ON 0x40
#define RF_LNA_CURRENTGAIN 0x38
#define RF_LNA_GAINSELECT_AUTO 0x00 // Default
#define RF_LNA_GAINSELECT_MAX 0x01
#define RF_LNA_GAINSELECT_MAXMINUS6 0x02
#define RF_LNA_GAINSELECT_MAXMINUS12 0x03
#define RF_LNA_GAINSELECT_MAXMINUS24 0x04
#define RF_LNA_GAINSELECT_MAXMINUS36 0x05
#define RF_LNA_GAINSELECT_MAXMINUS48 0x06
// RegRxBw
#define RF_RXBW_DCCFREQ_000 0x00
#define RF_RXBW_DCCFREQ_001 0x20
#define RF_RXBW_DCCFREQ_010 0x40 // Default
#define RF_RXBW_DCCFREQ_011 0x60
#define RF_RXBW_DCCFREQ_100 0x80
#define RF_RXBW_DCCFREQ_101 0xA0
#define RF_RXBW_DCCFREQ_110 0xC0
#define RF_RXBW_DCCFREQ_111 0xE0
#define RF_RXBW_MANT_16 0x00
#define RF_RXBW_MANT_20 0x08
#define RF_RXBW_MANT_24 0x10 // Default
#define RF_RXBW_EXP_0 0x00
#define RF_RXBW_EXP_1 0x01
#define RF_RXBW_EXP_2 0x02
#define RF_RXBW_EXP_3 0x03
#define RF_RXBW_EXP_4 0x04
#define RF_RXBW_EXP_5 0x05 // Default
#define RF_RXBW_EXP_6 0x06
#define RF_RXBW_EXP_7 0x07
// RegAfcBw
#define RF_AFCBW_DCCFREQAFC_000 0x00
#define RF_AFCBW_DCCFREQAFC_001 0x20
#define RF_AFCBW_DCCFREQAFC_010 0x40
#define RF_AFCBW_DCCFREQAFC_011 0x60
#define RF_AFCBW_DCCFREQAFC_100 0x80 // Default
#define RF_AFCBW_DCCFREQAFC_101 0xA0
#define RF_AFCBW_DCCFREQAFC_110 0xC0
#define RF_AFCBW_DCCFREQAFC_111 0xE0
#define RF_AFCBW_MANTAFC_16 0x00
#define RF_AFCBW_MANTAFC_20 0x08 // Default
#define RF_AFCBW_MANTAFC_24 0x10
#define RF_AFCBW_EXPAFC_0 0x00
#define RF_AFCBW_EXPAFC_1 0x01
#define RF_AFCBW_EXPAFC_2 0x02
#define RF_AFCBW_EXPAFC_3 0x03 // Default
#define RF_AFCBW_EXPAFC_4 0x04
#define RF_AFCBW_EXPAFC_5 0x05
#define RF_AFCBW_EXPAFC_6 0x06
#define RF_AFCBW_EXPAFC_7 0x07
// RegOokPeak
#define RF_OOKPEAK_THRESHTYPE_FIXED 0x00
#define RF_OOKPEAK_THRESHTYPE_PEAK 0x40 // Default
#define RF_OOKPEAK_THRESHTYPE_AVERAGE 0x80
#define RF_OOKPEAK_PEAKTHRESHSTEP_000 0x00 // Default
#define RF_OOKPEAK_PEAKTHRESHSTEP_001 0x08
#define RF_OOKPEAK_PEAKTHRESHSTEP_010 0x10
#define RF_OOKPEAK_PEAKTHRESHSTEP_011 0x18
#define RF_OOKPEAK_PEAKTHRESHSTEP_100 0x20
#define RF_OOKPEAK_PEAKTHRESHSTEP_101 0x28
#define RF_OOKPEAK_PEAKTHRESHSTEP_110 0x30
#define RF_OOKPEAK_PEAKTHRESHSTEP_111 0x38
#define RF_OOKPEAK_PEAKTHRESHDEC_000 0x00 // Default
#define RF_OOKPEAK_PEAKTHRESHDEC_001 0x01
#define RF_OOKPEAK_PEAKTHRESHDEC_010 0x02
#define RF_OOKPEAK_PEAKTHRESHDEC_011 0x03
#define RF_OOKPEAK_PEAKTHRESHDEC_100 0x04
#define RF_OOKPEAK_PEAKTHRESHDEC_101 0x05
#define RF_OOKPEAK_PEAKTHRESHDEC_110 0x06
#define RF_OOKPEAK_PEAKTHRESHDEC_111 0x07
// RegOokAvg
#define RF_OOKAVG_AVERAGETHRESHFILT_00 0x00
#define RF_OOKAVG_AVERAGETHRESHFILT_01 0x40