You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
The drmemtrace scheduler has a regions-of-interest feature to specify subsets of a trace via instruction ordinal ranges. However, for a many-threaded trace, if these subsets should cut across all threads that were active at the same time during traces, computing the instruction ordinals for each thread requires a separate pass over every thread's trace. A simpler interface would be to provide a single timestamp range for the whole workload and have the scheduler use the recorded schedule file to map that to per-thread instruction ordinals.
The text was updated successfully, but these errors were encountered:
Adds a new feature times_of_interest to the drmemtrace scheduler.
This allows specifying regions of interest via timestamps, which cut
across all inputs in a workload, providing for a consistent starting
point across all threads.
The feature requires a cpu schedule file which is used to build a
mapping from timestamps to instruction ordinals. The mapping is not
perfect due to collapsed consecutive entries and coarse-grained
timestamps so interpolation is used in between known points.
Adds a unit test.
Adds a new analyzer command-line option -skip_to_timestamp which sets
a single time-of-interest in the scheduler. Adds a test using the
checked-in threadsig x86_64 trace.
Fixes#6844
The drmemtrace scheduler has a regions-of-interest feature to specify subsets of a trace via instruction ordinal ranges. However, for a many-threaded trace, if these subsets should cut across all threads that were active at the same time during traces, computing the instruction ordinals for each thread requires a separate pass over every thread's trace. A simpler interface would be to provide a single timestamp range for the whole workload and have the scheduler use the recorded schedule file to map that to per-thread instruction ordinals.
The text was updated successfully, but these errors were encountered: