/
OMRCodeGenerator.hpp
1974 lines (1565 loc) · 91.4 KB
/
OMRCodeGenerator.hpp
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/*******************************************************************************
* Copyright (c) 2000, 2019 IBM Corp. and others
*
* This program and the accompanying materials are made available under
* the terms of the Eclipse Public License 2.0 which accompanies this
* distribution and is available at http://eclipse.org/legal/epl-2.0
* or the Apache License, Version 2.0 which accompanies this distribution
* and is available at https://www.apache.org/licenses/LICENSE-2.0.
*
* This Source Code may also be made available under the following Secondary
* Licenses when the conditions for such availability set forth in the
* Eclipse Public License, v. 2.0 are satisfied: GNU General Public License,
* version 2 with the GNU Classpath Exception [1] and GNU General Public
* License, version 2 with the OpenJDK Assembly Exception [2].
*
* [1] https://www.gnu.org/software/classpath/license.html
* [2] http://openjdk.java.net/legal/assembly-exception.html
*
* SPDX-License-Identifier: EPL-2.0 OR Apache-2.0 OR GPL-2.0 WITH Classpath-exception-2.0 OR LicenseRef-GPL-2.0 WITH Assembly-exception
*******************************************************************************/
#ifndef OMR_CODEGENERATOR_INCL
#define OMR_CODEGENERATOR_INCL
/*
* The following #define and typedef must appear before any #includes in this file
*/
#ifndef OMR_CODEGENERATOR_CONNECTOR
#define OMR_CODEGENERATOR_CONNECTOR
namespace OMR { class CodeGenerator; }
namespace OMR { typedef OMR::CodeGenerator CodeGeneratorConnector; }
#endif
#include <limits.h>
#include <stddef.h>
#include <stdint.h>
#include <map>
#include "codegen/CodeGenPhase.hpp"
#include "codegen/FrontEnd.hpp"
#include "codegen/LinkageConventionsEnum.hpp"
#include "codegen/RecognizedMethods.hpp"
#include "codegen/RegisterConstants.hpp"
#include "codegen/StorageInfo.hpp"
#include "codegen/TreeEvaluator.hpp"
#include "compile/Compilation.hpp"
#include "compile/SymbolReferenceTable.hpp"
#include "control/Options.hpp"
#include "control/Options_inlines.hpp"
#include "cs2/hashtab.h"
#include "env/CompilerEnv.hpp"
#include "env/ObjectModel.hpp"
#include "env/TRMemory.hpp"
#include "env/jittypes.h"
#include "il/DataTypes.hpp"
#include "il/ILOpCodes.hpp"
#include "il/ILOps.hpp"
#include "il/Node.hpp"
#include "infra/Array.hpp"
#include "infra/Assert.hpp"
#include "infra/Flags.hpp"
#include "infra/HashTab.hpp"
#include "infra/Link.hpp"
#include "infra/List.hpp"
#include "infra/TRlist.hpp"
#include "infra/Random.hpp"
#include "infra/Stack.hpp"
#include "optimizer/Dominators.hpp"
#include "ras/DebugCounter.hpp"
#include "runtime/Runtime.hpp"
#include "codegen/StaticRelocation.hpp"
#define OPT_DETAILS_CA "O^O COMPLETE ALIASING: "
#define NEED_CC(n) (n->nodeRequiresConditionCodes())
class TR_BackingStore;
class TR_BitVector;
class TR_GCStackMap;
class TR_InterferenceGraph;
class TR_LiveReference;
class TR_LiveRegisters;
class TR_OSRMethodData;
class TR_PseudoRegister;
class TR_RegisterCandidate;
class TR_RegisterCandidates;
namespace TR { class Relocation; }
namespace TR { class RelocationDebugInfo; }
class TR_ResolvedMethod;
class TR_ScratchRegisterManager;
namespace TR { class GCStackAtlas; }
namespace OMR { class RegisterUsage; }
namespace TR { class AheadOfTimeCompile; }
namespace TR { class AutomaticSymbol; }
namespace TR { class Block; }
namespace TR { class CodeCache; }
namespace TR { class CodeGenerator; }
namespace TR { class Instruction; }
namespace TR { class LabelSymbol; }
namespace TR { class Linkage; }
namespace TR { class MemoryReference; }
namespace TR { class RealRegister; }
namespace TR { class Recompilation; }
namespace TR { class Register; }
namespace TR { class RegisterDependencyConditions; }
namespace TR { class RegisterIterator; }
namespace TR { class RegisterPair; }
namespace TR { class Snippet; }
namespace TR { class Symbol; }
namespace TR { class SymbolReference; }
namespace TR { class SymbolReferenceTable; }
namespace TR { class TreeTop; }
typedef TR::SparseBitVector SharedSparseBitVector;
enum TR_SpillKinds // For register pressure simulation
{
// Mandatory spill kinds are certain to cause a spill to memory
//
TR_gprSpill, // All integer regs
TR_fprSpill, // All floating-point regs
TR_vrfSpill, // All vector regs
TR_vmThreadSpill, // The VMThread reg
TR_numMandatorySpillKinds,
// Probable spill kinds are likely to cause a spill to memory, but may spill
// to another free register instead
//
TR_volatileSpill // Regs not preserved across calls
= TR_numMandatorySpillKinds,
#if defined(TR_TARGET_X86)
TR_edxSpill, // Used by multiply and divide
#endif
#if defined(TR_TARGET_S390)
TR_litPoolSpill,
TR_staticBaseSpill,
TR_gpr0Spill,
TR_gpr1Spill,
TR_gpr2Spill,
TR_gpr3Spill,
TR_gpr4Spill,
TR_gpr5Spill,
TR_gpr6Spill,
TR_gpr7Spill,
TR_gpr8Spill,
TR_gpr9Spill,
TR_gpr10Spill,
TR_gpr11Spill,
TR_gpr12Spill,
TR_gpr13Spill,
TR_gpr14Spill,
TR_gpr15Spill,
#endif
TR_linkageSpill, // Regs used to pass arguments
TR_numProbableSpillKinds, // Includes the mandatory spills
// The other spill kinds are more likely to cause register shuffling
//
#if defined(TR_TARGET_X86)
TR_eaxSpill // Used by multiply and divide
= TR_numProbableSpillKinds,
TR_ecxSpill, // Used by shifts
TR_numSpillKinds
#else
TR_numSpillKinds
= TR_numProbableSpillKinds
#endif
};
enum TR_NOPKind
{
TR_NOPStandard, // Used to generate a normal NOP instruction
TR_NOPEndGroup, // Used to generate a NOP that ends an instruction group (P6 uses this)
TR_ProbeNOP // Used in P8 and higher for RI
};
class TR_ClobberEvalData
{
// NOTE:
// No TR_Memory type defined for this class
// since original use was to use as a stack-alloc'd object
// If you're thinking of using it more widely, please
// update the class definition to include something like:
// TR_ALLOC(TR_Memory::ClobberEvalData)
private:
flags8_t _flags;
public:
TR_ClobberEvalData()
{ }
bool isPair()
{
return _flags.testAny(Pair);
}
bool canClobberLowWord()
{
return _flags.testAny(ClobberLowWord);
};
bool canClobberHighWord()
{
return _flags.testAny(ClobberHighWord);
}
void setPair()
{
_flags.set(Pair);
}
void setClobberLowWord()
{
_flags.set(ClobberLowWord);
}
void setClobberHighWord()
{
_flags.set(ClobberHighWord);
}
private:
enum
{
Pair = 0x01,
ClobberLowWord = 0x02,
ClobberHighWord = 0x04
};
};
namespace TR
{
enum ExternalRelocationPositionRequest
{
ExternalRelocationAtFront,
ExternalRelocationAtBack,
};
}
namespace OMR
{
class OMR_EXTENSIBLE CodeGenerator
{
private:
TR::Compilation *_compilation;
TR_Memory *_trMemory;
TR::Machine *_machine;
TR_BitVector *_liveLocals;
TR::TreeTop *_currentEvaluationTreeTop;
TR::Block *_currentEvaluationBlock;
uint32_t _prePrologueSize;
TR::Instruction *_implicitExceptionPoint;
bool areMergeableGuards(TR::Instruction *earlierGuard, TR::Instruction *laterGuard);
protected:
TR_BitVector *_localsThatAreStored;
int32_t _numLocalsWhenStoreAnalysisWasDone;
List<TR_Pair<TR::Node, int32_t> > _ialoadUnneeded;
public:
TR_ALLOC(TR_Memory::CodeGenerator)
inline TR::CodeGenerator *self();
TR_StackMemory trStackMemory();
TR_Memory *trMemory() { return _trMemory; }
TR_HeapMemory trHeapMemory() { return _trMemory; }
TR::Machine *machine() { return _machine; }
TR::Compilation *comp() { return _compilation; }
TR_FrontEnd *fe();
TR_Debug *getDebug();
void uncommonCallConstNodes();
void preLowerTrees();
void postLowerTrees() {}
TR::TreeTop *lowerTree(TR::Node *root, TR::TreeTop *tt);
void lowerTrees();
void lowerTreesWalk(TR::Node * parent, TR::TreeTop * treeTop, vcount_t visitCount);
void lowerTreeIfNeeded(TR::Node *node, int32_t childNumber, TR::Node *parent, TR::TreeTop *tt);
void lowerTreesPreTreeTopVisit(TR::TreeTop *tt, vcount_t visitCount);
void lowerTreesPostTreeTopVisit(TR::TreeTop *tt, vcount_t visitCount);
void lowerTreesPreChildrenVisit(TR::Node * parent, TR::TreeTop * treeTop, vcount_t visitCount);
void lowerTreesPostChildrenVisit(TR::Node * parent, TR::TreeTop * treeTop, vcount_t visitCount);
void lowerTreesPropagateBlockToNode(TR::Node *node);
void setUpForInstructionSelection();
void doInstructionSelection();
void createStackAtlas();
void beginInstructionSelection() {}
void endInstructionSelection() {}
bool use64BitRegsOn32Bit();
TR::Register *evaluate(TR::Node *node);
// Main entry point for code generation from IL trees. Override this function
// to provide customized code generation functionality.
//
bool generateCodeFromIL();
uint32_t getPrePrologueSize() {return _prePrologueSize;}
uint32_t setPrePrologueSize(uint32_t s) {return (_prePrologueSize = s);}
TR_BitVector *getLiveLocals() {return _liveLocals;}
TR_BitVector *setLiveLocals(TR_BitVector *v) {return (_liveLocals = v);}
/**
* @brief Returns the first TR::Instruction in the stream of instructions for
* this method. This instruction's "previous" link should be NULL.
*
* @return The first instruction in this method; NULL if not yet set.
*/
TR::Instruction *getFirstInstruction() {return _firstInstruction;}
/**
* @brief Sets the first TR::Instruction in the stream of instructions for
* this method. This instruction's "previous" link should be NULL.
*
* @return The instruction being set.
*/
TR::Instruction *setFirstInstruction(TR::Instruction *fi) {return (_firstInstruction = fi);}
/**
* @brief Returns the last TR::Instruction in the stream of instructions for
* this method. This instruction's "next" link should be NULL.
*
* @return The last instruction in this method; NULL if not yet set.
*/
TR::Instruction *getAppendInstruction() {return _appendInstruction;}
/**
* @brief Sets the last TR::Instruction in the stream of instructions for
* this method. This instruction's "next" link should be NULL.
*
* @return The instruction being set.
*/
TR::Instruction *setAppendInstruction(TR::Instruction *ai) {return (_appendInstruction = ai);}
TR::TreeTop *getCurrentEvaluationTreeTop() {return _currentEvaluationTreeTop;}
TR::TreeTop *setCurrentEvaluationTreeTop(TR::TreeTop *tt) {return (_currentEvaluationTreeTop = tt);}
TR::Block *getCurrentEvaluationBlock() {return _currentEvaluationBlock;}
TR::Block *setCurrentEvaluationBlock(TR::Block *tt) {return (_currentEvaluationBlock = tt);}
TR::Instruction *getImplicitExceptionPoint() {return _implicitExceptionPoint;}
TR::Instruction *setImplicitExceptionPoint(TR::Instruction *p) {return (_implicitExceptionPoint = p);}
void setNextAvailableBlockIndex(int32_t blockIndex) {}
int32_t getNextAvailableBlockIndex() { return -1; }
bool supportsMethodEntryPadding() { return true; }
bool mustGenerateSwitchToInterpreterPrePrologue() { return false; }
bool buildInterpreterEntryPoint() { return false; }
void generateCatchBlockBBStartPrologue(TR::Node *node, TR::Instruction *fenceInstruction) { return; }
bool supportsUnneededLabelRemoval() { return true; }
bool allowSplitWarmAndColdBlocks() { return false; }
TR_HasRandomGenerator randomizer;
/** \brief
* Determines whether the code generator supports inlining intrinsics for \p symbol.
*
* \param symbol
* The symbol which to check.
*
* \return
* \c true if intrinsics on \p symbol are supported; \c false otherwise.
*/
bool supportsNonHelper(TR::SymbolReferenceTable::CommonNonhelperSymbol symbol)
{
return false;
}
bool hasTMEvaluator() {return false;}
// --------------------------------------------------------------------------
// Infrastructure
//
TR_PersistentMemory * trPersistentMemory();
TR::SymbolReferenceTable * getSymRefTab() { return _symRefTab; }
TR::SymbolReference * getSymRef(TR_RuntimeHelper h);
TR::SymbolReferenceTable *symRefTab() { return _symRefTab; }
TR::Linkage *linkage() {return _bodyLinkage;}
// --------------------------------------------------------------------------
// Code Generator Phases
//
void generateCode();
void doRegisterAssignment(TR_RegisterKinds kindsToAssign);
void doBinaryEncoding();
void doPeephole() { return; }
bool hasComplexAddressingMode() { return false; }
void removeUnusedLocals();
void identifyUnneededByteConvNodes(TR::Node*, TR::TreeTop *, vcount_t, TR::DataType);
void identifyUnneededByteConvNodes();
TR::CodeGenPhase& getCodeGeneratorPhase() {return _codeGenPhase;}
void prepareNodeForInstructionSelection(TR::Node*node);
void remapGCIndicesInInternalPtrFormat();
void processRelocations();
void findAndFixCommonedReferences();
void findCommonedReferences(TR::Node*node, TR::TreeTop *treeTop);
void processReference(TR::Node*reference, TR::Node*parent, TR::TreeTop *treeTop);
void spillLiveReferencesToTemps(TR::TreeTop *insertionTree, std::list<TR::SymbolReference*, TR::typed_allocator<TR::SymbolReference*, TR::Allocator> >::iterator firstAvailableSpillTemp);
void needSpillTemp(TR_LiveReference * cursor, TR::Node*parent, TR::TreeTop *treeTop);
friend void OMR::CodeGenPhase::performEmitSnippetsPhase(TR::CodeGenerator*, TR::CodeGenPhase *);
friend void OMR::CodeGenPhase::performCleanUpFlagsPhase(TR::CodeGenerator * cg, TR::CodeGenPhase * phase);
// --------------------------------------------------------------------------
// Hardware profiling
//
void createHWPRecords() {}
// --------------------------------------------------------------------------
// Tree evaluation
//
static TR_TreeEvaluatorFunctionPointer *getTreeEvaluatorTable() {return _nodeToInstrEvaluators;}
int32_t getEvaluationPriority(TR::Node*node);
int32_t whichNodeToEvaluate(TR::Node*first, TR::Node* second); // Decide which of two nodes should be evaluated first.
int32_t whichChildToEvaluate(TR::Node*node); // Decide which child of the given node should be evaluated first.
// Convert a multiply tree node to a shift if possible.
// Note that for a negative constant the negation of the shifted value is
// not done, the caller must insert it after evaluating the shift node.
// Returns "true" if the conversion was done.
//
bool convertMultiplyToShift(TR::Node*node);
// See if the tree represents an operation on a memory location.
//
bool isMemoryUpdate(TR::Node*node);
// Find the magic values for turning a divide by a constant into multiply and shift
void compute32BitMagicValues(int32_t d, int32_t *m, int32_t *s);
void compute64BitMagicValues(int64_t d, int64_t *m, int64_t *s);
uint64_t computeUnsigned64BitMagicValues(uint64_t d, int32_t *s, int32_t* a);
rcount_t incReferenceCount(TR::Node*node);
rcount_t decReferenceCount(TR::Node*node);
rcount_t recursivelyDecReferenceCount(TR::Node*node);
void evaluateChildrenWithMultipleRefCount(TR::Node*node);
void incRefCountForOpaquePseudoRegister(TR::Node * node, TR::CodeGenerator * cg, TR::Compilation * comp) {}
//OVERLOAD THE ABOVE FUNCTION:
void incRefCountForOpaquePseudoRegister(TR::Node * node) {}
void startUsingRegister(TR::Register *reg);
void stopUsingRegister(TR::Register *reg);
void setCurrentBlockIndex(int32_t blockIndex) { }
int32_t getCurrentBlockIndex() { return -1; }
TR::Instruction *lastInstructionBeforeCurrentEvaluationTreeTop()
{
return _lastInstructionBeforeCurrentEvaluationTreeTop;
}
void setLastInstructionBeforeCurrentEvaluationTreeTop(TR::Instruction *instr)
{
_lastInstructionBeforeCurrentEvaluationTreeTop = instr;
}
bool useClobberEvaluate();
bool canClobberNodesRegister(TR::Node* node, uint16_t count = 1,
TR_ClobberEvalData * data = NULL, bool ignoreRefCount = false);
bool isRegisterClobberable(TR::Register *reg, uint16_t count);
// ilgen
/**
* @brief Returns if an IL OpCode is supported by current CodeGen
*
* @param op The IL OpCode being checked.
*
* @return True if the IL OpCode is supported otherwise false.
*/
static bool isILOpCodeSupported(TR::ILOpCodes op);
/**
* @brief Returns the corresponding IL OpCode for an intrinsic method
*
* This query maps an intrinsic method to an IL OpCode, with the requirement that
* the method's child(ren) corresponds to the OpCode's child(ren) exactly.
* It is usually used by the IL Gen transforming the intrinsic method to IL OpCode
* so that it can leverage existing framework for better optimization.
*
* @param method The intrinsic method being checked.
*
* @return The corresponding IL OpCode for the intrinsic method.
*/
static TR::ILOpCodes ilOpCodeForIntrinsicMethod(TR::RecognizedMethod method) { return TR::BadILOp; }
/**
* @brief Returns if an intrinsic method is supported by current CodeGen
*
* @param method The intrinsic method being checked.
*
* @return True if the intrinsic method is supported otherwise false.
*/
static inline bool isIntrinsicMethodSupported(TR::RecognizedMethod method);
TR::Recompilation *allocateRecompilationInfo() { return NULL; }
/**
* @brief This determines if it is necessary to emit a prefetch instruction.
* If so, it also emits the prefetch instruction.
*
* @param node The node being evaluated.
* @param targetRegister A register holding the address where the prefetch location is generated from.
*/
void insertPrefetchIfNecessary(TR::Node *node, TR::Register *targetRegister);
// --------------------------------------------------------------------------
// Capabilities
//
bool supports32bitAiadd() {return true;}
bool supportsMergingGuards() {return false;}
// --------------------------------------------------------------------------
// Z only
//
TR::list<uint8_t*>& getBreakPointList() {return _breakPointList;}
void addBreakPointAddress(uint8_t *b) {_breakPointList.push_front(b);}
bool AddArtificiallyInflatedNodeToStack(TR::Node* n);
// --------------------------------------------------------------------------
// P only
//
intptrj_t hiValue(intptrj_t address);
// --------------------------------------------------------------------------
// Lower trees
//
void rematerializeCmpUnderTernary(TR::Node*node);
bool yankIndexScalingOp() {return false;}
void cleanupFlags(TR::Node*node);
bool shouldYankCompressedRefs() { return false; }
bool materializesHeapBase() { return true; }
bool canFoldLargeOffsetInAddressing() { return false; }
void insertDebugCounters();
// --------------------------------------------------------------------------
// Instruction selection
//
void setUpStackSizeForCallNode(TR::Node * node);
// --------------------------------------------------------------------------
// Debug counters
//
TR::Instruction *generateDebugCounter(const char *name, int32_t delta = 1, int8_t fidelity = TR::DebugCounter::Undetermined);
TR::Instruction *generateDebugCounter(const char *name, TR::Register *deltaReg, int8_t fidelity = TR::DebugCounter::Undetermined);
TR::Instruction *generateDebugCounter(TR::Instruction *cursor, const char *name, int32_t delta = 1, int8_t fidelity = TR::DebugCounter::Undetermined, int32_t staticDelta = 1);
TR::Instruction *generateDebugCounter(TR::Instruction *cursor, const char *name, TR::Register *deltaReg, int8_t fidelity = TR::DebugCounter::Undetermined, int32_t staticDelta = 1);
TR::Instruction *generateDebugCounter(const char *name, TR::RegisterDependencyConditions &cond, int32_t delta = 1, int8_t fidelity = TR::DebugCounter::Undetermined, int32_t staticDelta = 1, TR::Instruction *cursor = NULL);
TR::Instruction *generateDebugCounter(const char *name, TR::Register *deltaReg, TR::RegisterDependencyConditions &cond, int8_t fidelity = TR::DebugCounter::Undetermined, int32_t staticDelta = 1, TR::Instruction *cursor = NULL);
TR::Instruction *generateDebugCounter(const char *name, TR_ScratchRegisterManager &srm, int32_t delta = 1, int8_t fidelity = TR::DebugCounter::Undetermined, int32_t staticDelta = 1, TR::Instruction *cursor = NULL);
TR::Instruction *generateDebugCounter(const char *name, TR::Register *deltaReg, TR_ScratchRegisterManager &srm, int8_t fidelity = TR::DebugCounter::Undetermined, int32_t staticDelta = 1, TR::Instruction *cursor = NULL);
TR::Instruction *generateDebugCounterBump(TR::Instruction *cursor, TR::DebugCounterBase *counter, int32_t delta, TR::RegisterDependencyConditions *cond){ return cursor; }
TR::Instruction *generateDebugCounterBump(TR::Instruction *cursor, TR::DebugCounterBase *counter, TR::Register *deltaReg, TR::RegisterDependencyConditions *cond){ return cursor; }
TR::Instruction *generateDebugCounterBump(TR::Instruction *cursor, TR::DebugCounterBase *counter, int32_t delta, TR_ScratchRegisterManager &srm){ return cursor; }
TR::Instruction *generateDebugCounterBump(TR::Instruction *cursor, TR::DebugCounterBase *counter, TR::Register *deltaReg, TR_ScratchRegisterManager &srm){ return cursor; }
// --------------------------------------------------------------------------
// Linkage
//
void initializeLinkage();
TR::Linkage *createLinkage(TR_LinkageConventions lc);
TR::Linkage *createLinkageForCompilation();
TR::Linkage *getLinkage() {return _bodyLinkage;}
TR::Linkage *setLinkage(TR::Linkage * l) {return (_bodyLinkage = l);}
TR::Linkage *getLinkage(TR_LinkageConventions lc);
TR::Linkage *setLinkage(TR_LinkageConventions lc, TR::Linkage * l) {return _linkages[lc] = l;}
// --------------------------------------------------------------------------
// Optimizer, code generator capabilities
//
int32_t getPreferredLoopUnrollFactor() {return -1;}
/**
* @brief Answers whether the provided recognized method should be inlined by an
* inliner optimization.
* @param method : the recognized method to consider
* @return true if inlining should be suppressed; false otherwise
*/
bool suppressInliningOfRecognizedMethod(TR::RecognizedMethod method);
// --------------------------------------------------------------------------
// Optimizer, not code generator
//
bool getGRACompleted() { return _flags4.testAny(GRACompleted); }
void setGRACompleted() { _flags4.set(GRACompleted); }
bool getSupportsProfiledInlining() { return _flags4.testAny(SupportsProfiledInlining);}
void setSupportsProfiledInlining() { _flags4.set(SupportsProfiledInlining);}
bool supportsInliningOfIsInstance() {return false;}
bool supportsPassThroughCopyToNewVirtualRegister() { return false; }
uint8_t getSizeOfCombinedBuffer() {return 0;}
bool doRematerialization() {return false;}
// --------------------------------------------------------------------------
// Architecture, not code generator
//
int16_t getMinShortForLongCompareNarrower() { return SHRT_MIN; }
int8_t getMinByteForLongCompareNarrower() { return SCHAR_MIN; }
bool branchesAreExpensive() { return true; }
bool opCodeIsNoOp(TR::ILOpCode &opCode);
bool opCodeIsNoOpOnThisPlatform(TR::ILOpCode &opCode) {return false;}
bool supportsSinglePrecisionSQRT() {return false;}
bool supportsFusedMultiplyAdd() {return false;}
bool supportsNegativeFusedMultiplyAdd() {return false;}
bool supportsComplexAddressing() {return false;}
bool canBeAffectedByStoreTagStalls() { return false; }
bool isMaterialized(TR::Node *);
bool shouldValueBeInACommonedNode(int64_t) { return false; }
bool materializesLargeConstants() { return false; }
bool canUseImmedInstruction(int64_t v) {return false;}
bool needsNormalizationBeforeShifts() { return false; }
uint32_t getNumberBytesReadInaccessible() { return _numberBytesReadInaccessible; }
uint32_t getNumberBytesWriteInaccessible() { return _numberBytesWriteInaccessible; }
bool codegenSupportsUnsignedIntegerDivide() {return false;}
bool mulDecompositionCostIsJustified(int numOfOperations, char bitPosition[], char operationType[], int64_t value);
bool codegenSupportsLoadlessBNDCheck() {return false;}
// called to determine if multiply decomposition exists in platform codegen so that codegen sequences are used
// instead of the IL transformed multiplies
bool codegenMulDecomposition(int64_t multiplier) {return false;}
// --------------------------------------------------------------------------
// FrontEnd, not code generator
//
bool getSupportsNewObjectAlignment() { return false; }
bool getSupportsTenuredObjectAlignment() { return false; }
bool isObjectOfSizeWorthAligning(uint32_t size) { return false; }
uint32_t getMaxObjectSizeGuaranteedNotToOverflow() { return _maxObjectSizeGuaranteedNotToOverflow; }
// --------------------------------------------------------------------------
// OSR, not code generator
//
void addToOSRTable(TR::Instruction *);
void addToOSRTable(int32_t instructionPC, TR_ByteCodeInfo &bcInfo);
int genStoreForSymListArray(TR_Array<List<TR::SymbolReference> >* symListArray,
TR_OSRMethodData* osrMethodData, TR::TreeTop*& insertionPoint, TR::Node* callNode,
TR::Node* osrBufferNode, TR::Node* osrScratchBufferNode, TR::Node* osrFrameIndex,
int32_t& scratchBufferOffset);
void eliminateLoadsOfLocalsThatAreNotStored(TR::Node *node, int32_t childNum);
// --------------------------------------------------------------------------
// FE capability, not code generator
//
bool internalPointerSupportImplemented() {return false;}
bool supportsInternalPointers();
// --------------------------------------------------------------------------
// GC
//
TR::GCStackAtlas *getStackAtlas() {return _stackAtlas;}
TR::GCStackAtlas *setStackAtlas(TR::GCStackAtlas *p) {return (_stackAtlas = p);}
TR_GCStackMap *getMethodStackMap() {return _methodStackMap;}
TR_GCStackMap *setMethodStackMap(TR_GCStackMap *m) {return (_methodStackMap = m);}
void addToAtlas(TR::Instruction *);
void buildGCMapsForInstructionAndSnippet(TR::Instruction *instr);
TR_GCStackMap *buildGCMapForInstruction(TR::Instruction *instr);
void buildRegisterMapForInstruction(TR_GCStackMap *map);
// IA32 only?
uint32_t getRegisterMapInfoBitsMask() {return 0;}
// --------------------------------------------------------------------------
// Method frame building
//
uint32_t getLargestOutgoingArgSize() {return _largestOutgoingArgSize;}
uint32_t setLargestOutgoingArgSize(uint32_t s) {return (_largestOutgoingArgSize = s);}
int32_t getFrameSizeInBytes() {return _frameSizeInBytes;}
int32_t setFrameSizeInBytes(int32_t fs) {return (_frameSizeInBytes = fs);}
int32_t getRegisterSaveDescription() {return _registerSaveDescription;}
int32_t setRegisterSaveDescription(int32_t rsd) {return (_registerSaveDescription = rsd);}
TR_InterferenceGraph *getLocalsIG() {return _localsIG;}
TR_InterferenceGraph *setLocalsIG(TR_InterferenceGraph *ig) {return (_localsIG = ig);}
bool isLeafMethod() { return _flags1.testAny(IsLeafMethod); }
void setIsLeafMethod() { _flags1.set(IsLeafMethod); }
void resetIsLeafMethod() { _flags1.reset(IsLeafMethod); }
// --------------------------------------------------------------------------
// Binary encoding code cache
//
uint32_t getEstimatedWarmLength() {return _estimatedCodeLength;} // DEPRECATED
uint32_t setEstimatedWarmLength(uint32_t l) {return (_estimatedCodeLength = l);} // DEPRECATED
uint32_t getEstimatedCodeLength() {return _estimatedCodeLength;}
uint32_t setEstimatedCodeLength(uint32_t l) {return (_estimatedCodeLength = l);}
uint8_t *getBinaryBufferStart() {return _binaryBufferStart;}
uint8_t *setBinaryBufferStart(uint8_t *b) {return (_binaryBufferStart = b);}
uint8_t *getCodeStart();
uint8_t *getCodeEnd() {return _binaryBufferCursor;}
uint32_t getCodeLength();
uint8_t *getBinaryBufferCursor() {return _binaryBufferCursor;}
uint8_t *setBinaryBufferCursor(uint8_t *b) { return (_binaryBufferCursor = b); }
uint8_t *alignBinaryBufferCursor();
uint32_t getBinaryBufferLength() {return (uint32_t)(_binaryBufferCursor - _binaryBufferStart - _jitMethodEntryPaddingSize);} // cast explicitly
int32_t getEstimatedSnippetStart() {return _estimatedSnippetStart;}
int32_t setEstimatedSnippetStart(int32_t s) {return (_estimatedSnippetStart = s);}
int32_t getAccumulatedInstructionLengthError() {return _accumulatedInstructionLengthError;}
int32_t setAccumulatedInstructionLengthError(int32_t e) {return (_accumulatedInstructionLengthError = e);}
int32_t addAccumulatedInstructionLengthError(int32_t e) {return (_accumulatedInstructionLengthError += e);}
uint32_t getPreJitMethodEntrySize() {return _preJitMethodEntrySize;}
uint32_t setPreJitMethodEntrySize(uint32_t s) {return (_preJitMethodEntrySize = s);}
uint32_t getJitMethodEntryPaddingSize() {return _jitMethodEntryPaddingSize;}
uint32_t setJitMethodEntryPaddingSize(uint32_t s) {return (_jitMethodEntryPaddingSize = s);}
// --------------------------------------------------------------------------
// Code cache
//
TR::CodeCache * getCodeCache() { return _codeCache; }
void setCodeCache(TR::CodeCache * codeCache) { _codeCache = codeCache; }
void reserveCodeCache();
/**
* \brief Allocates code memory of the specified size in the specified area of
* the code cache. The compilation will fail if unsuccessful.
*
* \param[in] codeSizeInBytes : the number of bytes to allocate
* \param[in] isCold : whether the allocation should be done in the cold area or not
* \param[in] isMethodHeaderNeeded : boolean indicating whether space for a
* method header must be allocated
*
* \return address of the allocated code (if allocated)
*/
uint8_t *allocateCodeMemory(uint32_t codeSizeInBytes, bool isCold, bool isMethodHeaderNeeded=true);
/**
* \brief Allocates code memory of the specified size in the specified area of
* the code cache. The compilation will fail if unsuccessful.
*
* \param[in] warmCodeSizeInBytes : the number of bytes to allocate in the warm area
* \param[in] coldCodeSizeInBytes : the number of bytes to allocate in the cold area
* \param[out] coldCode : address of the cold code (if allocated)
* \param[in] isMethodHeaderNeeded : boolean indicating whether space for a
* method header must be allocated
*
* \return address of the allocated warm code (if allocated)
*/
uint8_t *allocateCodeMemory(
uint32_t warmCodeSizeInBytes,
uint32_t coldCodeSizeInBytes,
uint8_t **coldCode,
bool isMethodHeaderNeeded=true);
/**
* \brief Allocates code memory of the specified size in the specified area of
* the code cache. The compilation will fail if unsuccessful. This function
* provides a means of specialization in the allocation process for downstream
* consumers of this API.
*
* \param[in] warmCodeSizeInBytes : the number of bytes to allocate in the warm area
* \param[in] coldCodeSizeInBytes : the number of bytes to allocate in the cold area
* \param[out] coldCode : address of the cold code (if allocated)
* \param[in] isMethodHeaderNeeded : boolean indicating whether space for a
* method header must be allocated
*
* \return address of the allocated warm code (if allocated)
*/
uint8_t *allocateCodeMemoryInner(
uint32_t warmCodeSizeInBytes,
uint32_t coldCodeSizeInBytes,
uint8_t **coldCode,
bool isMethodHeaderNeeded);
/**
* \brief Trim the size of code memory required by this method to match the
* actual code length required, allowing the reclaimed memory to be
* reused. This is needed when the conservative length estimate
* exceeds the actual memory requirement.
*/
void trimCodeMemoryToActualSize();
void registerAssumptions() {}
static void syncCode(uint8_t *codeStart, uint32_t codeSize);
void commitToCodeCache() { _committedToCodeCache = true; }
bool committedToCodeCache() { return _committedToCodeCache; }
/**
* \brief Answers whether the CodeCache in the current compilation has been switched
* from the originally assigned CodeCache.
*
* \return true if the CodeCache has been switched; false otherwise.
*/
bool hasCodeCacheSwitched() const { return _codeCacheSwitched; }
/**
* \brief Updates the state of whether the CodeCache has been switched.
*
* \param[in] s : bool indicating whether the CodeCache has been switched
*/
void setCodeCacheSwitched(bool s) { _codeCacheSwitched = s; }
/**
* \brief Changes the current CodeCache to the provided CodeCache.
*
* \param[in] newCodeCache : the CodeCache to switch to
*/
void switchCodeCacheTo(TR::CodeCache *newCodeCache);
// --------------------------------------------------------------------------
// Load extensions (Z)
TR::SparseBitVector & getExtendedToInt64GlobalRegisters() { return _extendedToInt64GlobalRegisters; }
// --------------------------------------------------------------------------
// Live registers
//
void checkForLiveRegisters(TR_LiveRegisters *);
TR_LiveRegisters *getLiveRegisters(TR_RegisterKinds rk) {return _liveRegisters[rk];}
TR_LiveRegisters *setLiveRegisters(TR_LiveRegisters *p, TR_RegisterKinds rk) {return (_liveRegisters[rk] = p);}
void genLiveRealRegisters(TR_RegisterKinds rk, TR_RegisterMask r) {_liveRealRegisters[rk] |= r;}
void killLiveRealRegisters(TR_RegisterKinds rk, TR_RegisterMask r) {_liveRealRegisters[rk] &= ~r;}
TR_RegisterMask getLiveRealRegisters(TR_RegisterKinds rk) {return _liveRealRegisters[rk];}
void resetLiveRealRegisters(TR_RegisterKinds rk) {_liveRealRegisters[rk] = 0;}
uint8_t getSupportedLiveRegisterKinds() {return _supportedLiveRegisterKinds;}
void addSupportedLiveRegisterKind(TR_RegisterKinds rk) {_supportedLiveRegisterKinds |= (uint8_t)(1<<rk);}
// --------------------------------------------------------------------------
// VMThread (shouldn't be common codegen)
//
TR::Register *getVMThreadRegister() {return _vmThreadRegister;}
TR::Register *setVMThreadRegister(TR::Register *vmtr) {return (_vmThreadRegister = vmtr);}
TR::RealRegister *getRealVMThreadRegister() {return _realVMThreadRegister;}
void setRealVMThreadRegister(TR::RealRegister *defvmtr) {_realVMThreadRegister = defvmtr;}
// --------------------------------------------------------------------------
// GRA
//
void addSymbolAndDataTypeToMap(TR::Symbol *symbol, TR::DataType dt);
TR::DataType getDataTypeFromSymbolMap(TR::Symbol *symbol);
bool prepareForGRA();
uint32_t getGlobalRegister(TR_GlobalRegisterNumber n) {return _globalRegisterTable[n];}
uint32_t *setGlobalRegisterTable(uint32_t *p) {return (_globalRegisterTable = p);}
TR_GlobalRegisterNumber getGlobalRegisterNumber(uint32_t realReg) { return -1; }
TR_GlobalRegisterNumber getFirstGlobalGPR() {return 0;}
TR_GlobalRegisterNumber getLastGlobalGPR() {return _lastGlobalGPR;}
TR_GlobalRegisterNumber setLastGlobalGPR(TR_GlobalRegisterNumber n) {return (_lastGlobalGPR = n);}
TR_GlobalRegisterNumber getFirstGlobalFPR() {return _lastGlobalGPR + 1;}
TR_GlobalRegisterNumber setFirstGlobalFPR(TR_GlobalRegisterNumber n) {return (_firstGlobalFPR = n);}
TR_GlobalRegisterNumber getLastGlobalFPR() {return _lastGlobalFPR;}
TR_GlobalRegisterNumber setLastGlobalFPR(TR_GlobalRegisterNumber n) {return (_lastGlobalFPR = n);}
TR_GlobalRegisterNumber getFirstOverlappedGlobalFPR() { return _firstOverlappedGlobalFPR ;}
TR_GlobalRegisterNumber setFirstOverlappedGlobalFPR(TR_GlobalRegisterNumber n) { return _firstOverlappedGlobalFPR = n;}
TR_GlobalRegisterNumber getLastOverlappedGlobalFPR() { return _lastOverlappedGlobalFPR ;}
TR_GlobalRegisterNumber setLastOverlappedGlobalFPR(TR_GlobalRegisterNumber n) { return _lastOverlappedGlobalFPR = n ;}
TR_GlobalRegisterNumber getFirstGlobalVRF() {return _firstGlobalVRF;}
TR_GlobalRegisterNumber setFirstGlobalVRF(TR_GlobalRegisterNumber n) {return (_firstGlobalVRF = n);}
TR_GlobalRegisterNumber getLastGlobalVRF() {return _lastGlobalVRF;}
TR_GlobalRegisterNumber setLastGlobalVRF(TR_GlobalRegisterNumber n) {return (_lastGlobalVRF= n);}
TR_GlobalRegisterNumber getFirstOverlappedGlobalVRF() {return _firstOverlappedGlobalVRF ;}
TR_GlobalRegisterNumber setFirstOverlappedGlobalVRF(TR_GlobalRegisterNumber n) {return _firstOverlappedGlobalVRF = n ;}
TR_GlobalRegisterNumber getLastOverlappedGlobalVRF() {return _lastOverlappedGlobalVRF ;}
TR_GlobalRegisterNumber setLastOverlappedGlobalVRF(TR_GlobalRegisterNumber n) {return _lastOverlappedGlobalVRF = n ;}
bool hasGlobalVRF() { return _firstGlobalVRF != -1 && _lastGlobalVRF != -1; }
void setLast8BitGlobalGPR(TR_GlobalRegisterNumber n) { _last8BitGlobalGPR = n;}
uint16_t getNumberOfGlobalRegisters();
uint16_t getNumberOfGlobalGPRs() {return _lastGlobalGPR + 1;}
uint16_t getNumberOfGlobalFPRs() {return _lastGlobalFPR - _lastGlobalGPR;}
uint16_t getNumberOfGlobalVRFs() {return _lastGlobalVRF - _firstGlobalVRF;}
uint8_t getGlobalGPRPartitionLimit() {return _globalGPRPartitionLimit;}
uint8_t setGlobalGPRPartitionLimit(uint8_t l) {return (_globalGPRPartitionLimit = l);}
uint8_t getGlobalFPRPartitionLimit() {return _globalFPRPartitionLimit;}
uint8_t setGlobalFPRPartitionLimit(uint8_t l) {return (_globalFPRPartitionLimit = l);}
bool isGlobalGPR(TR_GlobalRegisterNumber n) {return n <= _lastGlobalGPR;}
bool isAliasedGRN(TR_GlobalRegisterNumber n);
TR_GlobalRegisterNumber getOverlappedAliasForGRN(TR_GlobalRegisterNumber n);
void setOverlapOffsetBetweenAliasedGRNs(TR_GlobalRegisterNumber n)
{
TR_ASSERT(n >= 0, "Offset for aliased global register numbers must be positive. Currently: %d", n);
_overlapOffsetBetweenFPRandVRFgrns = n;
}
TR_GlobalRegisterNumber getOverlapOffsetBetweenAliasedGRNs()
{
return _overlapOffsetBetweenFPRandVRFgrns;
}
bool isGlobalVRF(TR_GlobalRegisterNumber n);
bool isGlobalFPR(TR_GlobalRegisterNumber n);
bool is8BitGlobalGPR(TR_GlobalRegisterNumber n) {return n <= _last8BitGlobalGPR;}
TR_GlobalRegisterNumber getLinkageGlobalRegisterNumber(int8_t linkageRegisterIndex, TR::DataType type){ return -1; }
TR_BitVector *getGlobalGPRsPreservedAcrossCalls(){ return NULL; }
TR_BitVector *getGlobalFPRsPreservedAcrossCalls(){ return NULL; }
int32_t getFirstBit(TR_BitVector &bv);
TR_GlobalRegisterNumber pickRegister(TR_RegisterCandidate *, TR::Block * *, TR_BitVector & availableRegisters, TR_GlobalRegisterNumber & highRegisterNumber, TR_LinkHead<TR_RegisterCandidate> *candidates);
TR_RegisterCandidate *findCoalescenceForRegisterCopy(TR::Node *node, TR_RegisterCandidate *rc, bool *isUnpreferred);
TR_GlobalRegisterNumber findCoalescenceRegisterForParameter(TR::Node *callNode, TR_RegisterCandidate *rc, uint32_t childIndex, bool *isUnpreferred);
TR_RegisterCandidate *findUsedCandidate(TR::Node *node, TR_RegisterCandidate *rc, TR_BitVector *visitedNodes);
bool allowGlobalRegisterAcrossBranch(TR_RegisterCandidate *, TR::Node * branchNode);
void removeUnavailableRegisters(TR_RegisterCandidate * rc, TR::Block * * blocks, TR_BitVector & availableRegisters) {}
void setUnavailableRegistersUsage(TR_Array<TR_BitVector> & liveOnEntryUsage, TR_Array<TR_BitVector> & liveOnExitUsage) {}
int32_t getMaximumNumberOfGPRsAllowedAcrossEdge(TR::Node *) { return INT_MAX; }
int32_t getMaximumNumberOfFPRsAllowedAcrossEdge(TR::Node *) { return INT_MAX; }
int32_t getMaximumNumberOfVRFsAllowedAcrossEdge(TR::Node *) { return INT_MAX; }
int32_t getMaximumNumberOfGPRsAllowedAcrossEdge(TR::Block *block);
int32_t getMaximumNumbersOfAssignableGPRs() { return INT_MAX; }
int32_t getMaximumNumbersOfAssignableFPRs() { return INT_MAX; }
int32_t getMaximumNumbersOfAssignableVRs() { return INT_MAX; }
virtual bool willBeEvaluatedAsCallByCodeGen(TR::Node *node, TR::Compilation *comp){ return true;}
bool isGlobalRegisterAvailable(TR_GlobalRegisterNumber, TR::DataType) { return true; }
bool areAssignableGPRsScarce();
TR_Array<TR::Register *>& getRegisterArray() {return _registerArray;}
bool needToAvoidCommoningInGRA() {return false;}