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LoopReducer.cpp
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LoopReducer.cpp
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/*******************************************************************************
* Copyright (c) 2000, 2020 IBM Corp. and others
*
* This program and the accompanying materials are made available under
* the terms of the Eclipse Public License 2.0 which accompanies this
* distribution and is available at http://eclipse.org/legal/epl-2.0
* or the Apache License, Version 2.0 which accompanies this distribution
* and is available at https://www.apache.org/licenses/LICENSE-2.0.
*
* This Source Code may also be made available under the following Secondary
* Licenses when the conditions for such availability set forth in the
* Eclipse Public License, v. 2.0 are satisfied: GNU General Public License,
* version 2 with the GNU Classpath Exception [1] and GNU General Public
* License, version 2 with the OpenJDK Assembly Exception [2].
*
* [1] https://www.gnu.org/software/classpath/license.html
* [2] http://openjdk.java.net/legal/assembly-exception.html
*
* SPDX-License-Identifier: EPL-2.0 OR Apache-2.0 OR GPL-2.0 WITH Classpath-exception-2.0 OR LicenseRef-GPL-2.0 WITH Assembly-exception
*******************************************************************************/
#include "optimizer/LoopReducer.hpp"
#include <stddef.h>
#include <stdint.h>
#include "codegen/CodeGenerator.hpp"
#include "env/FrontEnd.hpp"
#include "compile/Compilation.hpp"
#include "compile/SymbolReferenceTable.hpp"
#include "control/Options.hpp"
#include "control/Options_inlines.hpp"
#include "env/CompilerEnv.hpp"
#include "env/IO.hpp"
#include "env/StackMemoryRegion.hpp"
#include "env/TRMemory.hpp"
#include "env/jittypes.h"
#include "il/Block.hpp"
#include "il/DataTypes.hpp"
#include "il/ILOpCodes.hpp"
#include "il/ILOps.hpp"
#include "il/Node.hpp"
#include "il/NodeUtils.hpp"
#include "il/Node_inlines.hpp"
#include "il/RegisterMappedSymbol.hpp"
#include "il/ResolvedMethodSymbol.hpp"
#include "il/Symbol.hpp"
#include "il/SymbolReference.hpp"
#include "il/TreeTop.hpp"
#include "il/TreeTop_inlines.hpp"
#include "infra/Assert.hpp"
#include "infra/Cfg.hpp"
#include "infra/List.hpp"
#include "infra/CfgEdge.hpp"
#include "infra/CfgNode.hpp"
#include "infra/TreeServices.hpp"
#include "optimizer/LoopCanonicalizer.hpp"
#include "optimizer/Optimization_inlines.hpp"
#include "optimizer/Optimizations.hpp"
#include "optimizer/Optimizer.hpp"
#include "optimizer/Structure.hpp"
#include "optimizer/TranslateTable.hpp"
#include "optimizer/VPConstraint.hpp"
#include "ras/Debug.hpp"
#define OPT_DETAILS "O^O LOOP TRANSFORMATION: "
static TR::Node * testNode(TR::Compilation * comp, TR::Node * node, TR::ILOpCodes value, const char* msg)
{
if (node->getOpCodeValue() != value)
{
if (msg) dumpOptDetails(comp, msg);
return NULL;
}
else
{
return node;
}
}
static TR::Node * testUnary(TR::Compilation * comp, TR::Node * parent, TR::ILOpCodes value, const char* msg)
{
return testNode(comp, parent->getFirstChild(), value, msg);
}
static TR::Node * testBinary(
TR::Compilation * comp, TR::Node * parent, TR::ILOpCodes value, TR::ILOpCodes leftChildValue, TR::ILOpCodes rightChildValue, const char* msg)
{
TR::Node * child = parent->getFirstChild();
if (child->getOpCodeValue() != value || child->getFirstChild()->getOpCodeValue() != leftChildValue ||
child->getSecondChild()->getOpCodeValue() != rightChildValue)
{
if (msg) dumpOptDetails(comp, msg);
return NULL;
}
else
{
return child;
}
}
static TR::Node * testBinaryIConst(TR::Compilation * comp, TR::Node * parent, TR::ILOpCodes value, TR::ILOpCodes leftChildValue,
int32_t rightChildValue, const char* msg)
{
TR::Node * child = parent->getFirstChild();
if (child->getOpCodeValue() != value || child->getFirstChild()->getOpCodeValue() != leftChildValue ||
child->getSecondChild()->getOpCodeValue() != TR::iconst || child->getSecondChild()->getInt() != rightChildValue)
{
if (msg) dumpOptDetails(comp, msg);
return NULL;
}
else
{
return child;
}
}
TR_LRAddressTree::TR_LRAddressTree(TR::Compilation * comp, TR_InductionVariable * indVar)
: TR_AddressTree(heapAlloc, comp), _indVar(indVar), _increment(indVar->getIncr()->getLowInt()), _indVarLoad(NULL)
{
}
TR_ArrayLoop::TR_ArrayLoop(TR::Compilation * comp, TR_InductionVariable * firstIndVar, TR_InductionVariable * secondIndVar)
: _comp(comp), _firstAddress(comp, firstIndVar), _secondAddress(comp, secondIndVar), _thirdAddress(comp, secondIndVar),
_finalNode(NULL), _addInc(false), _forwardLoop(false)
{
}
TR_ArrayLoop::TR_ArrayLoop(TR::Compilation * comp, TR_InductionVariable * indVar)
: _comp(comp), _firstAddress(comp, indVar), _secondAddress(comp, indVar), _thirdAddress(comp, indVar), _finalNode(NULL), _addInc(false), _forwardLoop(false)
{
}
TR_Arrayset::TR_Arrayset(TR::Compilation * comp, TR_InductionVariable * indVar)
: TR_ArrayLoop(comp, indVar)
{
}
TR_Arraycopy::TR_Arraycopy(TR::Compilation * comp, TR_InductionVariable * indVar)
: TR_ArrayLoop(comp, indVar)
{
}
TR_ByteToCharArraycopy::TR_ByteToCharArraycopy(TR::Compilation * comp, TR_InductionVariable * firstIndVar, TR_InductionVariable * secondIndVar, bool bigEndian)
: TR_ArrayLoop(comp, firstIndVar, secondIndVar), _bigEndian(bigEndian)
{
}
TR_CharToByteArraycopy::TR_CharToByteArraycopy(TR::Compilation * comp, TR_InductionVariable * firstIndVar, TR_InductionVariable * secondIndVar, bool bigEndian)
: TR_ArrayLoop(comp, firstIndVar, secondIndVar), _bigEndian(bigEndian)
{
}
TR_Arraycmp::TR_Arraycmp(TR::Compilation * comp, TR_InductionVariable * indVar)
: _targetOfGotoBlock(NULL), _firstLoad(NULL), _secondLoad(NULL), TR_ArrayLoop(comp, indVar)
{
}
TR_Arraytranslate::TR_Arraytranslate(TR::Compilation * comp, TR_InductionVariable * indVar, bool hasBranch, bool hasBreak)
: TR_ArrayLoop(comp, indVar), _inputNode(NULL), _outputNode(NULL), _termCharNode(NULL), _tableNode(NULL), _resultNode(NULL),
_resultUnconvertedNode(NULL), _usesRawStorage(false), _compilerGeneratedTable(false), _hasBranch(hasBranch), _hasBreak(hasBreak), _compareOp(TR::BadILOp)
{
}
TR_ArraytranslateAndTest::TR_ArraytranslateAndTest(TR::Compilation * comp, TR_InductionVariable * indVar)
: TR_ArrayLoop(comp, indVar), _termCharNode(NULL)
{
}
bool
TR_LRAddressTree::processBaseAndIndex(TR::Node* parent)
{
TR::Node * lhs = parent->getFirstChild();
TR::Node * rhs = parent->getSecondChild();
TR::RegisterMappedSymbol * indSym = _indVar->getLocal();
if (isILLoad(lhs) && (lhs->getSymbol()->getRegisterMappedSymbol() == indSym))
{
_indVarNode.setParentAndChildNumber(parent, 0);
if (isILLoad(rhs))
{
_baseVarNode.setParentAndChildNumber(parent, 1);
}
}
else if (isILLoad(rhs) && (rhs->getSymbol()->getRegisterMappedSymbol() == indSym))
{
_indVarNode.setParentAndChildNumber(parent, 1);
if (isILLoad(lhs))
{
_baseVarNode.setParentAndChildNumber(parent, 0);
}
}
else
{
return false;
}
return true;
}
bool
TR_LRAddressTree::checkAiadd(TR::Node * aiaddNode, int32_t elementSize)
{
if (!process(aiaddNode))
{
dumpOptDetails(comp(), "checkAiadd: base processing of node did not match criteria\n");
return false;
}
TR::RegisterMappedSymbol * indSym = _indVar->getLocal();
if (_indVarNode.isNull() || (_indVarNode.getChild()->skipConversions()->getSymbol()->getRegisterMappedSymbol() != indSym))
{
dumpOptDetails(comp(), "checkAiadd: induction variable does not match index variable\n");
return false;
}
TR::RegisterMappedSymbol * loadSym = _indVarNode.getChild()->skipConversions()->getSymbol()->getRegisterMappedSymbol();
if (loadSym != indSym)
{
if (_matIndVarSymRef)
{
if (loadSym != _matIndVarSymRef->getSymbol()->getRegisterMappedSymbol())
{
dumpOptDetails(comp(), "checkAiadd: load in the aiadd tree does not match materialized induction variable\n");
return false;
}
}
else
{
dumpOptDetails(comp(), "checkAiadd: induction variable does not match index variable\n");
return false;
}
}
if (_multiplyNode.isNull() && ((elementSize != _increment) && (elementSize != -_increment)))
{
dumpOptDetails(comp(), "checkAiadd: sub-tree does not have induction variable change consistent with increment of multiplier (%d %d)\n",
elementSize, _increment);
return false;
}
switch (_multiplier)
{
case 1:
if (elementSize == 1 && (_increment == 1 || _increment == -1))
{
return true;
}
break;
case 2:
if (elementSize == 2 && (_increment == 1 || _increment == -1))
{
return true;
}
break;
case 4:
if (elementSize == 4 && (_increment == 1 || _increment == -1))
{
return true;
}
break;
case 8:
if (elementSize == 8 && (_increment == 1 || _increment == -1))
{
return true;
}
break;
default:
break;
}
return false;
}
bool
TR_Arrayset::checkArrayStore(TR::Node * storeNode)
{
if (!storeNode->getOpCode().isStoreIndirect())
{
dumpOptDetails(comp(), "arraystore tree does not have an indirect store as root\n");
return false;
}
TR::Node * storeFirstChild = storeNode->getFirstChild();
TR::ILOpCodes opCodeStoreFirstChild = storeFirstChild->getOpCodeValue();
TR::Node * storeSecondChild = storeNode->getSecondChild();
TR::ILOpCodes opCodeStoreSecondChild = storeSecondChild->getOpCodeValue();
if (opCodeStoreSecondChild == TR::iload && storeSecondChild->getSymbol()->getRegisterMappedSymbol() == getIndVar()->getLocal())
{
dumpOptDetails(comp(), "arraystore tree has induction variable on rhs\n");
return false;
}
if (!storeSecondChild->getOpCode().isLoadDirectOrReg())
{
dumpOptDetails(comp(), "arraystore tree does not have a constant load, or constant load is an address\n");
return false;
}
return (getStoreAddress()->checkAiadd(storeFirstChild, storeNode->getSize()));
}
bool
TR_Arraycopy::checkArrayStore(TR::Node * storeNode)
{
if (!storeNode->getOpCode().isStoreIndirect() && !(storeNode->getOpCodeValue() == TR::treetop && storeNode->getFirstChild()->getOpCodeValue() == TR::awrtbari))
{
dumpOptDetails(comp(), "arraycopy arraystore tree does not have an indirect store as root\n");
return false;
}
if (storeNode->getOpCodeValue() == TR::treetop)
{
storeNode = storeNode->getFirstChild();
_hasWriteBarrier = true;
}
else
{
_hasWriteBarrier = false;
}
TR::Node * storeFirstChild = storeNode->getFirstChild();
TR::ILOpCodes opCodeStoreFirstChild = storeFirstChild->getOpCodeValue();
TR::Node * storeSecondChild = storeNode->getSecondChild();
TR::ILOpCodes opCodeStoreSecondChild = storeSecondChild->getOpCodeValue();
TR::Node * loadNode = storeSecondChild;
if (!loadNode->getOpCode().isLoadIndirect())
{
dumpOptDetails(comp(), "arraycopy arraystore tree does not have an indirect load as the second child\n");
return false;
}
if (loadNode->getSize() != storeNode->getSize())
{
dumpOptDetails(comp(), "arraycopy src and dst trees are not of the same size\n");
return false;
}
_copySize = loadNode->getSize();
TR::Node * loadFirstChild = loadNode->getFirstChild();
if (storeFirstChild->getNumChildren() == 0 || loadFirstChild->getNumChildren() == 0 ||
!storeFirstChild->getFirstChild()->getOpCode().hasSymbolReference() ||
!loadFirstChild->getFirstChild()->getOpCode().hasSymbolReference() ||
storeFirstChild->getFirstChild()->getSymbol()->getRegisterMappedSymbol() == loadFirstChild->getFirstChild()->getSymbol()->getRegisterMappedSymbol())
{
dumpOptDetails(comp(), "arraycopy src and dst are against same object - punt for now\n");
return false;
}
bool checkStore = getStoreAddress()->checkAiadd(storeFirstChild, storeNode->getSize());
bool checkLoad = getLoadAddress()->checkAiadd(loadFirstChild, loadNode->getSize());
_storeNode = storeNode;
return checkStore && checkLoad;
}
bool
TR_ByteToCharArraycopy::checkArrayStore(TR::Node * storeNode)
{
if (storeNode->getOpCodeValue() != TR::sstorei)
{
dumpOptDetails(comp(), "byte to char arraycopy arraystore tree does not have an indirect store as root\n");
return false;
}
TR::Node * storeFirstChild = storeNode->getFirstChild();
TR::ILOpCodes opCodeStoreFirstChild = storeFirstChild->getOpCodeValue();
bool checkStore = getStoreAddress()->checkAiadd(storeFirstChild, storeNode->getSize());
return checkStore;
}
// Need to verify that the byte loads sub-tree looks like the following:
// Will use checkAiadd() to verify the address children but need an additional
// check to ensure that the only difference between the two address trees is
// that the memory offset of the second child is one more than the memory offset
// of the first child (in this case, 16 and 17).
// i2s
// ior
// imul
// bu2i
// ibload #132[0x005f1c80] Shadow[<array-shadow>]
// aiadd
// aload #221[0x00703b50] Auto[<temp slot 11>]
// isub
// iload #175[0x005f1444] Auto[<auto slot 4>]
// ==>iconst -16 at [0x005f21f8]
// iconst 256
// bu2i
// ibload #132[0x005f1c80] Shadow[<array-shadow>]
// aiadd
// ==>aload at [0x005f1ac8]
// isub
// ==>iload at [0x005f1af4]
// iconst -17
bool
TR_ByteToCharArraycopy::checkByteLoads(TR::Node * loadNodes)
{
if (loadNodes->getOpCodeValue() != TR::i2s)
{
dumpOptDetails(comp(), "checkByteLoads: byte to char arraycopy byte loads is not headed with i2c\n");
return false;
}
TR::Node * joinNode = loadNodes->getFirstChild();
if (joinNode->getOpCodeValue() != TR::ior && joinNode->getOpCodeValue() != TR::iadd)
{
dumpOptDetails(comp(), "checkByteLoads: byte to char arraycopy byte loads not joined with OR or ADD\n");
return false;
}
TR::Node * highByteNode = joinNode->getFirstChild();
TR::Node * lowByteNode = joinNode->getSecondChild();
if (highByteNode->getOpCodeValue() != TR::imul &&
(highByteNode->getOpCodeValue() == TR::bu2i && lowByteNode->getOpCodeValue() == TR::imul))
{
// operands may be reversed - swap
dumpOptDetails(comp(), "checkByteLoads: try swapping the 2 OR/ADD children\n");
TR::Node * tmpNode = highByteNode;
highByteNode = lowByteNode;
lowByteNode = tmpNode;
}
else
{
if (highByteNode->getOpCodeValue() != TR::imul || lowByteNode->getOpCodeValue() != TR::bu2i)
{
dumpOptDetails(comp(), "checkByteLoads: byte to char arraycopy byte loads do not have imul/bu2i children\n");
return false;
}
}
if (highByteNode->getFirstChild()->getOpCodeValue() != TR::bu2i || highByteNode->getFirstChild()->getFirstChild()->getOpCodeValue() != TR::bloadi)
{
dumpOptDetails(comp(), "checkByteLoads: high byte load does not have bu2i/ibload\n");
return false;
}
if (lowByteNode->getFirstChild()->getOpCodeValue() != TR::bloadi)
{
dumpOptDetails(comp(), "checkByteLoads: low byte load does not have ibload\n");
return false;
}
if (highByteNode->getSecondChild()->getOpCodeValue() != TR::iconst || highByteNode->getSecondChild()->getInt() != 256)
{
dumpOptDetails(comp(), "checkByteLoads: multiplier for high value is not 256\n");
return false;
}
TR::Node * lowByteAddressNode = lowByteNode->getFirstChild()->getFirstChild();
TR::Node * highByteAddressNode = highByteNode->getFirstChild()->getFirstChild()->getFirstChild();
TR_ParentOfChildNode lowLoadMultiplyNode;
TR_ParentOfChildNode lowLoadIndVarNode;
bool checkHighLoad = getHighLoadAddress()->checkAiadd(highByteAddressNode, 2);
bool checkLowLoad = getLowLoadAddress()->checkAiadd(lowByteAddressNode, 2);
if (!checkHighLoad || !checkLowLoad)
{
dumpOptDetails(comp(), "checkByteLoads: aiadd tree in error (%d,%d)\n", checkHighLoad, checkLowLoad);
return false;
}
if (getLowLoadAddress()->getOffset() != getHighLoadAddress()->getOffset() + 1)
{
dumpOptDetails(comp(), "checkByteLoads: second offset is not one greater than first offset (%d %d)\n",
(int32_t)getLowLoadAddress()->getOffset(), (int32_t)getHighLoadAddress()->getOffset());
return false;
}
TR::RegisterMappedSymbol * hbs = getHighLoadAddress()->getBaseVarNode()->getChild() ? getHighLoadAddress()->getBaseVarNode()->getChild()->getSymbol()->getRegisterMappedSymbol() : NULL;
TR::RegisterMappedSymbol * lbs = getLowLoadAddress()->getBaseVarNode()->getChild() ? getLowLoadAddress()->getBaseVarNode()->getChild()->getSymbol()->getRegisterMappedSymbol() : NULL;
if (hbs || lbs)
{
// if either has a base var, both must, and they both must be the same
if (!hbs || !lbs || hbs != lbs)
{
dumpOptDetails(comp(), "checkByteLoads: at least one tree has a base sym, but both trees do not have the same sym (%p %p)\n",
lbs, hbs);
return false;
}
}
return true;
}
bool
TR_CharToByteArraycopy::checkArrayStores(TR::Node * origHighStoreNode, TR::Node * origLowStoreNode)
{
TR::Node * highStoreNode;
TR::Node * lowStoreNode;
if (_bigEndian)
{
highStoreNode = origHighStoreNode;
lowStoreNode = origLowStoreNode;
}
else
{
highStoreNode = origLowStoreNode;
lowStoreNode = origHighStoreNode;
}
if (highStoreNode->getOpCodeValue() != TR::bstorei)
{
dumpOptDetails(comp(), "checkArrayStores: char to byte arraycopy high arraystore tree does not have an indirect store as root\n");
return false;
}
if (lowStoreNode->getOpCodeValue() != TR::bstorei)
{
dumpOptDetails(comp(), "checkArrayStores: char to byte arraycopy low arraystore tree does not have an indirect store as root\n");
return false;
}
TR::Node * highStoreAddressNode = highStoreNode->getFirstChild();
TR::Node * lowStoreAddressNode = lowStoreNode->getFirstChild();
bool checkHighStore = getHighStoreAddress()->checkAiadd(highStoreAddressNode, 2);
bool checkLowStore = getLowStoreAddress()->checkAiadd(lowStoreAddressNode, 2);
if (!checkHighStore || !checkLowStore)
{
return false;
}
if ((int32_t)getLowStoreAddress()->getOffset() != (int32_t)getHighStoreAddress()->getOffset() + 1)
{
dumpOptDetails(comp(), "checkArrayStores: second offset is not 1 greater than first offset (%d %d)\n",
(int32_t)getLowStoreAddress()->getOffset(), (int32_t)getHighStoreAddress()->getOffset());
return false;
}
TR::Node * ishr = testNode(comp(), origHighStoreNode->getSecondChild(), TR::i2b, "checkArrayStores: high store child is not i2b\n");
if (!ishr) return false;
TR::Node * iand = testBinaryIConst(comp(), ishr, TR::ishr, TR::iand, 8, "checkArrayStores: high store child is not ishr of iand and 8\n");
if (!iand) return false;
TR::Node * c2i = testBinaryIConst(comp(), iand, TR::iand, TR::su2i, 0xFF00, "checkArrayStores: high store child is not iand of su2i and 0xFF00\n");
if (!c2i) return false;
TR::Node * isload = testUnary(comp(), c2i->getFirstChild(), TR::sloadi, "checkArrayStores: high store child is not isload\n");
if (!isload) return false;
bool checkLoad = getLoadAddress()->checkAiadd(isload->getFirstChild(), 2);
if (!checkLoad)
{
return false;
}
iand = testNode(comp(), origLowStoreNode->getSecondChild(), TR::i2b, "checkArrayStores: low store child is not i2b\n");
if (!iand) return false;
c2i = testBinaryIConst(comp(), iand, TR::iand, TR::su2i, 0xFF, "checkArrayStores: low store child is not iand of su2i and 0xFF\n");
if (!c2i) return false;
TR::Node * isloadDup = testUnary(comp(), c2i->getFirstChild(), TR::sloadi, "checkArrayStores: low store child is not isload\n");
if (!isloadDup) return false;
if (isloadDup != isload)
{
dumpOptDetails(comp(), "checkArrayStores: two isload addresses are not the same\n");
return false;
}
return true;
}
//
// This method verifies that the sub-tree passed in conforms to an increment of a
// variable and that the variable being incremented is the induction variable for
// the loop.
//
// istore <ind var>
// iadd
// iload <ind var>
// iconst <increment>
//
// Also - the iconst increment must match the increment of the loop
//
bool
TR_LRAddressTree::checkIndVarStore(TR::Node * indVarNode)
{
if (!indVarNode->getOpCode().isStoreDirect())
{
dumpOptDetails(comp(), "induction variable tree does not have a direct store as root\n");
return false;
}
TR::Node * storeFirstChild = indVarNode->getFirstChild();
TR::ILOpCodes opCodeStoreFirstChild = storeFirstChild->getOpCodeValue();
if (opCodeStoreFirstChild != TR::iadd && opCodeStoreFirstChild != TR::isub)
{
dumpOptDetails(comp(), "first child of istore is not TR::iadd/TR::isub\n");
return false;
}
TR::Node * iaddFirstChild = storeFirstChild->getFirstChild();
TR::ILOpCodes opCodeIaddFirstChild = iaddFirstChild->getOpCodeValue();
TR::Node * iaddSecondChild = storeFirstChild->getSecondChild();
TR::ILOpCodes opCodeIaddSecondChild = iaddSecondChild->getOpCodeValue();
if (opCodeIaddFirstChild != TR::iload || opCodeIaddSecondChild != TR::iconst)
{
dumpOptDetails(comp(), "first child of iadd is not TR::iload or second child is not TR::iconst\n");
return false;
}
TR::RegisterMappedSymbol * indSym = _indVar->getLocal();
if (indSym != iaddFirstChild->getSymbol()->getRegisterMappedSymbol())
{
dumpOptDetails(comp(), "iload symbol for aload does not match induction variable\n");
return false;
}
_indVarSymRef = iaddFirstChild->getSymbolReference();
int32_t realIncr = iaddSecondChild->getInt();
if (realIncr < 0 && (opCodeStoreFirstChild == TR::isub))
{
realIncr = -realIncr;
}
if (_increment != realIncr)
{
dumpOptDetails(comp(), "increment does not match induction variable increment\n");
return false;
}
else
{
_indVarLoad = iaddFirstChild;
return true;
}
}
//
// This method verifies that the sub-tree passed in conforms to a conditional
// branch on the induction variable
//
// ificmpge --> OutOfLoop
// iload #InductionVariable
// iconst 0 (or iload <val> if loop invariant)
// -or-
// ificmpge --> OutOfLoop
// <indvar node expression from indvar node tree>
// iconst 0 (or iload <val> if loop invariant)
bool
TR_ArrayLoop::checkLoopCmp(TR::Node * loopCmpNode, TR::Node * indVarStoreNode, TR_InductionVariable * indVar)
{
if (!loopCmpNode->getOpCode().isIf())
{
dumpOptDetails(comp(), "loop compare tree does not have an if as root\n");
return false;
}
TR::ILOpCodes compareOp = loopCmpNode->getOpCode().getOpCodeValue();
// if the comparison to leave the loop is equality, add (subtract) one to ind var
// on exit
if (compareOp == TR::ificmpeq || compareOp == TR::ificmpge || compareOp == TR::ificmple ||
compareOp == TR::ifiucmpge || compareOp == TR::ifiucmple)
{
_addInc = true;
}
if (compareOp == TR::ificmplt || compareOp == TR::ificmple ||
compareOp == TR::ifiucmplt || compareOp == TR::ifiucmple)
{
_forwardLoop = true;
}
TR::Node * cmpFirstChild = loopCmpNode->getFirstChild();
TR::ILOpCodes opCodeCmpFirstChild = cmpFirstChild->getOpCodeValue();
TR::Node * cmpSecondChild = loopCmpNode->getSecondChild();
TR::ILOpCodes opCodeCmpSecondChild = cmpSecondChild->getOpCodeValue();
if (opCodeCmpFirstChild != TR::iload && cmpFirstChild != indVarStoreNode->getFirstChild())
{
dumpOptDetails(comp(), "loop compare does not have iload or indvarnode expr as first child\n");
return false;
}
if (opCodeCmpSecondChild != TR::iconst && opCodeCmpSecondChild != TR::iload && !cmpSecondChild->getOpCode().isArrayLength())
{
dumpOptDetails(comp(), "loop compare does not have iconst/iload/arraylength as second child\n");
return false;
}
if (opCodeCmpFirstChild == TR::iload)
{
TR::RegisterMappedSymbol * indSym = indVar->getLocal();
if (indSym != cmpFirstChild->getSymbol()->getRegisterMappedSymbol())
{
dumpOptDetails(comp(), "loop compare does not use induction variable\n");
return false;
}
}
_finalNode = cmpSecondChild;
return true;
}
int32_t
TR_ArrayLoop::checkForPostIncrement(TR::Block *loopHeader, TR::Node *indVarStoreNode,
TR::Node *loopCmpNode, TR::Symbol *ivSym)
{
TR::TreeTop *startTree = loopHeader->getFirstRealTreeTop();
bool storeFound = false;
vcount_t visitCount = comp()->incVisitCount();
TR_ScratchList<TR::Node> ivLoads(comp()->trMemory());
for (TR::TreeTop *tt = startTree; !storeFound && tt != loopHeader->getExit(); tt = tt->getNextTreeTop())
findIndVarLoads(tt->getNode(), indVarStoreNode, storeFound, &ivLoads, ivSym, visitCount);
TR::Node *cmpFirstChild = loopCmpNode->getFirstChild();
TR::Node *storeIvLoad = indVarStoreNode->getFirstChild();
if (storeIvLoad->getOpCode().isAdd() || storeIvLoad->getOpCode().isSub())
storeIvLoad = storeIvLoad->getFirstChild();
// simple case
// the loopCmp uses the un-incremented value
// of the iv
//
if (storeIvLoad == cmpFirstChild)
return 1;
// the loopCmp uses some load of the iv that
// was commoned
//
if (ivLoads.find(cmpFirstChild))
return 1;
// uses a brand new load of the iv
return 0;
}
void
TR_ArrayLoop::findIndVarLoads(TR::Node *node, TR::Node *indVarStoreNode, bool &storeFound,
List<TR::Node> *ivLoads, TR::Symbol *ivSym, vcount_t visitCount)
{
if (node->getVisitCount() == visitCount)
return;
node->setVisitCount(visitCount);
if (node == indVarStoreNode)
storeFound = true;
if (node->getOpCodeValue() == TR::iload &&
node->getSymbolReference()->getSymbol() == ivSym)
{
if (!ivLoads->find(node))
ivLoads->add(node);
}
for (int32_t i = 0; i < node->getNumChildren(); i++)
findIndVarLoads(node->getChild(i), indVarStoreNode, storeFound, ivLoads, ivSym, visitCount);
}
// updateIndVarStore updates the indVarStore tree to have a multiplier
// so that the final value of the induction variable will be correct.
TR::Node *
TR_ArrayLoop::updateIndVarStore(TR_ParentOfChildNode * indVarNode, TR::Node * indVarStoreNode,
TR_LRAddressTree* tree, int32_t postIncrement)
{
int32_t endInc = tree->getIncrement() * tree->getMultiplier();
TR::Node * startNode;
TR::Node * endNode;
if (endInc < 0)
{
startNode = _finalNode;
endNode = tree->getIndVarLoad();
endInc = -endInc;
}
else
{
startNode = tree->getIndVarLoad();
endNode = _finalNode;
}
//
// adjust the element size by <element-size> if the loop was ==, <=, >= and
// then multiply by the size of the induction variable (which could be 1)
//
TR::Node * isub = TR::Node::create(TR::isub, 2, endNode->duplicateTree(), startNode->duplicateTree());
if (postIncrement != 0)
isub = TR::Node::create(TR::iadd, 2, isub, TR::Node::create(isub, TR::iconst, 0, postIncrement));
if (_addInc)
{
int32_t positiveIncrement = (tree->getIncrement() < 0) ? -(tree->getIncrement()) : tree->getIncrement();
TR::Node * elemSizeInc = TR::Node::create(_finalNode, TR::iconst, 0, positiveIncrement);
isub = TR::Node::create(TR::iadd, 2, isub, elemSizeInc);
}
//TR::Node * incMul = TR::Node::create(_finalNode, TR::iconst, 0, endInc);
//TR::Node * imul = TR::Node::create(TR::imul, 2, isub, incMul);
//
TR::Node * incMul = NULL;
TR::Node * imul = NULL;
if (comp()->target().is64Bit())
{
incMul = TR::Node::create(_finalNode, TR::lconst);
incMul->setLongInt(endInc);
isub = TR::Node::create(TR::i2l, 1, isub);
imul = TR::Node::create(TR::lmul, 2, isub, incMul);
}
else
{
incMul = TR::Node::create(_finalNode, TR::iconst, 0, endInc);
imul = TR::Node::create(TR::imul, 2, isub, incMul);
}
//
// the istore for the induction variable that was originally
// in the loop can be re-used as an istore to ensure the induction
// variable has the right value after the arrayset by just
// changing the iload on the isub's first child to be an
// iload of the final node. The subtraction of the increment
// remains to keep the original semantics of the loop, if the
// loop was a <=, >=, or == type of loop (as opposed to < and >)
//
TR::Node * replacedNode = indVarStoreNode->getFirstChild()->getFirstChild();
// first child of the indVarStoreNode might be commoned with array indexes
// before we change the child of the isub, check if it is commoned, and create a copy if so.
if (indVarStoreNode->getFirstChild()->getReferenceCount() > 1)
{
replacedNode = indVarStoreNode->getFirstChild();
//duplicate the isub tree
indVarStoreNode->setAndIncChild(0, indVarStoreNode->getFirstChild()->duplicateTree());
}
indVarStoreNode->getFirstChild()->setAndIncChild(0, _finalNode->duplicateTree());
replacedNode->recursivelyDecReferenceCount();
if (!_addInc && (postIncrement == 0))
{
TR_ParentOfChildNode secondChild(indVarStoreNode->getFirstChild(), 1);
secondChild.setChild(TR::Node::create(endNode, TR::iconst, 0, (int32_t) 0));
}
return imul;
}
// updateAiaddSubTree will update the aiadd tree to have the start value in
// the base address calculation instead of the induction variable, if the
// loop was originally run backwards.
void
TR_LRAddressTree::updateAiaddSubTree(TR_ParentOfChildNode * indVarNode, TR_ArrayLoop* loop)
{
TR::Node * finalNode = loop->getFinalNode();
bool addInc = loop->getAddInc();
int32_t endInc = _increment;
if (endInc < 0 && !indVarNode->isNull())
{
// array is being run backwards - need to update the start calculation
// to not use the indVarLoad but instead use the finalNode
if (indVarNode->getParent()->getType().isInt64() && !finalNode->getType().isInt64())
{
TR::Node * i2lNode = TR::Node::create(TR::i2l, 1, finalNode->duplicateTree());
indVarNode->setChild(i2lNode);
}
else
{
indVarNode->setChild(finalNode->duplicateTree());
}
if (!addInc)
{
TR::Node * elemSizeInc = TR::Node::create(finalNode, TR::iconst, 0, endInc);
TR::Node * isub = TR::Node::create(TR::isub, 2, finalNode->duplicateTree(), elemSizeInc);
// (64-bit)
// use the same check for aladds as above
if (indVarNode->getParent()->getType().isInt64())
{
TR::Node * i2lNode = TR::Node::create(TR::i2l, 1, isub);
indVarNode->setChild(i2lNode);
}
else
{
indVarNode->setChild(isub);
}
}
}
}
TR::Node *
TR_LRAddressTree::updateMultiply(TR_ParentOfChildNode * multiplyNode)
{
TR::Node * newMul = NULL;
if (!multiplyNode->isNull())
{
// need to convert simple iload into
// imul
// <original iload>
// abs(increment)
if (multiplyNode->getParent()->getType().isInt32())
{
TR::Node * initMulVal = TR::Node::create(multiplyNode->getParent(), TR::iconst, 0,
(_increment > 0 ? _increment : -_increment));
newMul = TR::Node::create(TR::imul, 2, multiplyNode->getChild(), initMulVal);
}
else
{
TR::Node * initMulVal = TR::Node::create(multiplyNode->getParent(), TR::lconst);
initMulVal->setLongInt((_increment > 0 ? _increment : -_increment));
newMul = TR::Node::create(TR::lmul, 2, multiplyNode->getChild(), initMulVal);
}
multiplyNode->setChild(newMul);
}
return newMul;
}
// The code recognizes the following arraycopy patterns is similar to arrayset pattern:
// iTstore #ArrayStore Shadow[<array-shadow>] (where T is the type - one of b, c, s, i, l, d, f)
// aiadd
// aload #ArrayStoreBase (loop invariant)
// isub
// imul
// iload #InductionVariable
// iconst sizeof(T) (imul not present if size is 1)
// iconst -16
// iXload #ArrayLoad Shadow[<array-shadow>] (where T is the type - one of b, c, s, i, l, d, f)
// aiadd
// aload #ArrayLoadBase (loop invariant)
// isub
// imul
// iload #InductionVariable
// iconst sizeof(X) (imul not present if size is 1)
// iconst -16
// istore #InductionVariable
// iadd
// ==>iload #InductionVariable
// iconst -1
// ificmpge --> OutOfLoop
// iload #InductionVariable
// iconst 0 (or iload <val> if loop invariant)
//
bool
TR_LoopReducer::generateArraycopy(TR_InductionVariable * indVar, TR::Block * loopHeader)
{
// for aladds
if (!comp()->cg()->getSupportsReferenceArrayCopy() && !comp()->cg()->getSupportsPrimitiveArrayCopy())
{
dumpOptDetails(comp(), "arraycopy not enabled for this platform\n");
return false;
}
if (loopHeader->getNumberOfRealTreeTops() != 3) // array store, induction variable store, loop comparison
{
dumpOptDetails(comp(), "Loop has %d tree tops - no arrayset reduction\n", loopHeader->getNumberOfRealTreeTops());
return false;
}
TR::TreeTop * arrayStoreTree = loopHeader->getFirstRealTreeTop();
TR::Node * storeNode = arrayStoreTree->getNode();
TR_Arraycopy arraycopyLoop(comp(), indVar);
if (!arraycopyLoop.checkArrayStore(storeNode))
{
return false;
}
TR::TreeTop * indVarStoreTree = arrayStoreTree->getNextTreeTop();
TR::Node * indVarStoreNode = indVarStoreTree->getNode();
if (!arraycopyLoop.getStoreAddress()->checkIndVarStore(indVarStoreNode))
{
return false;
}
TR::TreeTop * loopCmpTree = indVarStoreTree->getNextTreeTop();
TR::Node * loopCmpNode = loopCmpTree->getNode();
if (!arraycopyLoop.checkLoopCmp(loopCmpNode, indVarStoreNode, arraycopyLoop.getStoreAddress()->getIndVar()))
{
return false;
}
bool needWriteBarrier = false;
switch (TR::Compiler->om.writeBarrierType())
{
case gc_modron_wrtbar_oldcheck:
case gc_modron_wrtbar_cardmark:
case gc_modron_wrtbar_cardmark_and_oldcheck:
case gc_modron_wrtbar_cardmark_incremental:
needWriteBarrier = true;
break;
default:
break;
}
//FUTURE: can eliminate wrtbar when src and dest are equal. Currently we don't reduce arraycopy like this.
if (arraycopyLoop.hasWriteBarrier() && needWriteBarrier && !comp()->cg()->getSupportsReferenceArrayCopy())
{
dumpOptDetails(comp(), "arraycopy arraystore tree has write barrier as root and write barriers are enabled but no support for this platform- no arraycopy reduction\n");
return false;
}
int32_t postIncrement = arraycopyLoop.checkForPostIncrement(loopHeader, indVarStoreNode, loopCmpNode, arraycopyLoop.getStoreAddress()->getIndVar()->getLocal());
int32_t storeSize = storeNode->getSize();
#ifdef J9_PROJECT_SPECIFIC
if (storeNode->getType().isBCD() &&
!(storeSize == 1 || storeSize == 2 || storeSize == 4 || storeSize == 8))
{
dumpOptDetails(comp(), "arraycopy storeNode %p is a BCD type (%s) and the storeSize (%d) is not 1,2,4 or 8 so do not reduce arraycopy\n",
storeNode,storeNode->getDataType().toString(),storeSize);
return false;
}