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OMRMachine.cpp
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OMRMachine.cpp
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/*******************************************************************************
* Copyright (c) 2000, 2021 IBM Corp. and others
*
* This program and the accompanying materials are made available under
* the terms of the Eclipse Public License 2.0 which accompanies this
* distribution and is available at http://eclipse.org/legal/epl-2.0
* or the Apache License, Version 2.0 which accompanies this distribution
* and is available at https://www.apache.org/licenses/LICENSE-2.0.
*
* This Source Code may also be made available under the following Secondary
* Licenses when the conditions for such availability set forth in the
* Eclipse Public License, v. 2.0 are satisfied: GNU General Public License,
* version 2 with the GNU Classpath Exception [1] and GNU General Public
* License, version 2 with the OpenJDK Assembly Exception [2].
*
* [1] https://www.gnu.org/software/classpath/license.html
* [2] http://openjdk.java.net/legal/assembly-exception.html
*
* SPDX-License-Identifier: EPL-2.0 OR Apache-2.0 OR GPL-2.0 WITH Classpath-exception-2.0 OR LicenseRef-GPL-2.0 WITH Assembly-exception
*******************************************************************************/
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <algorithm>
#include "codegen/BackingStore.hpp"
#include "codegen/CodeGenerator.hpp"
#include "codegen/ConstantDataSnippet.hpp"
#include "env/FrontEnd.hpp"
#include "codegen/Instruction.hpp"
#include "codegen/Linkage.hpp"
#include "codegen/Linkage_inlines.hpp"
#include "codegen/LiveRegister.hpp"
#include "codegen/Machine.hpp"
#include "codegen/Machine_inlines.hpp"
#include "codegen/MemoryReference.hpp"
#include "codegen/RealRegister.hpp"
#include "codegen/Register.hpp"
#include "codegen/RegisterConstants.hpp"
#include "codegen/RegisterDependency.hpp"
#include "codegen/RegisterRematerializationInfo.hpp"
#include "codegen/RegisterUsage.hpp"
#include "codegen/TreeEvaluator.hpp"
#include "compile/Compilation.hpp"
#include "control/Options.hpp"
#include "control/Options_inlines.hpp"
#include "env/CompilerEnv.hpp"
#include "env/IO.hpp"
#include "env/ObjectModel.hpp"
#include "env/TRMemory.hpp"
#include "il/Block.hpp"
#include "il/DataTypes.hpp"
#include "il/ILOpCodes.hpp"
#include "il/ILOps.hpp"
#include "il/Node.hpp"
#include "il/Symbol.hpp"
#include "il/SymbolReference.hpp"
#include "infra/Assert.hpp"
#include "infra/List.hpp"
#include "ras/Debug.hpp"
#include "x/codegen/OutlinedInstructions.hpp"
#include "codegen/X86Instruction.hpp"
#include "codegen/InstOpCode.hpp"
#include "x/codegen/X86Register.hpp"
extern bool existsNextInstructionToTestFlags(TR::Instruction *startInstr,
uint8_t testMask);
#define IA32_REGISTER_HEAVIEST_WEIGHT 0x0000ffff
#define IA32_REGISTER_INTERFERENCE_WEIGHT 0x00008000
#define IA32_REGISTER_INITIAL_PRESERVED_WEIGHT 0x00001000
#define IA32_REGISTER_ASSOCIATED_WEIGHT 0x00000800
#define IA32_REGISTER_PLACEHOLDER_WEIGHT 0x00000100
#define IA32_REGISTER_BASIC_WEIGHT 0x00000080
#define IA32_REGISTER_PRESERVED_WEIGHT 0x00000002
#define IA32_BYTE_REGISTER_INTERFERENCE_WEIGHT 0x00000004
// Distance (in number of instructions) from the current instruction to search
// while looking for a spill candidate.
//
#define FREE_BEST_REGISTER_SEARCH_DISTANCE 800
// Distance (in number of instructions) from the current instruction before a
// register will be given priority as a spill candidate.
//
#define FREE_BEST_REGISTER_MINIMUM_CANDIDATE_DISTANCE 4
// Candidate register types for freeBestGPRegister
//
enum FreeBestRegisterCandidateTypes
{
BestNonInterferingDiscardableConstant = 0,
BestMayInterfereDiscardableConstant,
BestInterferingDiscardableConstant,
BestNonInterferingDiscardableMemory,
BestMayInterfereDiscardableMemory,
BestInterferingDiscardableMemory,
NonInterferingTarget,
InterferingTarget,
BestNonInterfering,
BestMayInterfere,
BestInterfering,
NumBestRegisters
};
// Significant distances (in number of instructions) between candidate register
// types in freeBestGPRegister
//
static const int16_t freeBestRegisterSignificantDistances[NumBestRegisters][NumBestRegisters] =
{
{ 0, 5, 10, 20, 20, 20, 40, 40, 60, 60, 60 }, // BestNonInterferingDiscardableConstant
{ 0, 0, 10, 20, 20, 20, 40, 40, 60, 60, 60 }, // BestMayInterfereDiscardableConstant
{ 0, 0, 0, 10, 20, 20, 30, 30, 50, 50, 50 }, // BestInterferingDiscardableConstant
{ 0, 0, 0, 0, 5, 10, 40, 40, 60, 60, 60 }, // BestNonInterferingDiscardableMemory
{ 0, 0, 0, 0, 0, 10, 40, 40, 60, 60, 60 }, // BestMayInterfereDiscardableMemory
{ 0, 0, 0, 0, 0, 0, 30, 30, 50, 50, 50 }, // BestInterferingDiscardableMemory
{ 0, 0, 0, 0, 0, 0, 0, 10, 40, 40, 90 }, // NonInterferingTarget
{ 0, 0, 0, 0, 0, 0, 0, 0, 10, 10, 90 }, // InterferingTarget
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 5, 20 }, // BestNonInterfering
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 20 }, // BestMayInterfere
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } // BestInterfering
};
bool existsNextInstructionToTestFlags(TR::Instruction *startInstr,
uint8_t testMask)
{
if (!startInstr)
return false;
TR::Instruction *cursor = startInstr;
do
{
cursor = cursor->getNext();
if (!cursor) break;
// Cursor instruction tests an eflag that is set exclusively by our testMask.
//
if (cursor->getOpCode().getTestedEFlags() & testMask)
{
return true;
}
// Mask out those eflags that are modified by this instruction.
//
testMask = testMask & ~(cursor->getOpCode().getModifiedEFlags());
}
while (testMask &&
cursor->getOpCodeValue() != TR::InstOpCode::label &&
cursor->getOpCodeValue() != TR::InstOpCode::RET &&
cursor->getOpCodeValue() != TR::InstOpCode::RETImm2 &&
cursor->getOpCodeValue() != TR::InstOpCode::retn &&
!cursor->getOpCode().isBranchOp());
return false;
}
static bool registersMayOverlap(TR::Register *reg1, TR::Register *reg2)
{
if (reg1->getStartOfRange() && reg2->getEndOfRange() &&
reg1->getStartOfRange()->getIndex() >= reg2->getEndOfRange()->getIndex())
return false;
if (reg1->getEndOfRange() && reg2->getStartOfRange() &&
reg1->getEndOfRange()->getIndex() <= reg2->getStartOfRange()->getIndex())
return false;
return true;
}
OMR::X86::Machine::Machine
(
uint8_t numIntRegs,
uint8_t numFPRegs,
TR::CodeGenerator *cg,
TR::Register **registerAssociations,
uint8_t numGlobalGPRs,
uint8_t numGlobal8BitGPRs,
uint8_t numGlobalFPRs,
TR::Register **xmmGlobalRegisters,
uint32_t *globalRegisterNumberToRealRegisterMap
)
: OMR::Machine(cg),
_registerAssociations(registerAssociations),
_numGlobalGPRs(numGlobalGPRs),
_numGlobal8BitGPRs(numGlobal8BitGPRs),
_numGlobalFPRs(numGlobalFPRs),
_xmmGlobalRegisters(xmmGlobalRegisters),
_globalRegisterNumberToRealRegisterMap(globalRegisterNumberToRealRegisterMap),
_spilledRegistersList(NULL),
_numGPRs(numIntRegs)
{
self()->initializeFPStackRegisterFile();
_fpTopOfStack = TR_X86FPStackRegister::fpStackEmpty;
self()->resetFPStackRegisters();
self()->resetXMMGlobalRegisters();
for (int i=0; i<TR::NumTypes; i++)
{
_dummyLocal[i] = NULL;
}
self()->clearRegisterAssociations();
}
void OMR::X86::Machine::resetXMMGlobalRegisters()
{
for (int32_t i = 0; i < TR::RealRegister::NumXMMRegisters; i++)
self()->setXMMGlobalRegister(i, NULL);
}
TR_Debug *OMR::X86::Machine::getDebug()
{
return self()->cg()->getDebug();
}
int32_t OMR::X86::Machine::getGlobalReg(TR::RealRegister::RegNum reg)
{
for (int32_t i = 0; i < self()->getLastGlobalFPRRegisterNumber(); i++)
{
if (_globalRegisterNumberToRealRegisterMap[i] == reg)
return i;
}
return -1;
}
TR::RealRegister *
OMR::X86::Machine::findBestFreeGPRegister(TR::Instruction *currentInstruction,
TR::Register *virtReg,
TR_RegisterSizes requestedRegSize,
bool considerUnlatched)
{
int first, last, i;
struct TR_Candidate
{
TR::Register *_virtual;
TR::RealRegister::RegNum _real;
} candidates[16]; // TODO:AMD64: Should be max number of regs of any one kind
int32_t numCandidates = 0;
TR_ASSERT( (virtReg && (virtReg->getKind() == TR_GPR || virtReg->getKind() == TR_FPR || virtReg->getKind() == TR_VRF)),
"OMR::X86::Machine::findBestFreeGPRegister() ==> Unexpected register kind!" );
bool useRegisterAssociations = self()->cg()->enableRegisterAssociations() ? true : false;
bool useRegisterInterferences = self()->cg()->enableRegisterInterferences() ? true : false;
bool useRegisterWeights = self()->cg()->enableRegisterWeights() ? true : false;
if (useRegisterAssociations &&
virtReg->getAssociation() != TR::RealRegister::NoReg &&
self()->getVirtualAssociatedWithReal((TR::RealRegister::RegNum)virtReg->getAssociation()) == virtReg &&
(_registerFile[virtReg->getAssociation()]->getAssignedRegister() == NULL ||
(considerUnlatched && _registerFile[virtReg->getAssociation()]->getState() == TR::RealRegister::Unlatched)))
{
if (_registerFile[virtReg->getAssociation()]->getState() != TR::RealRegister::Locked)
{
if (requestedRegSize != TR_ByteReg || virtReg->getAssociation() <= TR::RealRegister::Last8BitGPR)
{
self()->cg()->setRegisterAssignmentFlag(TR_ByAssociation);
return _registerFile[virtReg->getAssociation()];
}
}
}
switch (requestedRegSize)
{
case TR_ByteReg:
first = TR::RealRegister::FirstGPR;
last = TR::RealRegister::Last8BitGPR;
break;
case TR_HalfWordReg:
case TR_WordReg:
first = TR::RealRegister::FirstGPR;
last = TR::RealRegister::LastAssignableGPR;
break;
case TR_DoubleWordReg:
first = TR::RealRegister::FirstMMXR;
last = TR::RealRegister::LastMMXR;
break;
case TR_QuadWordReg:
first = TR::RealRegister::FirstXMMR;
last = TR::RealRegister::LastXMMR;
break;
default:
TR_ASSERT(0, "unknown register size requested\n");
}
uint32_t weight;
uint32_t bestWeightSoFar = IA32_REGISTER_HEAVIEST_WEIGHT ;
TR_RegisterMask interference = virtReg->getInterference();
TR_RegisterMask byteRegisterInterference = interference & 0x80000000;
TR::RealRegister *freeRegister = NULL;
const TR::X86LinkageProperties &linkageProperties = self()->cg()->getProperties();
for (i = first; i <= last; i++)
{
// Don't consider registers that can't be assigned.
//
if (_registerFile[i]->getState() == TR::RealRegister::Locked)
{
self()->cg()->traceRegWeight(_registerFile[i], 0xdead1);
interference >>= 1;
continue;
}
TR::Register *associatedRegister = useRegisterAssociations ? self()->getVirtualAssociatedWithReal((TR::RealRegister::RegNum)i) : NULL;
if (useRegisterWeights)
{
if ((linkageProperties.isPreservedRegister((TR::RealRegister::RegNum)i) || linkageProperties.isCalleeVolatileRegister((TR::RealRegister::RegNum)i)) &&
_registerFile[i]->getWeight() == IA32_REGISTER_INITIAL_PRESERVED_WEIGHT)
{
if (associatedRegister)
_registerFile[i]->setWeight(IA32_REGISTER_ASSOCIATED_WEIGHT);
else if (_registerFile[i]->getHasBeenAssignedInMethod())
_registerFile[i]->setWeight(IA32_REGISTER_BASIC_WEIGHT);
}
// Get the weight of the real register.
//
weight = _registerFile[i]->getWeight();
// If the real register has an association whose live range does not
// overlap with this one, make it very popular.
//
// Increase the weight if the register interferes with the virtual register.
//
if (associatedRegister && !registersMayOverlap(virtReg, associatedRegister))
weight &= ~(IA32_REGISTER_ASSOCIATED_WEIGHT | IA32_REGISTER_PLACEHOLDER_WEIGHT);
else if ((interference & 1))
weight += IA32_REGISTER_INTERFERENCE_WEIGHT;
// Add tie-breaking weights for preserved registers and for interference
// with byte registers.
//
if (!(interference & 1))
{
if (byteRegisterInterference && i <= TR::RealRegister::Last8BitGPR)
weight += IA32_BYTE_REGISTER_INTERFERENCE_WEIGHT;
if (linkageProperties.isPreservedRegister((TR::RealRegister::RegNum)i))
weight += IA32_REGISTER_PRESERVED_WEIGHT;
}
}
else
{
weight = _registerFile[i]->getWeight();
}
if (((_registerFile[i]->getAssignedRegister() == NULL &&
_registerFile[i]->getState() != TR::RealRegister::Blocked) ||
(considerUnlatched &&
_registerFile[i]->getState() == TR::RealRegister::Unlatched)))
{
self()->cg()->traceRegWeight(_registerFile[i], weight);
if (weight < bestWeightSoFar)
{
freeRegister = _registerFile[i];
bestWeightSoFar = weight;
numCandidates = 0;
}
else if (weight == bestWeightSoFar &&
useRegisterInterferences &&
(weight & IA32_REGISTER_INTERFERENCE_WEIGHT))
{
TR::Register *r = self()->getVirtualAssociatedWithReal((TR::RealRegister::RegNum)i);
if (r && (r->getAssociation() != TR::RealRegister::NoReg) &&
_registerFile[i]->getState() == TR::RealRegister::Free)
{
candidates[numCandidates]._virtual = r;
candidates[numCandidates++]._real = (TR::RealRegister::RegNum)i;
}
}
}
else if (_registerFile[i]->getAssignedRegister() == NULL)
self()->cg()->traceRegWeight(_registerFile[i], 0xdead2);
else
self()->cg()->traceRegWeight(_registerFile[i], 0xdead3);
interference >>= 1;
}
// If there is more than one interfering candidate, choose the one that
// is used farthest away.
//
if (useRegisterInterferences && (numCandidates > 1))
{
TR::Instruction *cursor;
int32_t distance = 0;
for (cursor = currentInstruction->getPrev();
cursor && numCandidates > 1;
cursor = cursor->getPrev())
{
if (cursor->getOpCodeValue() == TR::InstOpCode::proc)
break;
if (cursor->getOpCodeValue() == TR::InstOpCode::assocreg)
continue;
for (i = 0; i < numCandidates; i++)
{
if (cursor->refsRegister(candidates[i]._virtual))
{
self()->cg()->traceRegInterference(virtReg, candidates[i]._virtual, distance);
candidates[i] = candidates[--numCandidates];
}
}
distance++;
}
freeRegister = _registerFile[candidates[0]._real];
}
return freeRegister;
}
TR::RealRegister *OMR::X86::Machine::freeBestGPRegister(TR::Instruction *currentInstruction,
TR::Register *virtReg,
TR_RegisterSizes requestedRegSize,
TR::RealRegister::RegNum targetRegister,
bool considerVirtAsSpillCandidate)
{
TR::Register *candidates[16]; // TODO:AMD64: Should be max number of regs of any one kind
int numCandidates = 0;
int first, last;
TR::Instruction *cursor;
TR::Register *bestRegisters[NumBestRegisters];
int32_t bestDistances[NumBestRegisters];
TR::Register *bestRegister = NULL;
int32_t bestDistance = -1;
int32_t bestType = -1;
int32_t distance = 1;
TR_RegisterMask interference = virtReg->getInterference();
TR_RegisterMask byteRegisterInterference = interference & 0x80000000;
int32_t interferes;
int32_t i, j;
TR::RealRegister *realReg;
TR::Compilation *comp = self()->cg()->comp();
bool useRegisterInterferences = self()->cg()->enableRegisterInterferences() ? true : false;
bool enableRematerialisation = self()->cg()->enableRematerialisation() ? true : false;
TR_ASSERT(virtReg && (virtReg->getKind() == TR_GPR || virtReg->getKind() == TR_FPR || virtReg->getKind() == TR_VRF),
"OMR::X86::Machine::freeBestGPRegister() ==> expecting to free GPRs or XMMRs only!");
switch (requestedRegSize)
{
case TR_ByteReg:
first = TR::RealRegister::FirstGPR;
last = TR::RealRegister::Last8BitGPR;
break;
case TR_HalfWordReg:
case TR_WordReg:
first = TR::RealRegister::FirstGPR;
last = TR::RealRegister::LastAssignableGPR;
break;
case TR_DoubleWordReg:
first = TR::RealRegister::FirstMMXR;
last = TR::RealRegister::LastMMXR;
break;
case TR_QuadWordReg:
first = TR::RealRegister::FirstXMMR;
last = TR::RealRegister::LastXMMR;
break;
default:
TR_ASSERT(0, "unknown register size requested\n");
}
char *bestRegisterTypes[NumBestRegisters] =
{
"non-interfering discardable (from constant) register",
"may interfere discardable (from constant) byte register",
"interfering discardable (from constant) register",
"non-interfering discardable (from memory) register",
"may interfere discardable (from memory) byte register",
"interfering discardable (from memory) register",
"non-interfering target register",
"interfering target register",
"non-interfering register",
"may interfere byte register",
"interfering register"
};
if (targetRegister)
self()->cg()->traceRegisterAssignment("Spill candidates for %R (target %R):", virtReg, _registerFile[targetRegister]);
else
self()->cg()->traceRegisterAssignment("Spill candidates for %R:", virtReg);
for (i = 0; i < NumBestRegisters; i++)
{
bestRegisters[i] = NULL;
bestDistances[i] = 0;
}
// Identify all spillable candidates of the appropriate register type.
//
for (i = first; i <= last; i++)
{
// Don't consider registers that can't be assigned.
//
if (_registerFile[i]->getState() == TR::RealRegister::Locked)
{
continue;
}
realReg = self()->getRealRegister((TR::RealRegister::RegNum)i);
if (realReg->getState() == TR::RealRegister::Assigned)
{
candidates[numCandidates++] = realReg->getAssignedRegister();
if (targetRegister == i)
{
if (useRegisterInterferences && (interference & (1 << (i-1)))) // TODO:AMD64: Use the proper mask value
bestRegisters[InterferingTarget] = realReg->getAssignedRegister();
else
bestRegisters[NonInterferingTarget] = realReg->getAssignedRegister();
}
}
}
if (numCandidates == 0)
{
// If we are trying to find a suitable spill register for a virtual that currently occupies a
// register required in a register dependency, there may not be any suitable spill
// candidates if all available real registers are requested in the register dependency. In
// such a case, where our virtual need not be in a register across the dependency, choose the
// virtual itself as a spill candidate.
//
TR_ASSERT(considerVirtAsSpillCandidate,
"freeBestGPRegister(): could not find any GPR spill candidates for %s\n", self()->getDebug()->getName(virtReg));
bestRegister = virtReg;
}
// From all the spillable candidates identified, choose the most appropriate based on
// its rematerialisation value and its proximity to the current instruction.
//
TR::RealRegister::RegNum registerNumber;
for (cursor = currentInstruction->getPrev();
cursor;
cursor = cursor->getPrev())
{
if (cursor->getOpCodeValue() == TR::InstOpCode::proc)
break;
if (numCandidates == 0)
break;
if (distance > FREE_BEST_REGISTER_SEARCH_DISTANCE)
break;
if (cursor->getOpCodeValue() == TR::InstOpCode::fence)
{
// Don't walk past the start of the super (extended) block.
// This is primarily for the non-linear register assigner because
// the linear RA won't even have values live beyond the start of the
// super block
TR::Node *node = cursor->getNode();
if (node->getOpCodeValue() == TR::BBStart &&
!node->getBlock()->isExtensionOfPreviousBlock())
break;
}
if (cursor->getOpCodeValue() == TR::InstOpCode::fence)
continue;
for (i = 0; i < numCandidates; i++)
{
registerNumber = toRealRegister(candidates[i]->getAssignedRegister())->getRegisterNumber();
// Look for case where we come across the dependency reference for
// the target register and the desired real register is still one
// of the remaining candidates.
//
if (virtReg->getAssociation() != TR::RealRegister::NoReg &&
cursor->dependencyRefsRegister(virtReg))
{
for (j = 0; j < numCandidates; ++j)
{
realReg = toRealRegister(candidates[j]->getAssignedRegister());
if (realReg->getRegisterNumber() == virtReg->getAssociation())
{
bestRegister = candidates[j];
self()->cg()->setRegisterAssignmentFlag(TR_ByAssociation);
goto done; // Rude exit
}
}
}
interferes = interference & (1 << (registerNumber-1)); // TODO:AMD64: Use the proper mask value
if (cursor->refsRegister(candidates[i]))
{
if (distance > FREE_BEST_REGISTER_MINIMUM_CANDIDATE_DISTANCE)
{
TR_RematerializationInfo *info = candidates[i]->isDiscardable() ? candidates[i]->getRematerializationInfo() : NULL;
if (enableRematerialisation && info && info->isActive())
{
if (info->isRematerializableFromMemory() || info->isRematerializableFromAddress())
{
if (interferes)
j = BestInterferingDiscardableMemory;
else if (byteRegisterInterference && registerNumber <= TR::RealRegister::Last8BitGPR)
j = BestMayInterfereDiscardableMemory;
else
j = BestNonInterferingDiscardableMemory;
}
else
{
TR_ASSERT(candidates[i]->getRematerializationInfo()->isRematerializableFromConstant(),
"freeBestGPRegister => unknown rematerialisable register type!");
if (interferes)
j = BestInterferingDiscardableConstant;
else if (byteRegisterInterference && registerNumber <= TR::RealRegister::Last8BitGPR)
j = BestMayInterfereDiscardableConstant;
else
j = BestNonInterferingDiscardableConstant;
}
if (debug("dumpRemat"))
{
diagnostic("---> Identified %s rematerialisation spill "
"candidate %s at instruction %s in %s\n",
self()->getDebug()->toString(info), self()->getDebug()->getName(candidates[i]),
self()->getDebug()->getName(currentInstruction), comp->signature());
}
}
else
{
if (useRegisterInterferences)
{
if (interferes)
j = BestInterfering;
else if (byteRegisterInterference && registerNumber <= TR::RealRegister::Last8BitGPR)
j = BestMayInterfere;
else
j = BestNonInterfering;
}
else
{
j = BestNonInterfering;
}
}
bestRegisters[j] = candidates[i];
bestDistances[j] = distance;
bestType = j;
if (useRegisterInterferences && (bestRegisters[j] == bestRegisters[InterferingTarget]))
bestDistances[InterferingTarget] = distance;
else if (bestRegisters[j] == bestRegisters[NonInterferingTarget])
bestDistances[NonInterferingTarget] = distance;
}
bestRegister = candidates[i];
bestDistance = distance;
candidates[i] = candidates[--numCandidates];
}
}
distance++;
}
// Sort out the remaining candidates
//
for (i = numCandidates-1; i >= 0; i--)
{
registerNumber = toRealRegister(candidates[i]->getAssignedRegister())->getRegisterNumber();
interferes = interference & (1 << (registerNumber-1)); // TODO:AMD64: Use the proper mask value
TR_RematerializationInfo *info =
candidates[i]->isDiscardable() ? candidates[i]->getRematerializationInfo() : NULL;
if (enableRematerialisation && info && info->isActive())
{
if (candidates[i]->getRematerializationInfo()->isRematerializableFromMemory() ||
candidates[i]->getRematerializationInfo()->isRematerializableFromAddress())
{
if (interferes)
j = BestInterferingDiscardableMemory;
else if (byteRegisterInterference && registerNumber <= TR::RealRegister::Last8BitGPR)
j = BestMayInterfereDiscardableMemory;
else
j = BestNonInterferingDiscardableMemory;
}
else
{
if (interferes)
j = BestInterferingDiscardableConstant;
else if (byteRegisterInterference && registerNumber <= TR::RealRegister::Last8BitGPR)
j = BestMayInterfereDiscardableConstant;
else
j = BestNonInterferingDiscardableConstant;
}
}
else
{
if (useRegisterInterferences)
{
if (interferes)
j = BestInterfering;
else if (byteRegisterInterference && registerNumber <= TR::RealRegister::Last8BitGPR)
j = BestMayInterfere;
else
j = BestNonInterfering;
}
else
{
j = BestNonInterfering;
}
}
bestRegister = bestRegisters[j] = candidates[i];
bestDistance = bestDistances[j] = distance;
bestType = j;
if (useRegisterInterferences && bestRegisters[j] == bestRegisters[InterferingTarget])
bestDistances[InterferingTarget] = distance;
else if (bestRegisters[j] == bestRegisters[NonInterferingTarget])
bestDistances[NonInterferingTarget] = distance;
}
if (bestType >= 0)
{
for (i = 0; i < NumBestRegisters; i++)
{
if (bestRegisters[i])
self()->cg()->traceRegisterAssignment(" (best %s %R at distance %d)", bestRegisters[i], bestRegisterTypes[i], bestDistances[i]);
}
// See if there is a candidate with higher priority close enough to the
// farthest candidate to be better.
// Ignore candidates that are less than half the distance to the
// farthest candidate.
//
for (i = 0; i < bestType; i++)
{
if (bestDistances[i] &&
(bestDistance - bestDistances[i]) < freeBestRegisterSignificantDistances[i][bestType] &&
(bestDistance - bestDistances[i]) < bestDistances[i])
{
bestRegister = bestRegisters[i];
bestDistance = bestDistances[i];
bestType = i;
break;
}
}
}
done:
// Set bestDiscardableRegister if the chosen register is discardable.
//
TR::Register *bestDiscardableRegister =
(bestRegister->isDiscardable() &&
bestRegister->getRematerializationInfo()->isActive()) ? bestRegister : NULL;
TR::RealRegister *best = toRealRegister(bestRegister->getAssignedRegister());
TR::Instruction *instr = NULL;
if (enableRematerialisation && bestDiscardableRegister)
{
TR_RematerializationInfo *info = bestDiscardableRegister->getRematerializationInfo();
if (info->isRematerializableFromMemory())
{
TR::MemoryReference *tempMR = generateX86MemoryReference(info->getSymbolReference(), self()->cg());
if (info->isIndirect())
{
TR_ASSERT(info->getBaseRegister()->getAssignedRegister(),
"base register %s of dependent rematerialisable register %s must be assigned\n",
self()->getDebug()->getName(info->getBaseRegister()),
self()->getDebug()->getName(bestDiscardableRegister));
tempMR->setBaseRegister(info->getBaseRegister()->getAssignedRegister());
}
if (info->getDataType() == TR_RematerializableFloat)
{
instr = generateRegMemInstruction(currentInstruction, TR::InstOpCode::MOVSSRegMem, best, tempMR, self()->cg());
}
else
{
instr = TR::TreeEvaluator::insertLoadMemory(0, best, tempMR, info->getDataType(), self()->cg(), currentInstruction);
}
}
else if (info->isRematerializableFromAddress())
{
TR::MemoryReference *tempMR = generateX86MemoryReference(info->getSymbolReference(), self()->cg());
instr = generateRegMemInstruction(currentInstruction, TR::InstOpCode::LEARegMem(), best, tempMR, self()->cg());
}
else
{
if (info->getDataType() == TR_RematerializableFloat)
{
TR::MemoryReference* tempMR = generateX86MemoryReference(self()->cg()->findOrCreate4ByteConstant(currentInstruction->getNode(), static_cast<int32_t>(info->getConstant())), self()->cg());
instr = generateRegMemInstruction(currentInstruction, TR::InstOpCode::MOVSSRegMem, best, tempMR, self()->cg());
}
else
{
instr = TR::TreeEvaluator::insertLoadConstant(0, best, info->getConstant(), info->getDataType(), self()->cg(), currentInstruction);
}
}
self()->cg()->traceRAInstruction(instr);
if (comp->getDebug())
comp->getDebug()->addInstructionComment(instr, "$REMAT");
info->setRematerialized();
bestDiscardableRegister->setAssignedRegister(NULL);
if (debug("dumpRemat"))
{
if (info->isIndirect())
diagnostic("---> Spilling %s rematerialisable register %s (type %d, base %s)\n",
self()->getDebug()->toString(info),
self()->getDebug()->getName(bestDiscardableRegister),
info->getDataType(),
self()->getDebug()->getName(info->getBaseRegister()));
else
diagnostic("---> Spilling %s rematerialisable register %s (type %d)\n",
self()->getDebug()->toString(info),
self()->getDebug()->getName(bestDiscardableRegister),
info->getDataType());
}
}
else
{
bool containsInternalPointer = false;
if (bestRegister->containsInternalPointer())
containsInternalPointer = true;
TR_BackingStore *location = NULL;
int32_t offset = 0;
if ((bestRegister->getKind() == TR_FPR))
{
if (bestRegister->getBackingStorage())
{
// If there is backing storage associated with a register, it means the
// backing store wasn't returned to the free list and it can be used.
//
location = bestRegister->getBackingStorage();
}
else
{
location = self()->cg()->allocateSpill(bestRegister->isSinglePrecision()? 4 : 8, false, &offset);
}
}
else if ((bestRegister->getKind() == TR_VRF))
{
if (bestRegister->getBackingStorage())
{
// If there is backing storage associated with a register, it means the
// backing store wasn't returned to the free list and it can be used.
//
location = bestRegister->getBackingStorage();
}
else
{
location = self()->cg()->allocateSpill(16, false, &offset);
}
}
else
{
if (containsInternalPointer)
{
if (bestRegister->getBackingStorage())
{
// If there is backing storage associated with a register, it means the
// backing store wasn't returned to the free list and it can be used.
//
location = bestRegister->getBackingStorage();
}
else
{
location = self()->cg()->allocateInternalPointerSpill(bestRegister->getPinningArrayPointer());
}
}
else
{
if (bestRegister->getBackingStorage())
{
// If there is backing storage associated with a register, it means the
// backing store wasn't returned to the free list and it can be used.
//
location = bestRegister->getBackingStorage();
location->setMaxSpillDepth(self()->cg()->getCurrentPathDepth());
if (self()->cg()->getDebug())
self()->cg()->traceRegisterAssignment("find or create free backing store (%p) for %s with initial max spill depth of %d and adding to list\n",
location,self()->cg()->getDebug()->getName(bestRegister),self()->cg()->getCurrentPathDepth());
}
else
{
location = self()->cg()->allocateSpill(static_cast<int32_t>(TR::Compiler->om.sizeofReferenceAddress()), bestRegister->containsCollectedReference(), &offset);
location->setMaxSpillDepth(self()->cg()->getCurrentPathDepth());
if (self()->cg()->getDebug())
self()->cg()->traceRegisterAssignment("find or create free backing store (%p) for %s with initial max spill depth of %d and adding to list\n",
location,self()->cg()->getDebug()->getName(bestRegister),self()->cg()->getCurrentPathDepth());
}
}
}
if (self()->cg()->getUseNonLinearRegisterAssigner())
{
TR_ASSERT(bestRegister, "did not find bestRegister");
TR_ASSERT(self()->cg()->getSpilledRegisterList(), "no spilled reg list allocated");
if (self()->getDebug())
self()->cg()->traceRegisterAssignment("adding %s to the spilledRegisterList)\n", self()->getDebug()->getName(bestRegister));
self()->cg()->getSpilledRegisterList()->push_front(bestRegister);
}
TR::MemoryReference *tempMR = generateX86MemoryReference(location->getSymbolReference(), offset, self()->cg());
bestRegister->setBackingStorage(location);
TR_ASSERT(offset == 0 || offset == 4, "assertion failure");
bestRegister->setIsSpilledToSecondHalf(offset > 0);
bestRegister->setAssignedRegister(NULL);
self()->cg()->getSpilledIntRegisters().push_front(bestRegister);
TR::InstOpCode::Mnemonic op;
if (bestRegister->getKind() == TR_FPR)
{
op = (bestRegister->isSinglePrecision()) ? TR::InstOpCode::MOVSSRegMem : (self()->cg()->getXMMDoubleLoadOpCode());
}
else if (bestRegister->getKind() == TR_VRF)
{
op = TR::InstOpCode::MOVDQURegMem;
}
else
{
op = TR::InstOpCode::LRegMem();
}
instr = new (self()->cg()->trHeapMemory()) TR::X86RegMemInstruction(currentInstruction, op, best, tempMR, self()->cg());
self()->cg()->traceRegFreed(bestRegister, best);
self()->cg()->traceRAInstruction(instr);
}
if (enableRematerialisation)
self()->cg()->deactivateDependentDiscardableRegisters(bestRegister);
best->setAssignedRegister(NULL);
best->setState(TR::RealRegister::Free);
return best;
}
#if defined(_MSC_VER) && !defined(DEBUG)
#pragma optimize("g", on)
#endif
TR::RealRegister *OMR::X86::Machine::reverseGPRSpillState(TR::Instruction *currentInstruction,
TR::Register *spilledRegister,
TR::RealRegister *targetRegister,
TR_RegisterSizes requestedRegSize)
{
TR::Compilation *comp = self()->cg()->comp();
if (targetRegister == NULL)
{
targetRegister = self()->findBestFreeGPRegister(currentInstruction, spilledRegister, requestedRegSize);
if (targetRegister == NULL)
{
targetRegister = self()->freeBestGPRegister(currentInstruction, spilledRegister, requestedRegSize);
}
}
TR_BackingStore *location = spilledRegister->getBackingStorage();
// If the virtual register has better spill placement info, see if the spill
// can be moved to later in the instruction stream
//
if (self()->cg()->enableBetterSpillPlacements())
{
if (spilledRegister->hasBetterSpillPlacement())
{
TR::Instruction *betterInstruction = self()->cg()->findBetterSpillPlacement(spilledRegister, targetRegister->getRegisterNumber());
if (betterInstruction)
{
self()->cg()->setRegisterAssignmentFlag(TR_HasBetterSpillPlacement);
currentInstruction = betterInstruction;
}
}
self()->cg()->removeBetterSpillPlacementCandidate(targetRegister);
}
if (self()->cg()->getUseNonLinearRegisterAssigner())
{
self()->cg()->getSpilledRegisterList()->remove(spilledRegister);
}
self()->cg()->getSpilledIntRegisters().remove(spilledRegister);
if (self()->cg()->enableRematerialisation())
{
self()->cg()->reactivateDependentDiscardableRegisters(spilledRegister);