-
Notifications
You must be signed in to change notification settings - Fork 626
/
f4.rs
555 lines (470 loc) · 19.7 KB
/
f4.rs
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
use core::ptr::write_volatile;
use core::sync::atomic::{fence, AtomicBool, Ordering};
use embassy_sync::waitqueue::AtomicWaker;
use pac::flash::regs::Sr;
use pac::FLASH_SIZE;
use super::{FlashBank, FlashRegion, FlashSector, FLASH_REGIONS, WRITE_SIZE};
use crate::flash::Error;
use crate::pac;
#[allow(missing_docs)] // TODO
#[cfg(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f469, stm32f479))]
mod alt_regions {
use core::marker::PhantomData;
use embassy_hal_internal::PeripheralRef;
use stm32_metapac::FLASH_SIZE;
use crate::_generated::flash_regions::{BANK1_REGION1, BANK1_REGION2, BANK1_REGION3};
use crate::flash::{asynch, Async, Bank1Region1, Bank1Region2, Blocking, Error, Flash, FlashBank, FlashRegion};
use crate::peripherals::FLASH;
pub const ALT_BANK1_REGION3: FlashRegion = FlashRegion {
size: 3 * BANK1_REGION3.erase_size,
..BANK1_REGION3
};
pub const ALT_BANK2_REGION1: FlashRegion = FlashRegion {
bank: FlashBank::Bank2,
base: BANK1_REGION1.base + FLASH_SIZE as u32 / 2,
..BANK1_REGION1
};
pub const ALT_BANK2_REGION2: FlashRegion = FlashRegion {
bank: FlashBank::Bank2,
base: BANK1_REGION2.base + FLASH_SIZE as u32 / 2,
..BANK1_REGION2
};
pub const ALT_BANK2_REGION3: FlashRegion = FlashRegion {
bank: FlashBank::Bank2,
base: BANK1_REGION3.base + FLASH_SIZE as u32 / 2,
size: 3 * BANK1_REGION3.erase_size,
..BANK1_REGION3
};
pub const ALT_FLASH_REGIONS: [&FlashRegion; 6] = [
&BANK1_REGION1,
&BANK1_REGION2,
&ALT_BANK1_REGION3,
&ALT_BANK2_REGION1,
&ALT_BANK2_REGION2,
&ALT_BANK2_REGION3,
];
pub struct AltBank1Region3<'d, MODE = Async>(pub &'static FlashRegion, PeripheralRef<'d, FLASH>, PhantomData<MODE>);
pub struct AltBank2Region1<'d, MODE = Async>(pub &'static FlashRegion, PeripheralRef<'d, FLASH>, PhantomData<MODE>);
pub struct AltBank2Region2<'d, MODE = Async>(pub &'static FlashRegion, PeripheralRef<'d, FLASH>, PhantomData<MODE>);
pub struct AltBank2Region3<'d, MODE = Async>(pub &'static FlashRegion, PeripheralRef<'d, FLASH>, PhantomData<MODE>);
pub struct AltFlashLayout<'d, MODE = Async> {
pub bank1_region1: Bank1Region1<'d, MODE>,
pub bank1_region2: Bank1Region2<'d, MODE>,
pub bank1_region3: AltBank1Region3<'d, MODE>,
pub bank2_region1: AltBank2Region1<'d, MODE>,
pub bank2_region2: AltBank2Region2<'d, MODE>,
pub bank2_region3: AltBank2Region3<'d, MODE>,
}
impl<'d> Flash<'d> {
pub fn into_alt_regions(self) -> AltFlashLayout<'d, Async> {
assert!(!super::is_default_layout());
// SAFETY: We never expose the cloned peripheral references, and their instance is not public.
// Also, all async flash region operations are protected with a mutex.
let p = self.inner;
AltFlashLayout {
bank1_region1: Bank1Region1(&BANK1_REGION1, unsafe { p.clone_unchecked() }, PhantomData),
bank1_region2: Bank1Region2(&BANK1_REGION2, unsafe { p.clone_unchecked() }, PhantomData),
bank1_region3: AltBank1Region3(&ALT_BANK1_REGION3, unsafe { p.clone_unchecked() }, PhantomData),
bank2_region1: AltBank2Region1(&ALT_BANK2_REGION1, unsafe { p.clone_unchecked() }, PhantomData),
bank2_region2: AltBank2Region2(&ALT_BANK2_REGION2, unsafe { p.clone_unchecked() }, PhantomData),
bank2_region3: AltBank2Region3(&ALT_BANK2_REGION3, unsafe { p.clone_unchecked() }, PhantomData),
}
}
pub fn into_alt_blocking_regions(self) -> AltFlashLayout<'d, Blocking> {
assert!(!super::is_default_layout());
// SAFETY: We never expose the cloned peripheral references, and their instance is not public.
// Also, all blocking flash region operations are protected with a cs.
let p = self.inner;
AltFlashLayout {
bank1_region1: Bank1Region1(&BANK1_REGION1, unsafe { p.clone_unchecked() }, PhantomData),
bank1_region2: Bank1Region2(&BANK1_REGION2, unsafe { p.clone_unchecked() }, PhantomData),
bank1_region3: AltBank1Region3(&ALT_BANK1_REGION3, unsafe { p.clone_unchecked() }, PhantomData),
bank2_region1: AltBank2Region1(&ALT_BANK2_REGION1, unsafe { p.clone_unchecked() }, PhantomData),
bank2_region2: AltBank2Region2(&ALT_BANK2_REGION2, unsafe { p.clone_unchecked() }, PhantomData),
bank2_region3: AltBank2Region3(&ALT_BANK2_REGION3, unsafe { p.clone_unchecked() }, PhantomData),
}
}
}
macro_rules! foreach_altflash_region {
($type_name:ident, $region:ident) => {
impl<MODE> $type_name<'_, MODE> {
pub fn blocking_read(&mut self, offset: u32, bytes: &mut [u8]) -> Result<(), Error> {
crate::flash::common::blocking_read(self.0.base, self.0.size, offset, bytes)
}
}
impl $type_name<'_, Async> {
pub async fn read(&mut self, offset: u32, bytes: &mut [u8]) -> Result<(), Error> {
self.blocking_read(offset, bytes)
}
pub async fn write(&mut self, offset: u32, bytes: &[u8]) -> Result<(), Error> {
let _guard = asynch::REGION_ACCESS.lock().await;
unsafe { asynch::write_chunked(self.0.base, self.0.size, offset, bytes).await }
}
pub async fn erase(&mut self, from: u32, to: u32) -> Result<(), Error> {
let _guard = asynch::REGION_ACCESS.lock().await;
unsafe { asynch::erase_sectored(self.0.base, from, to).await }
}
}
impl<MODE> embedded_storage::nor_flash::ErrorType for $type_name<'_, MODE> {
type Error = Error;
}
impl<MODE> embedded_storage::nor_flash::ReadNorFlash for $type_name<'_, MODE> {
const READ_SIZE: usize = crate::flash::READ_SIZE;
fn read(&mut self, offset: u32, bytes: &mut [u8]) -> Result<(), Self::Error> {
self.blocking_read(offset, bytes)
}
fn capacity(&self) -> usize {
self.0.size as usize
}
}
impl embedded_storage_async::nor_flash::ReadNorFlash for $type_name<'_, Async> {
const READ_SIZE: usize = crate::flash::READ_SIZE;
async fn read(&mut self, offset: u32, bytes: &mut [u8]) -> Result<(), Self::Error> {
self.read(offset, bytes).await
}
fn capacity(&self) -> usize {
self.0.size as usize
}
}
impl embedded_storage_async::nor_flash::NorFlash for $type_name<'_, Async> {
const WRITE_SIZE: usize = $region.write_size as usize;
const ERASE_SIZE: usize = $region.erase_size as usize;
async fn write(&mut self, offset: u32, bytes: &[u8]) -> Result<(), Self::Error> {
self.write(offset, bytes).await
}
async fn erase(&mut self, from: u32, to: u32) -> Result<(), Self::Error> {
self.erase(from, to).await
}
}
};
}
foreach_altflash_region!(AltBank1Region3, ALT_BANK1_REGION3);
foreach_altflash_region!(AltBank2Region1, ALT_BANK2_REGION1);
foreach_altflash_region!(AltBank2Region2, ALT_BANK2_REGION2);
foreach_altflash_region!(AltBank2Region3, ALT_BANK2_REGION3);
}
#[cfg(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f469, stm32f479))]
pub use alt_regions::*;
static WAKER: AtomicWaker = AtomicWaker::new();
static DATA_CACHE_WAS_ENABLED: AtomicBool = AtomicBool::new(false);
impl FlashSector {
const fn snb(&self) -> u8 {
((self.bank as u8) << 4) + self.index_in_bank
}
}
#[cfg(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f469, stm32f479))]
pub(crate) fn is_default_layout() -> bool {
!pac::FLASH.optcr().read().db1m()
}
#[cfg(not(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f469, stm32f479)))]
pub(crate) const fn is_default_layout() -> bool {
true
}
#[cfg(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f469, stm32f479))]
pub fn get_flash_regions() -> &'static [&'static FlashRegion] {
if is_default_layout() {
&FLASH_REGIONS
} else {
&ALT_FLASH_REGIONS
}
}
#[cfg(not(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f469, stm32f479)))]
pub const fn get_flash_regions() -> &'static [&'static FlashRegion] {
&FLASH_REGIONS
}
pub(crate) unsafe fn on_interrupt() {
// Clear IRQ flags
pac::FLASH.sr().write(|w| {
w.set_operr(true);
w.set_eop(true);
});
WAKER.wake();
}
pub(crate) unsafe fn lock() {
pac::FLASH.cr().modify(|w| w.set_lock(true));
}
pub(crate) unsafe fn unlock() {
if pac::FLASH.cr().read().lock() {
pac::FLASH.keyr().write_value(0x4567_0123);
pac::FLASH.keyr().write_value(0xCDEF_89AB);
}
}
pub(crate) unsafe fn enable_write() {
assert_eq!(0, WRITE_SIZE % 4);
save_data_cache_state();
pac::FLASH.cr().write(|w| {
w.set_pg(true);
w.set_psize(pac::flash::vals::Psize::PSIZE32);
w.set_eopie(true);
w.set_errie(true);
});
}
pub(crate) unsafe fn disable_write() {
pac::FLASH.cr().write(|w| {
w.set_pg(false);
w.set_eopie(false);
w.set_errie(false);
});
restore_data_cache_state();
}
pub(crate) unsafe fn enable_blocking_write() {
assert_eq!(0, WRITE_SIZE % 4);
save_data_cache_state();
pac::FLASH.cr().write(|w| {
w.set_pg(true);
w.set_psize(pac::flash::vals::Psize::PSIZE32);
});
}
pub(crate) unsafe fn disable_blocking_write() {
pac::FLASH.cr().write(|w| w.set_pg(false));
restore_data_cache_state();
}
pub(crate) async unsafe fn write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> {
write_start(start_address, buf);
wait_ready().await
}
pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> {
write_start(start_address, buf);
blocking_wait_ready()
}
unsafe fn write_start(start_address: u32, buf: &[u8; WRITE_SIZE]) {
let mut address = start_address;
for val in buf.chunks(4) {
write_volatile(address as *mut u32, u32::from_le_bytes(val.try_into().unwrap()));
address += val.len() as u32;
// prevents parallelism errors
fence(Ordering::SeqCst);
}
}
pub(crate) async unsafe fn erase_sector(sector: &FlashSector) -> Result<(), Error> {
save_data_cache_state();
trace!("Erasing sector number {}", sector.snb());
pac::FLASH.cr().modify(|w| {
w.set_ser(true);
w.set_snb(sector.snb());
w.set_eopie(true);
w.set_errie(true);
});
pac::FLASH.cr().modify(|w| {
w.set_strt(true);
});
let ret: Result<(), Error> = wait_ready().await;
pac::FLASH.cr().modify(|w| {
w.set_eopie(false);
w.set_errie(false);
});
clear_all_err();
restore_data_cache_state();
ret
}
pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), Error> {
save_data_cache_state();
trace!("Blocking erasing sector number {}", sector.snb());
pac::FLASH.cr().modify(|w| {
w.set_ser(true);
w.set_snb(sector.snb())
});
pac::FLASH.cr().modify(|w| {
w.set_strt(true);
});
let ret: Result<(), Error> = blocking_wait_ready();
clear_all_err();
restore_data_cache_state();
ret
}
pub(crate) fn clear_all_err() {
// read and write back the same value.
// This clears all "write 1 to clear" bits.
pac::FLASH.sr().modify(|_| {});
}
pub(crate) async fn wait_ready() -> Result<(), Error> {
use core::future::poll_fn;
use core::task::Poll;
poll_fn(|cx| {
WAKER.register(cx.waker());
let sr = pac::FLASH.sr().read();
if !sr.bsy() {
Poll::Ready(get_result(sr))
} else {
return Poll::Pending;
}
})
.await
}
unsafe fn blocking_wait_ready() -> Result<(), Error> {
loop {
let sr = pac::FLASH.sr().read();
if !sr.bsy() {
return get_result(sr);
}
}
}
fn get_result(sr: Sr) -> Result<(), Error> {
if sr.pgserr() {
Err(Error::Seq)
} else if sr.pgperr() {
Err(Error::Parallelism)
} else if sr.pgaerr() {
Err(Error::Unaligned)
} else if sr.wrperr() {
Err(Error::Protected)
} else {
Ok(())
}
}
fn save_data_cache_state() {
let dual_bank = get_flash_regions().last().unwrap().bank == FlashBank::Bank2;
if dual_bank {
// Disable data cache during write/erase if there are two banks, see errata 2.2.12
let dcen = pac::FLASH.acr().read().dcen();
DATA_CACHE_WAS_ENABLED.store(dcen, Ordering::Relaxed);
if dcen {
pac::FLASH.acr().modify(|w| w.set_dcen(false));
}
}
}
fn restore_data_cache_state() {
let dual_bank = get_flash_regions().last().unwrap().bank == FlashBank::Bank2;
if dual_bank {
// Restore data cache if it was enabled
let dcen = DATA_CACHE_WAS_ENABLED.load(Ordering::Relaxed);
if dcen {
// Reset data cache before we enable it again
pac::FLASH.acr().modify(|w| w.set_dcrst(true));
pac::FLASH.acr().modify(|w| w.set_dcrst(false));
pac::FLASH.acr().modify(|w| w.set_dcen(true))
}
}
}
pub(crate) fn assert_not_corrupted_read(end_address: u32) {
#[allow(unused)]
const REVISION_3: u16 = 0x2001;
#[allow(unused)]
let second_bank_read =
get_flash_regions().last().unwrap().bank == FlashBank::Bank2 && end_address > (FLASH_SIZE / 2) as u32;
#[cfg(any(
feature = "stm32f427ai",
feature = "stm32f427ii",
feature = "stm32f427vi",
feature = "stm32f427zi",
feature = "stm32f429ai",
feature = "stm32f429bi",
feature = "stm32f429ii",
feature = "stm32f429ni",
feature = "stm32f429vi",
feature = "stm32f429zi",
feature = "stm32f437ai",
feature = "stm32f437ii",
feature = "stm32f437vi",
feature = "stm32f437zi",
feature = "stm32f439ai",
feature = "stm32f439bi",
feature = "stm32f439ii",
feature = "stm32f439ni",
feature = "stm32f439vi",
feature = "stm32f439zi",
))]
if second_bank_read && pac::DBGMCU.idcode().read().rev_id() < REVISION_3 && !pa12_is_output_pull_low() {
panic!("Read corruption for stm32f42xxI and stm32f43xxI when PA12 is in use for chips below revision 3, see errata 2.2.11");
}
#[cfg(any(
feature = "stm32f427ag",
feature = "stm32f427ig",
feature = "stm32f427vg",
feature = "stm32f427zg",
feature = "stm32f429ag",
feature = "stm32f429bg",
feature = "stm32f429ig",
feature = "stm32f429ng",
feature = "stm32f429vg",
feature = "stm32f429zg",
feature = "stm32f437ig",
feature = "stm32f437vg",
feature = "stm32f437zg",
feature = "stm32f439bg",
feature = "stm32f439ig",
feature = "stm32f439ng",
feature = "stm32f439vg",
feature = "stm32f439zg",
))]
if second_bank_read && pac::DBGMCU.idcode().read().rev_id() < REVISION_3 && !pa12_is_output_pull_low() {
panic!("Read corruption for stm32f42xxG and stm32f43xxG in dual bank mode when PA12 is in use for chips below revision 3, see errata 2.2.11");
}
}
#[allow(unused)]
fn pa12_is_output_pull_low() -> bool {
use pac::gpio::vals;
use pac::GPIOA;
const PIN: usize = 12;
GPIOA.moder().read().moder(PIN) == vals::Moder::OUTPUT
&& GPIOA.pupdr().read().pupdr(PIN) == vals::Pupdr::PULLDOWN
&& GPIOA.odr().read().odr(PIN) == vals::Odr::LOW
}
#[cfg(test)]
mod tests {
use super::*;
use crate::flash::{get_sector, FlashBank};
#[test]
#[cfg(stm32f429)]
fn can_get_sector() {
const SMALL_SECTOR_SIZE: u32 = 16 * 1024;
const MEDIUM_SECTOR_SIZE: u32 = 64 * 1024;
const LARGE_SECTOR_SIZE: u32 = 128 * 1024;
let assert_sector = |snb: u8, index_in_bank: u8, start: u32, size: u32, address: u32| {
let sector = get_sector(address, &FLASH_REGIONS);
assert_eq!(snb, sector.snb());
assert_eq!(
FlashSector {
bank: FlashBank::Bank1,
index_in_bank,
start,
size
},
sector
);
};
assert_sector(0x00, 0, 0x0800_0000, SMALL_SECTOR_SIZE, 0x0800_0000);
assert_sector(0x00, 0, 0x0800_0000, SMALL_SECTOR_SIZE, 0x0800_3FFF);
assert_sector(0x03, 3, 0x0800_C000, SMALL_SECTOR_SIZE, 0x0800_C000);
assert_sector(0x03, 3, 0x0800_C000, SMALL_SECTOR_SIZE, 0x0800_FFFF);
assert_sector(0x04, 4, 0x0801_0000, MEDIUM_SECTOR_SIZE, 0x0801_0000);
assert_sector(0x04, 4, 0x0801_0000, MEDIUM_SECTOR_SIZE, 0x0801_FFFF);
assert_sector(0x05, 5, 0x0802_0000, LARGE_SECTOR_SIZE, 0x0802_0000);
assert_sector(0x05, 5, 0x0802_0000, LARGE_SECTOR_SIZE, 0x0803_FFFF);
assert_sector(0x0B, 11, 0x080E_0000, LARGE_SECTOR_SIZE, 0x080E_0000);
assert_sector(0x0B, 11, 0x080E_0000, LARGE_SECTOR_SIZE, 0x080F_FFFF);
let assert_sector = |snb: u8, bank: FlashBank, index_in_bank: u8, start: u32, size: u32, address: u32| {
let sector = get_sector(address, &ALT_FLASH_REGIONS);
assert_eq!(snb, sector.snb());
assert_eq!(
FlashSector {
bank,
index_in_bank,
start,
size
},
sector
)
};
assert_sector(0x00, FlashBank::Bank1, 0, 0x0800_0000, SMALL_SECTOR_SIZE, 0x0800_0000);
assert_sector(0x00, FlashBank::Bank1, 0, 0x0800_0000, SMALL_SECTOR_SIZE, 0x0800_3FFF);
assert_sector(0x03, FlashBank::Bank1, 3, 0x0800_C000, SMALL_SECTOR_SIZE, 0x0800_C000);
assert_sector(0x03, FlashBank::Bank1, 3, 0x0800_C000, SMALL_SECTOR_SIZE, 0x0800_FFFF);
assert_sector(0x04, FlashBank::Bank1, 4, 0x0801_0000, MEDIUM_SECTOR_SIZE, 0x0801_0000);
assert_sector(0x04, FlashBank::Bank1, 4, 0x0801_0000, MEDIUM_SECTOR_SIZE, 0x0801_FFFF);
assert_sector(0x05, FlashBank::Bank1, 5, 0x0802_0000, LARGE_SECTOR_SIZE, 0x0802_0000);
assert_sector(0x05, FlashBank::Bank1, 5, 0x0802_0000, LARGE_SECTOR_SIZE, 0x0803_FFFF);
assert_sector(0x07, FlashBank::Bank1, 7, 0x0806_0000, LARGE_SECTOR_SIZE, 0x0806_0000);
assert_sector(0x07, FlashBank::Bank1, 7, 0x0806_0000, LARGE_SECTOR_SIZE, 0x0807_FFFF);
assert_sector(0x10, FlashBank::Bank2, 0, 0x0808_0000, SMALL_SECTOR_SIZE, 0x0808_0000);
assert_sector(0x10, FlashBank::Bank2, 0, 0x0808_0000, SMALL_SECTOR_SIZE, 0x0808_3FFF);
assert_sector(0x13, FlashBank::Bank2, 3, 0x0808_C000, SMALL_SECTOR_SIZE, 0x0808_C000);
assert_sector(0x13, FlashBank::Bank2, 3, 0x0808_C000, SMALL_SECTOR_SIZE, 0x0808_FFFF);
assert_sector(0x14, FlashBank::Bank2, 4, 0x0809_0000, MEDIUM_SECTOR_SIZE, 0x0809_0000);
assert_sector(0x14, FlashBank::Bank2, 4, 0x0809_0000, MEDIUM_SECTOR_SIZE, 0x0809_FFFF);
assert_sector(0x15, FlashBank::Bank2, 5, 0x080A_0000, LARGE_SECTOR_SIZE, 0x080A_0000);
assert_sector(0x15, FlashBank::Bank2, 5, 0x080A_0000, LARGE_SECTOR_SIZE, 0x080B_FFFF);
assert_sector(0x17, FlashBank::Bank2, 7, 0x080E_0000, LARGE_SECTOR_SIZE, 0x080E_0000);
assert_sector(0x17, FlashBank::Bank2, 7, 0x080E_0000, LARGE_SECTOR_SIZE, 0x080F_FFFF);
}
}