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Publications
[Heinz2021a] Heinz, C., Hofmann, J., Korinth, J., Sommer, L., Weber, L., and Koch, A. 2021. The TaPaSCo Open-Source Toolflow. In Journal of Signal Processing Systems.
[Heinz2020] Heinz, Carsten, Jaco Hofmann, Lukas Sommer, and Andreas Koch. 2020. Improving Job Launch Rates in the TaPaSCo FPGA Middleware by Hardware/Software-Co-Design. In 2020 IEEE/ACM International Workshop on Runtime and Operating Systems for Supercomputers (ROSS).
[Heinz2021b] Heinz, Carsten, and Andreas Koch. 2021 Supporting On-Chip Dynamic Parallelism for Task-Based Hardware Accelerators. In Applied Reconfigurable Computing. Architectures, Tools, and Applications (ARC).
[Korinth2019] Korinth, Jens, Jaco Hofmann, Carsten Heinz, and Andreas Koch. 2019. The Tapasco Open-Source Toolflow for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems. In International Symposium on Applied Reconfigurable Computing (Arc).
[Heinz2019] Heinz, Carsten, Yannick Lavan, Jaco Hofmann, and Andreas Koch. 2019. A Catalog and in-Hardware Evaluation of Open-Source Drop-in Compatible Risc-V Softcore Processors. In IEEE Proc. International Conference on Reconfigurable Computing and Fpgas (Reconfig). IEEE.
[Ober2019] Ober, Micha, Jaco Hofmann, Lukas Sommer, Lukas Weber, and Andreas Koch. 2019. High-Throughput Multi-Threaded Sum-Product Network Inference in the Reconfigurable Cloud. In Fifth International Workshop on Heterogeneous High-Performance Reconfigurable Computing (H2RC).
[Korinth2015a] Korinth, Jens, David de la Chevallerie, and Andreas Koch. 2015. An Open-Source Tool Flow for the Composition of Reconfigurable Hardware Thread Pool Architectures. In The 23rd Ieee International Symposium on Field-Programmable Custom Computing Machines (Fccm).
[Korinth2015b] Korinth, Jens, David de la Chevallerie, and Andreas Koch. 2015. ThreadPoolComposer – an Open-Source Fpga Toolchain for Software Developers. In Second International Workshop on Fpgas Software Programmers (Fsp).
[Heinz2022] Carsten Heinz, and Andreas Koch. 2022. On-Chip and Distributed Dynamic Parallelism for Task-based Hardware Accelerators. In Journal of Signal Processsing Systems (JSPS).
[Spang2022] Christoph Spang, Yannick Lavan, Marco Hartmann, and Andreas Koch. 2022. DExIE - An IoT-Class Hardware Monitor for Real-Time Fine-Grained Control-Flow Integrity. In Journal of Signal Processsing Systems (JSPS).
[Kalkhof2021] Torben Kalkhof, and Andreas Koch. 2021. Efficient Physical Page Migrations in Shared Virtual Memory Reconfigurable Computing Systems. In International Conference on Field-Programmable Technology (ICFPT). https://doi.org/10.1109/ICFPT52863.2021.9609831
[Spang2021b] Christoph Spang, Florian Meisel, and Andreas Koch. 2021. RT-LIFE: Portable RISC-V Interface for Real-Time Lightweight Security Enforcement. In Intl. Conf. on Embedded Computer Systems: Architectures, MOdeling and Simulation (SAMOS).
[Wirth2021] Wirth, Johannes, Jaco Hofmann, Lasse Thostrup, Andreas Koch and Carsten Binnig. 2021. Exploiting 3D Memory for Accelerated In-Network Processing of Hash Joins in Distributed Databases. In Applied Reconfigurable Computing. Architectures, Tools, and Applications (ARC).
[Kruppe2021] Hanna Kruppe, Lukas Sommer, Lukas Weber, Julian Oppermann, Cristian Axenie and Andreas Koch. 2021. Efficient Operator Sharing Modulo Scheduling for Sum-Product Network Inference on FPGAs. In Intl. Conf. on Embedded Computer Systems: Architectures, MOdeling and Simulation (SAMOS).
[Spang2021a] Spang, Christoph, Yannick Lavan, Marco Hartmann, Florian Meisel, and Andreas Koch. 2021. DExIE - An IoT-Class Hardware Monitor for Real-Time Fine-Grained Control-Flow Integrity. In Workshop on Design and Architectures for Signal and Image Processing (DASIP).
[Sommer2020] Sommer, Lukas, Weber, Lukas, Kumm, Martin, and Koch, Andreas. 2020. Comparison of Arithmetic Number Formats for Inference in Sum-Product Networks on FPGAs. In 2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).
[Weber2019] Weber, Lukas, Sommer, Lukas, Oppermann, Julian, Molina, Alejandro, Kersting, Kristian, and Koch, Andreas. 2019. Resource-Efficient Logarithmic Number Scale Arithmetic for SPN Inference on FPGAs. In International Conference on Field-Programmable Technology (FPT).
[Oppermann2019] Oppermann, Julian, Melanie Reuter-Oppermann, Lukas Sommer, Andreas Koch, and Oliver Sinnen. 2019. Exact and Practical Modulo Scheduling for High-Level Synthesis. TRETS 12 (2): 8:1–8:26. https://doi.org/10.1145/3317670.
[Sommer2018c] Sommer, Lukas, Julian Oppermann, Alejandro Molina, Carsten Binnig, Kristian Kersting, and Andreas Koch. 2018. Automatic Synthesis of Fpga-Based Accelerators for the Sum-Product Network Inference Problem. In ICML 2018 Workshop on Tractable Probabilistic Models (Tpm).
[Sommer2018b] Sommer, Lukas, Julian Oppermann, Alejandro Molina, Carsten Binnig, Kristian Kersting, and Andreas Koch. 2018. Automatic Mapping of the Sum-Product Network Inference Problem to Fpga-Based Accelerators. In IEEE International Conference on Computer Design (Iccd).
[Sommer2018a] Sommer, Lukas, Julian Oppermann, Jens Korinth, and Andreas Koch. 2018. Offloading Openmp Target Regions to Fpga Accelerators Using Llvm. In 2018 European Llvm Developers Meeting.
[Sommer2017b] Sommer, Lukas, Julian Oppermann, Jaco Hofmann, and Andreas Koch. 2017. Synthesis of Interleaved Multithreaded Accelerators from Openmp Loops. In 2017 International Conference on Reconfigurable Computing and Fpgas (Reconfig’17).
[Sommer2017a] Sommer, Lukas, Jens Korinth, and Andreas Koch. 2017. OpenMP Device Offloading to Fpga Accelerators. In International Conference on Application-Specific Systems, Architectures and Processors (Asap).
[Hofmann2016b] Hofmann, Jaco, Jens Korinth, and Andreas Koch. 2016. A Scalable Latency-Insensitive Architecture for Fpga-Accelerated Semi-Global Matching in Stereo Vision Applications. In IEEE Proc. International Conference on Reconfigurable Computing and Fpgas (Reconfig).
[Hofmann2016a] Hofmann, Jaco, Jens Korinth, and Andreas Koch. 2016. A Scalable High-Performance Hardware Architecture for Real-Time Stereo Vision by Semi-Global Matching. In IEEE Conference on Computer Vision and Pattern Recognition (Cvpr) Workshops.