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Register definitions are highly incomplete and some are wrong #12

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Elmue opened this issue Jan 28, 2021 · 2 comments
Open

Register definitions are highly incomplete and some are wrong #12

Elmue opened this issue Jan 28, 2021 · 2 comments

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@Elmue
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Elmue commented Jan 28, 2021 •
edited

In the file c166.slaspec you define the registers.
But most are missing.

I extracted the information from 3 Infineon manuals.
Sadly there are some contradictions.
@Elmue
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Elmue commented Feb 23, 2021 •
edited

Manual 1)
Microcontrollers C166 Family 16-Bit Single-Chip Microcontroller C161PI V 1.0 User’s Manual 1999-08

Manual 2)
C166S V2 16-Bit Microcontroller User Manual, V 1.7, January 2001

Manual 3)
XC161 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units User’s Manual, V2.2, Jan. 2004

I wrote a script which extracts the SFR and ESFR from the PDF files and orders them by address.
Here is the result :

ESFR: 
F000 00 QX0
F002 01 QX1
F004 02 QR0
F006 03 QR1
F00C 06 CPUID
F050 28 CC2_T7
F052 29 CC2_T8
F054 2A CC2_T7REL
F056 2B CC2_T8REL
F05A 2D SSC1_TB
F05C 2E SSC1_RB
F05E 2F SSC1_BR
F062 31 CC1_IOC
F066 33 CC2_IOC
F078 3C IDPROG
F07A 3D IDMEM
F07C 3E IDCHIP
F07E 3F IDMANUF
F080 40 POCON0L
F082 41 POCON0H
F084 42 POCON1L
F086 43 POCON1H
F088 44 POCON2
F08A 45 POCON3
F08C 46 POCON4
F08E 47 POCON6
F090 48 POCON7
F094 4A POCON9
F09C 4E ADC_CTR2
F09E 4F ADC_CTR2IN
F0A0 50 ADC_DAT2
F0A4 52 ASC1_TXFCON
F0A6 53 ASC1_RXFCON
F0AA 55 POCON20
F0B0 58 SSC0_TB
F0B2 59 SSC0_RB
F0B4 5A SSC0_BR
F0B8 5C ASC0_ABSTAT
F0BA 5D ASC0_FSTAT
F0BC 5E ASC1_ABSTAT
F0BE 5F ASC1_FSTAT
F0C4 62 ASC0_TXFCON
F0C6 63 ASC0_RXFCON
F0CC 66 RTC_RELL
F0CE 67 RTC_RELH
F0D0 68 RTC_T14REL
F0D2 69 RTC_T14
F0D4 6A RTC_RTCL
F0D6 6B RTC_RTCH
F100 80 DP0L
F102 81 DP0H
F104 82 DP1L
F106 83 DP1H
F108 84 RP0H
F10C 86 RTC_ISNC
F110 88 RTC_CON
F120 90 ALTSEL0P1H
F122 91 ALTSEL0P2
F126 93 ALTSEL0P3
F128 94 ALTSEL1P3
F12A 95 ALTSEL0P4
F12C 96 ALTSEL0P6
F130 98 ALTSEL0P1L
F136 9B ALTSEL1P4
F138 9C ALTSEL0P9
F13A 9D ALTSEL1P9
F13C 9E ALTSEL0P7
F13E 9F ALTSEL1P7
F142 A1 CAN_1IC
F144 A2 CAN_2IC
F146 A3 CAN_3IC
F148 A4 CAN_4IC
F14A A5 CAN_5IC
F14C A6 CAN_6IC
F14E A7 CAN_7IC
F150 A8 ASC1_TBIC
F15C AE ASC0_ABIC
F160 B0 CC2_CC16IC
F162 B1 CC2_CC17IC
F164 B2 CC2_CC18IC
F166 B3 CC2_CC19IC
F168 B4 CC2_CC20IC
F16A B5 CC2_CC21IC
F16C B6 CC2_CC22IC
F16E B7 CC2_CC23IC
F170 B8 CC2_CC24IC
F172 B9 CC2_CC25IC
F174 BA CC2_CC26IC
F176 BB CC2_CC27IC
F178 BC CC2_CC28IC
F17A BD CC2_T7IC
F17C BE CC2_T8IC
F182 C1 ASC1_TIC
F184 C2 CC2_CC29IC
F186 C3 IIC_DIC
F18A C5 ASC1_RIC
F18C C6 CC2_CC30IC
F18E C7 IIC_PEIC
F192 C9 ASC1_EIC
F194 CA CC2_CC31IC
F196 CB CAN_0IC
F19A CD SDLM_IC
F19C CE ASC0_TBIC
F19E CF PLL_IC
F1A0 D0 RTC_IC
F1AA D5 SSC1_TIC
F1AC D6 SSC1_RIC
F1AE D7 SSC1_EIC
F1B8 DC ASC0_ABCON
F1BA DD ASC1_ABIC
F1BC DE ASC1_ABCON
F1C0 E0 EXICON
F1C2 E1 ODP2
F1C4 E2 PICON
F1C6 E3 ODP3
F1CA E5 ODP4
F1CE E7 ODP6
F1D0 E8 SYSCON2
F1D2 E9 ODP7
F1D4 EA SYSCON3
F1DE EF ISNC

__________________________________________________________

SFR :
FE00 00 DPP0
FE02 01 DPP1
FE04 02 DPP2
FE06 03 DPP3
FE08 04 CSP
FE0C 06 MDH
FE0E 07 MDL
FE10 08 CP
FE12 09 SP
FE14 0A STKOV
FE16 0B STKUN
FE18 0C CPUCON1
FE1A 0D CPUCON2
FE1C 0E ADDRSEL3
FE1E 0F ADDRSEL4
FE28 14 CC2_SEM
FE2A 15 CC2_SEE
FE2C 16 CC1_SEM
FE2E 17 CC1_SEE
FE40 20 T2
FE42 21 T3
FE44 22 T4
FE46 23 T5
FE48 24 T6
FE4A 25 CAPREL
FE50 28 CC1_T0
FE52 29 CC1_T1
FE54 2A CC1_T0REL
FE56 2B CC1_T1REL
FE5C 2E MAL
FE5E 2F MAH
FE60 30 CC2_CC16
FE62 31 CC2_CC17
FE64 32 CC2_CC18
FE66 33 CC2_CC19
FE68 34 CC2_CC20
FE6A 35 CC2_CC21
FE6C 36 CC2_CC22
FE6E 37 CC2_CC23
FE70 38 CC2_CC24
FE72 39 CC2_CC25
FE74 3A CC2_CC26
FE76 3B CC2_CC27
FE78 3C CC2_CC28
FE7A 3D CC2_CC29
FE7C 3E CC2_CC30
FE7E 3F CC2_CC31
FE80 40 CC1_CC0
FE82 41 CC1_CC1
FE84 42 CC1_CC2
FE86 43 CC1_CC3
FE88 44 CC1_CC4
FE8A 45 CC1_CC5
FE8C 46 CC1_CC6
FE8E 47 CC1_CC7
FE90 48 CC1_CC8
FE92 49 CC1_CC9
FE94 4A CC1_CC10
FE96 4B CC1_CC11
FE98 4C CC1_CC12
FE9A 4D CC1_CC13
FE9C 4E CC1_CC14
FE9E 4F CC1_CC15
FEA0 50 ADC_DAT
FEAA 55 ASC0_PMW
FEAC 56 ASC1_PMW
FEAE 57 WDT
FEB0 58 ASC0_TBUF
FEB2 59 ASC0_RBUF
FEB4 5A ASC0_BG
FEB6 5B ASC0_FDV
FEB8 5C ASC1_TBUF
FEBA 5D ASC1_RBUF
FEBC 5E ASC1_BG
FEBE 5F ASC1_FDV
FEC0 60 PECC0
FEC2 61 PECC1
FEC4 62 PECC2
FEC6 63 PECC3
FEC8 64 PECC4
FECA 65 PECC5
FECC 66 PECC6
FECE 67 PECC7
FF00 80 P0L
FF02 81 P0H
FF04 82 P1L
FF06 83 P1H
FF08 84 IDX0
FF0A 85 IDX1
FF0C 86 SPSEG
FF0E 87 MDC
FF10 88 PSW
FF12 89 VECSEG
FF14 8A BUSCON1
FF16 8B P9
FF18 8C DP9
FF1A 8D ODP9
FF1C 8E ZEROS
FF1E 8F ONES
FF20 90 CC2_T78CON
FF22 91 CC2_M4
FF24 92 CC2_M5
FF26 93 CC2_M6
FF28 94 CC2_M7
FF2A 95 CC2_DRM
FF2C 96 CC2_OUT
FF40 A0 T2CON
FF42 A1 T3CON
FF44 A2 T4CON
FF46 A3 T5CON
FF48 A4 T6CON
FF50 A8 CC1_T01CON
FF52 A9 CC1_M0
FF54 AA CC1_M1
FF56 AB CC1_M2
FF58 AC CC1_M3
FF5A AD CC1_DRM
FF5C AE CC1_OUT
FF5E AF SSC1_CON
FF60 B0 T2IC
FF62 B1 T3IC
FF64 B2 T4IC
FF66 B3 T5IC
FF68 B4 T6IC
FF6A B5 CRIC
FF6C B6 ASC0_TIC
FF6E B7 ASC0_RIC
FF70 B8 ASC0_EIC
FF72 B9 SSC0_TIC
FF74 BA SSC0_RIC
FF76 BB SSC0_EIC
FF78 BC CC1_CC0IC
FF7A BD CC1_CC1IC
FF7C BE CC1_CC2IC
FF7E BF CC1_CC3IC
FF80 C0 CC1_CC4IC
FF82 C1 CC1_CC5IC
FF84 C2 CC1_CC6IC
FF86 C3 CC1_CC7IC
FF88 C4 CC1_CC8IC
FF8A C5 CC1_CC9IC
FF8C C6 CC1_CC10IC
FF8E C7 CC1_CC11IC
FF90 C8 CC1_CC12IC
FF92 C9 CC1_CC13IC
FF94 CA CC1_CC14IC
FF96 CB CC1_CC15IC
FF98 CC ADC_CIC
FF9A CD ADC_EIC
FF9C CE CC1_T0IC
FF9E CF CC1_T1IC
FFA0 D0 ADC_CON
FFA2 D1 P5
FFA4 D2 P5DIDIS
FFA6 D3 ADC_CON1
FFA8 D4 PECISNC
FFAC D6 TFR
FFAE D7 WDTCON
FFB0 D8 ASC0_CON
FFB2 D9 SSC0_CON
FFB4 DA P20
FFB6 DB DP20
FFB8 DC ASC1_CON
FFBE DF ADC_CTR0
FFC0 E0 P2
FFC2 E1 DP2
FFC4 E2 P3
FFC6 E3 DP3
FFC8 E4 P4
FFCA E5 DP4
FFCC E6 P6
FFCE E7 DP6
FFD0 E8 P7
FFD2 E9 DP7
FFDA ED MRW
FFDC EE MCW
FFDE EF MSW
____________________________________________

Conflicts:
FE18 CPUCON1 <--> ADDRSEL1
FE1A CPUCON2 <--> ADDRSEL2
FF0C SPSEG <--> BUSCON0
FF12 VECSEG <--> SYSCON
F19E XP3IC <--> PLL_IC
F186 XP0IC <--> IIC_DIC
F18E XP1IC <--> IIC_PEIC
F196 XP2IC <--> CAN_0IC
F0AA PDCR <--> POCON20
FF16 BUSCON2 <--> P9
FF18 BUSCON3 <--> DP9
FF1A BUSCON4 <--> ODP9

To add them to Ghidra they must be inserted twice into the slaspec file and into the pspec file.

Sadly Ghidra is such a buggy software that you will not get a useful error message if you did anything wrong in these highly cryptic files. Ghidra will only tell you that it could not read the c166.sla file.

@Elmue
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Elmue commented Feb 23, 2021

In the slaspec file you enter at line 18:

define register offset=0xFE00 size=2
[ DPP0        DPP1        DPP2        DPP3        CSP         SFR_05      MDH         MDL         
  CP          SP          STKOV       STKUN       CPUCON1     CPUCON2     ADDRSEL3    ADDRSEL4    
  SFR_10      SFR_11      SFR_12      SFR_13      CC2_SEM     CC2_SEE     CC1_SEM     CC1_SEE     
  SFR_18      SFR_19      SFR_1A      SFR_1B      SFR_1C      SFR_1D      SFR_1E      SFR_1F      
  T2          T3          T4          T5          T6          CAPREL      SFR_26      SFR_27      
  CC1_T0      CC1_T1      CC1_T0REL   CC1_T1REL   SFR_2C      SFR_2D      MAL         MAH         
  CC2_CC16    CC2_CC17    CC2_CC18    CC2_CC19    CC2_CC20    CC2_CC21    CC2_CC22    CC2_CC23    
  CC2_CC24    CC2_CC25    CC2_CC26    CC2_CC27    CC2_CC28    CC2_CC29    CC2_CC30    CC2_CC31    
  CC1_CC0     CC1_CC1     CC1_CC2     CC1_CC3     CC1_CC4     CC1_CC5     CC1_CC6     CC1_CC7     
  CC1_CC8     CC1_CC9     CC1_CC10    CC1_CC11    CC1_CC12    CC1_CC13    CC1_CC14    CC1_CC15    
  ADC_DAT     SFR_51      SFR_52      SFR_53      SFR_54      ASC0_PMW    ASC1_PMW    WDT         
  ASC0_TBUF   ASC0_RBUF   ASC0_BG     ASC0_FDV    ASC1_TBUF   ASC1_RBUF   ASC1_BG     ASC1_FDV    
  PECC0       PECC1       PECC2       PECC3       PECC4       PECC5       PECC6       PECC7       
  SFR_68      SFR_69      SFR_6A      SFR_6B      SFR_6C      SFR_6D      SFR_6E      SFR_6F      
  SFR_70      SFR_71      SFR_72      SFR_73      SFR_74      SFR_75      SFR_76      SFR_77      
  SFR_78      SFR_79      SFR_7A      SFR_7B      SFR_7C      SFR_7D      SFR_7E      SFR_7F      
  P0L         P0H         P1L         P1H         IDX0        IDX1        SPSEG       MDC         
  PSW         VECSEG      BUSCON1     P9          DP9         ODP9        ZEROS       ONES        
  CC2_T78CON  CC2_M4      CC2_M5      CC2_M6      CC2_M7      CC2_DRM     CC2_OUT     SFR_97      
  SFR_98      SFR_99      SFR_9A      SFR_9B      SFR_9C      SFR_9D      SFR_9E      SFR_9F      
  T2CON       T3CON       T4CON       T5CON       T6CON       SFR_A5      SFR_A6      SFR_A7      
  CC1_T01CON  CC1_M0      CC1_M1      CC1_M2      CC1_M3      CC1_DRM     CC1_OUT     SSC1_CON    
  T2IC        T3IC        T4IC        T5IC        T6IC        CRIC        ASC0_TIC    ASC0_RIC    
  ASC0_EIC    SSC0_TIC    SSC0_RIC    SSC0_EIC    CC1_CC0IC   CC1_CC1IC   CC1_CC2IC   CC1_CC3IC   
  CC1_CC4IC   CC1_CC5IC   CC1_CC6IC   CC1_CC7IC   CC1_CC8IC   CC1_CC9IC   CC1_CC10IC  CC1_CC11IC  
  CC1_CC12IC  CC1_CC13IC  CC1_CC14IC  CC1_CC15IC  ADC_CIC     ADC_EIC     CC1_T0IC    CC1_T1IC    
  ADC_CON     P5          P5DIDIS     ADC_CON1    PECISNC     SFR_D5      TFR         WDTCON      
  ASC0_CON    SSC0_CON    P20         DP20        ASC1_CON    SFR_DD      SFR_DE      ADC_CTR0    
  P2          DP2         P3          DP3         P4          DP4         P6          DP6         
  P7          DP7         SFR_EA      SFR_EB      SFR_EC      MRW         MCW         MSW         
  SFR_F0      SFR_F1      SFR_F2      SFR_F3      SFR_F4      SFR_F5      SFR_F6      SFR_F7      
  SFR_F8      SFR_F9      SFR_FA      SFR_FB      SFR_FC      SFR_FD      SFR_FE      SFR_FF ];
		 
define register offset=0xF000 size=2
[ QX0         QX1         QR0         QR1         ESFR_04     ESFR_05     CPUID       ESFR_07     
  ESFR_08     ESFR_09     ESFR_0A     ESFR_0B     ESFR_0C     ESFR_0D     ESFR_0E     ESFR_0F     
  ESFR_10     ESFR_11     ESFR_12     ESFR_13     ESFR_14     ESFR_15     ESFR_16     ESFR_17     
  ESFR_18     ESFR_19     ESFR_1A     ESFR_1B     ESFR_1C     ESFR_1D     ESFR_1E     ESFR_1F     
  ESFR_20     ESFR_21     ESFR_22     ESFR_23     ESFR_24     ESFR_25     ESFR_26     ESFR_27     
  CC2_T7      CC2_T8      CC2_T7REL   CC2_T8REL   ESFR_2C     SSC1_TB     SSC1_RB     SSC1_BR     
  ESFR_30     CC1_IOC     ESFR_32     CC2_IOC     ESFR_34     ESFR_35     ESFR_36     ESFR_37     
  ESFR_38     ESFR_39     ESFR_3A     ESFR_3B     IDPROG      IDMEM       IDCHIP      IDMANUF     
  POCON0L     POCON0H     POCON1L     POCON1H     POCON2      POCON3      POCON4      POCON6      
  POCON7      ESFR_49     POCON9      ESFR_4B     ESFR_4C     ESFR_4D     ADC_CTR2    ADC_CTR2IN  
  ADC_DAT2    ESFR_51     ASC1_TXFCON ASC1_RXFCON ESFR_54     POCON20     ESFR_56     ESFR_57     
  SSC0_TB     SSC0_RB     SSC0_BR     ESFR_5B     ASC0_ABSTAT ASC0_FSTAT  ASC1_ABSTAT ASC1_FSTAT  
  ESFR_60     ESFR_61     ASC0_TXFCON ASC0_RXFCON ESFR_64     ESFR_65     RTC_RELL    RTC_RELH    
  RTC_T14REL  RTC_T14     RTC_RTCL    RTC_RTCH    ESFR_6C     ESFR_6D     ESFR_6E     ESFR_6F     
  ESFR_70     ESFR_71     ESFR_72     ESFR_73     ESFR_74     ESFR_75     ESFR_76     ESFR_77     
  ESFR_78     ESFR_79     ESFR_7A     ESFR_7B     ESFR_7C     ESFR_7D     ESFR_7E     ESFR_7F     
  DP0L        DP0H        DP1L        DP1H        RP0H        ESFR_85     RTC_ISNC    ESFR_87     
  RTC_CON     ESFR_89     ESFR_8A     ESFR_8B     ESFR_8C     ESFR_8D     ESFR_8E     ESFR_8F     
  ALTSEL0P1H  ALTSEL0P2   ESFR_92     ALTSEL0P3   ALTSEL1P3   ALTSEL0P4   ALTSEL0P6   ESFR_97     
  ALTSEL0P1L  ESFR_99     ESFR_9A     ALTSEL1P4   ALTSEL0P9   ALTSEL1P9   ALTSEL0P7   ALTSEL1P7   
  ESFR_A0     CAN_1IC     CAN_2IC     CAN_3IC     CAN_4IC     CAN_5IC     CAN_6IC     CAN_7IC     
  ASC1_TBIC   ESFR_A9     ESFR_AA     ESFR_AB     ESFR_AC     ESFR_AD     ASC0_ABIC   ESFR_AF     
  CC2_CC16IC  CC2_CC17IC  CC2_CC18IC  CC2_CC19IC  CC2_CC20IC  CC2_CC21IC  CC2_CC22IC  CC2_CC23IC  
  CC2_CC24IC  CC2_CC25IC  CC2_CC26IC  CC2_CC27IC  CC2_CC28IC  CC2_T7IC    CC2_T8IC    ESFR_BF     
  ESFR_C0     ASC1_TIC    CC2_CC29IC  IIC_DIC     ESFR_C4     ASC1_RIC    CC2_CC30IC  IIC_PEIC    
  ESFR_C8     ASC1_EIC    CC2_CC31IC  CAN_0IC     ESFR_CC     SDLM_IC     ASC0_TBIC   PLL_IC      
  RTC_IC      ESFR_D1     ESFR_D2     ESFR_D3     ESFR_D4     SSC1_TIC    SSC1_RIC    SSC1_EIC    
  ESFR_D8     ESFR_D9     ESFR_DA     ESFR_DB     ASC0_ABCON  ASC1_ABIC   ASC1_ABCON  ESFR_DF     
  EXICON      ODP2        PICON       ODP3        ESFR_E4     ODP4        ESFR_E6     ODP6        
  SYSCON2     ODP7        SYSCON3     ESFR_EB     ESFR_EC     ESFR_ED     ESFR_EE     ISNC        
  ESFR_F0     ESFR_F1     ESFR_F2     ESFR_F3     ESFR_F4     ESFR_F5     ESFR_F6     ESFR_F7     
  ESFR_F8     ESFR_F9     ESFR_FA     ESFR_FB     ESFR_FC     ESFR_FD     ESFR_FE     ESFR_FF ];

and at line 204:

attach variables [ sfr0815 ] 
[ DPP0        DPP1        DPP2        DPP3        CSP         SFR_05      MDH         MDL         
  CP          SP          STKOV       STKUN       CPUCON1     CPUCON2     ADDRSEL3    ADDRSEL4    
  SFR_10      SFR_11      SFR_12      SFR_13      CC2_SEM     CC2_SEE     CC1_SEM     CC1_SEE     
  SFR_18      SFR_19      SFR_1A      SFR_1B      SFR_1C      SFR_1D      SFR_1E      SFR_1F      
  T2          T3          T4          T5          T6          CAPREL      SFR_26      SFR_27      
  CC1_T0      CC1_T1      CC1_T0REL   CC1_T1REL   SFR_2C      SFR_2D      MAL         MAH         
  CC2_CC16    CC2_CC17    CC2_CC18    CC2_CC19    CC2_CC20    CC2_CC21    CC2_CC22    CC2_CC23    
  CC2_CC24    CC2_CC25    CC2_CC26    CC2_CC27    CC2_CC28    CC2_CC29    CC2_CC30    CC2_CC31    
  CC1_CC0     CC1_CC1     CC1_CC2     CC1_CC3     CC1_CC4     CC1_CC5     CC1_CC6     CC1_CC7     
  CC1_CC8     CC1_CC9     CC1_CC10    CC1_CC11    CC1_CC12    CC1_CC13    CC1_CC14    CC1_CC15    
  ADC_DAT     SFR_51      SFR_52      SFR_53      SFR_54      ASC0_PMW    ASC1_PMW    WDT         
  ASC0_TBUF   ASC0_RBUF   ASC0_BG     ASC0_FDV    ASC1_TBUF   ASC1_RBUF   ASC1_BG     ASC1_FDV    
  PECC0       PECC1       PECC2       PECC3       PECC4       PECC5       PECC6       PECC7       
  SFR_68      SFR_69      SFR_6A      SFR_6B      SFR_6C      SFR_6D      SFR_6E      SFR_6F      
  SFR_70      SFR_71      SFR_72      SFR_73      SFR_74      SFR_75      SFR_76      SFR_77      
  SFR_78      SFR_79      SFR_7A      SFR_7B      SFR_7C      SFR_7D      SFR_7E      SFR_7F      
  P0L         P0H         P1L         P1H         IDX0        IDX1        SPSEG       MDC         
  PSW         VECSEG      BUSCON1     P9          DP9         ODP9        ZEROS       ONES        
  CC2_T78CON  CC2_M4      CC2_M5      CC2_M6      CC2_M7      CC2_DRM     CC2_OUT     SFR_97      
  SFR_98      SFR_99      SFR_9A      SFR_9B      SFR_9C      SFR_9D      SFR_9E      SFR_9F      
  T2CON       T3CON       T4CON       T5CON       T6CON       SFR_A5      SFR_A6      SFR_A7      
  CC1_T01CON  CC1_M0      CC1_M1      CC1_M2      CC1_M3      CC1_DRM     CC1_OUT     SSC1_CON    
  T2IC        T3IC        T4IC        T5IC        T6IC        CRIC        ASC0_TIC    ASC0_RIC    
  ASC0_EIC    SSC0_TIC    SSC0_RIC    SSC0_EIC    CC1_CC0IC   CC1_CC1IC   CC1_CC2IC   CC1_CC3IC   
  CC1_CC4IC   CC1_CC5IC   CC1_CC6IC   CC1_CC7IC   CC1_CC8IC   CC1_CC9IC   CC1_CC10IC  CC1_CC11IC  
  CC1_CC12IC  CC1_CC13IC  CC1_CC14IC  CC1_CC15IC  ADC_CIC     ADC_EIC     CC1_T0IC    CC1_T1IC    
  ADC_CON     P5          P5DIDIS     ADC_CON1    PECISNC     SFR_D5      TFR         WDTCON      
  ASC0_CON    SSC0_CON    P20         DP20        ASC1_CON    SFR_DD      SFR_DE      ADC_CTR0    
  P2          DP2         P3          DP3         P4          DP4         P6          DP6         
  P7          DP7         SFR_EA      SFR_EB      SFR_EC      MRW         MCW         MSW         
  SFR_F0      SFR_F1      SFR_F2      SFR_F3      SFR_F4      SFR_F5      SFR_F6      SFR_F7      
  SFR_F8      SFR_F9      SFR_FA      SFR_FB      SFR_FC      SFR_FD      SFR_FE      SFR_FF ];
		 
attach variables [ esfr0815 ]
[ QX0         QX1         QR0         QR1         ESFR_04     ESFR_05     CPUID       ESFR_07     
  ESFR_08     ESFR_09     ESFR_0A     ESFR_0B     ESFR_0C     ESFR_0D     ESFR_0E     ESFR_0F     
  ESFR_10     ESFR_11     ESFR_12     ESFR_13     ESFR_14     ESFR_15     ESFR_16     ESFR_17     
  ESFR_18     ESFR_19     ESFR_1A     ESFR_1B     ESFR_1C     ESFR_1D     ESFR_1E     ESFR_1F     
  ESFR_20     ESFR_21     ESFR_22     ESFR_23     ESFR_24     ESFR_25     ESFR_26     ESFR_27     
  CC2_T7      CC2_T8      CC2_T7REL   CC2_T8REL   ESFR_2C     SSC1_TB     SSC1_RB     SSC1_BR     
  ESFR_30     CC1_IOC     ESFR_32     CC2_IOC     ESFR_34     ESFR_35     ESFR_36     ESFR_37     
  ESFR_38     ESFR_39     ESFR_3A     ESFR_3B     IDPROG      IDMEM       IDCHIP      IDMANUF     
  POCON0L     POCON0H     POCON1L     POCON1H     POCON2      POCON3      POCON4      POCON6      
  POCON7      ESFR_49     POCON9      ESFR_4B     ESFR_4C     ESFR_4D     ADC_CTR2    ADC_CTR2IN  
  ADC_DAT2    ESFR_51     ASC1_TXFCON ASC1_RXFCON ESFR_54     POCON20     ESFR_56     ESFR_57     
  SSC0_TB     SSC0_RB     SSC0_BR     ESFR_5B     ASC0_ABSTAT ASC0_FSTAT  ASC1_ABSTAT ASC1_FSTAT  
  ESFR_60     ESFR_61     ASC0_TXFCON ASC0_RXFCON ESFR_64     ESFR_65     RTC_RELL    RTC_RELH    
  RTC_T14REL  RTC_T14     RTC_RTCL    RTC_RTCH    ESFR_6C     ESFR_6D     ESFR_6E     ESFR_6F     
  ESFR_70     ESFR_71     ESFR_72     ESFR_73     ESFR_74     ESFR_75     ESFR_76     ESFR_77     
  ESFR_78     ESFR_79     ESFR_7A     ESFR_7B     ESFR_7C     ESFR_7D     ESFR_7E     ESFR_7F     
  DP0L        DP0H        DP1L        DP1H        RP0H        ESFR_85     RTC_ISNC    ESFR_87     
  RTC_CON     ESFR_89     ESFR_8A     ESFR_8B     ESFR_8C     ESFR_8D     ESFR_8E     ESFR_8F     
  ALTSEL0P1H  ALTSEL0P2   ESFR_92     ALTSEL0P3   ALTSEL1P3   ALTSEL0P4   ALTSEL0P6   ESFR_97     
  ALTSEL0P1L  ESFR_99     ESFR_9A     ALTSEL1P4   ALTSEL0P9   ALTSEL1P9   ALTSEL0P7   ALTSEL1P7   
  ESFR_A0     CAN_1IC     CAN_2IC     CAN_3IC     CAN_4IC     CAN_5IC     CAN_6IC     CAN_7IC     
  ASC1_TBIC   ESFR_A9     ESFR_AA     ESFR_AB     ESFR_AC     ESFR_AD     ASC0_ABIC   ESFR_AF     
  CC2_CC16IC  CC2_CC17IC  CC2_CC18IC  CC2_CC19IC  CC2_CC20IC  CC2_CC21IC  CC2_CC22IC  CC2_CC23IC  
  CC2_CC24IC  CC2_CC25IC  CC2_CC26IC  CC2_CC27IC  CC2_CC28IC  CC2_T7IC    CC2_T8IC    ESFR_BF     
  ESFR_C0     ASC1_TIC    CC2_CC29IC  IIC_DIC     ESFR_C4     ASC1_RIC    CC2_CC30IC  IIC_PEIC    
  ESFR_C8     ASC1_EIC    CC2_CC31IC  CAN_0IC     ESFR_CC     SDLM_IC     ASC0_TBIC   PLL_IC      
  RTC_IC      ESFR_D1     ESFR_D2     ESFR_D3     ESFR_D4     SSC1_TIC    SSC1_RIC    SSC1_EIC    
  ESFR_D8     ESFR_D9     ESFR_DA     ESFR_DB     ASC0_ABCON  ASC1_ABIC   ASC1_ABCON  ESFR_DF     
  EXICON      ODP2        PICON       ODP3        ESFR_E4     ODP4        ESFR_E6     ODP6        
  SYSCON2     ODP7        SYSCON3     ESFR_EB     ESFR_EC     ESFR_ED     ESFR_EE     ISNC        
  ESFR_F0     ESFR_F1     ESFR_F2     ESFR_F3     ESFR_F4     ESFR_F5     ESFR_F6     ESFR_F7     
  ESFR_F8     ESFR_F9     ESFR_FA     ESFR_FB     ESFR_FC     ESFR_FD     ESFR_FE     ESFR_FF ];

And in the pspec file you enter:

  <register_data>
    <register name="DPP0" group="SFR"/>
    <register name="DPP1" group="SFR"/>
    <register name="DPP2" group="SFR"/>
    <register name="DPP3" group="SFR"/>
    <register name="CSP" group="SFR"/>
    <register name="SFR_05" group="SFR_UNNAMED"/>
    <register name="MDH" group="SFR"/>
    <register name="MDL" group="SFR"/>
    <register name="CP" group="SFR"/>
    <register name="SP" group="SFR"/>
    <register name="STKOV" group="SFR"/>
    <register name="STKUN" group="SFR"/>
    <register name="CPUCON1" group="SFR"/>
    <register name="CPUCON2" group="SFR"/>
    <register name="ADDRSEL3" group="SFR"/>
    <register name="ADDRSEL4" group="SFR"/>
    <register name="SFR_10" group="SFR_UNNAMED"/>
    <register name="SFR_11" group="SFR_UNNAMED"/>
    <register name="SFR_12" group="SFR_UNNAMED"/>
    <register name="SFR_13" group="SFR_UNNAMED"/>
    <register name="CC2_SEM" group="SFR"/>
    <register name="CC2_SEE" group="SFR"/>
    <register name="CC1_SEM" group="SFR"/>
    <register name="CC1_SEE" group="SFR"/>
    <register name="SFR_18" group="SFR_UNNAMED"/>
    <register name="SFR_19" group="SFR_UNNAMED"/>
    <register name="SFR_1A" group="SFR_UNNAMED"/>
    <register name="SFR_1B" group="SFR_UNNAMED"/>
    <register name="SFR_1C" group="SFR_UNNAMED"/>
    <register name="SFR_1D" group="SFR_UNNAMED"/>
    <register name="SFR_1E" group="SFR_UNNAMED"/>
    <register name="SFR_1F" group="SFR_UNNAMED"/>
    <register name="T2" group="SFR"/>
    <register name="T3" group="SFR"/>
    <register name="T4" group="SFR"/>
    <register name="T5" group="SFR"/>
    <register name="T6" group="SFR"/>
    <register name="CAPREL" group="SFR"/>
    <register name="SFR_26" group="SFR_UNNAMED"/>
    <register name="SFR_27" group="SFR_UNNAMED"/>
    <register name="CC1_T0" group="SFR"/>
    <register name="CC1_T1" group="SFR"/>
    <register name="CC1_T0REL" group="SFR"/>
    <register name="CC1_T1REL" group="SFR"/>
    <register name="SFR_2C" group="SFR_UNNAMED"/>
    <register name="SFR_2D" group="SFR_UNNAMED"/>
    <register name="MAL" group="SFR"/>
    <register name="MAH" group="SFR"/>
    <register name="CC2_CC16" group="SFR"/>
    <register name="CC2_CC17" group="SFR"/>
    <register name="CC2_CC18" group="SFR"/>
    <register name="CC2_CC19" group="SFR"/>
    <register name="CC2_CC20" group="SFR"/>
    <register name="CC2_CC21" group="SFR"/>
    <register name="CC2_CC22" group="SFR"/>
    <register name="CC2_CC23" group="SFR"/>
    <register name="CC2_CC24" group="SFR"/>
    <register name="CC2_CC25" group="SFR"/>
    <register name="CC2_CC26" group="SFR"/>
    <register name="CC2_CC27" group="SFR"/>
    <register name="CC2_CC28" group="SFR"/>
    <register name="CC2_CC29" group="SFR"/>
    <register name="CC2_CC30" group="SFR"/>
    <register name="CC2_CC31" group="SFR"/>
    <register name="CC1_CC0" group="SFR"/>
    <register name="CC1_CC1" group="SFR"/>
    <register name="CC1_CC2" group="SFR"/>
    <register name="CC1_CC3" group="SFR"/>
    <register name="CC1_CC4" group="SFR"/>
    <register name="CC1_CC5" group="SFR"/>
    <register name="CC1_CC6" group="SFR"/>
    <register name="CC1_CC7" group="SFR"/>
    <register name="CC1_CC8" group="SFR"/>
    <register name="CC1_CC9" group="SFR"/>
    <register name="CC1_CC10" group="SFR"/>
    <register name="CC1_CC11" group="SFR"/>
    <register name="CC1_CC12" group="SFR"/>
    <register name="CC1_CC13" group="SFR"/>
    <register name="CC1_CC14" group="SFR"/>
    <register name="CC1_CC15" group="SFR"/>
    <register name="ADC_DAT" group="SFR"/>
    <register name="SFR_51" group="SFR_UNNAMED"/>
    <register name="SFR_52" group="SFR_UNNAMED"/>
    <register name="SFR_53" group="SFR_UNNAMED"/>
    <register name="SFR_54" group="SFR_UNNAMED"/>
    <register name="ASC0_PMW" group="SFR"/>
    <register name="ASC1_PMW" group="SFR"/>
    <register name="WDT" group="SFR"/>
    <register name="ASC0_TBUF" group="SFR"/>
    <register name="ASC0_RBUF" group="SFR"/>
    <register name="ASC0_BG" group="SFR"/>
    <register name="ASC0_FDV" group="SFR"/>
    <register name="ASC1_TBUF" group="SFR"/>
    <register name="ASC1_RBUF" group="SFR"/>
    <register name="ASC1_BG" group="SFR"/>
    <register name="ASC1_FDV" group="SFR"/>
    <register name="PECC0" group="SFR"/>
    <register name="PECC1" group="SFR"/>
    <register name="PECC2" group="SFR"/>
    <register name="PECC3" group="SFR"/>
    <register name="PECC4" group="SFR"/>
    <register name="PECC5" group="SFR"/>
    <register name="PECC6" group="SFR"/>
    <register name="PECC7" group="SFR"/>
    <register name="SFR_68" group="SFR_UNNAMED"/>
    <register name="SFR_69" group="SFR_UNNAMED"/>
    <register name="SFR_6A" group="SFR_UNNAMED"/>
    <register name="SFR_6B" group="SFR_UNNAMED"/>
    <register name="SFR_6C" group="SFR_UNNAMED"/>
    <register name="SFR_6D" group="SFR_UNNAMED"/>
    <register name="SFR_6E" group="SFR_UNNAMED"/>
    <register name="SFR_6F" group="SFR_UNNAMED"/>
    <register name="SFR_70" group="SFR_UNNAMED"/>
    <register name="SFR_71" group="SFR_UNNAMED"/>
    <register name="SFR_72" group="SFR_UNNAMED"/>
    <register name="SFR_73" group="SFR_UNNAMED"/>
    <register name="SFR_74" group="SFR_UNNAMED"/>
    <register name="SFR_75" group="SFR_UNNAMED"/>
    <register name="SFR_76" group="SFR_UNNAMED"/>
    <register name="SFR_77" group="SFR_UNNAMED"/>
    <register name="SFR_78" group="SFR_UNNAMED"/>
    <register name="SFR_79" group="SFR_UNNAMED"/>
    <register name="SFR_7A" group="SFR_UNNAMED"/>
    <register name="SFR_7B" group="SFR_UNNAMED"/>
    <register name="SFR_7C" group="SFR_UNNAMED"/>
    <register name="SFR_7D" group="SFR_UNNAMED"/>
    <register name="SFR_7E" group="SFR_UNNAMED"/>
    <register name="SFR_7F" group="SFR_UNNAMED"/>
    <register name="P0L" group="SFR"/>
    <register name="P0H" group="SFR"/>
    <register name="P1L" group="SFR"/>
    <register name="P1H" group="SFR"/>
    <register name="IDX0" group="SFR"/>
    <register name="IDX1" group="SFR"/>
    <register name="SPSEG" group="SFR"/>
    <register name="MDC" group="SFR"/>
    <register name="PSW" group="SFR"/>
    <register name="VECSEG" group="SFR"/>
    <register name="BUSCON1" group="SFR"/>
    <register name="P9" group="SFR"/>
    <register name="DP9" group="SFR"/>
    <register name="ODP9" group="SFR"/>
    <register name="ZEROS" group="SFR"/>
    <register name="ONES" group="SFR"/>
    <register name="CC2_T78CON" group="SFR"/>
    <register name="CC2_M4" group="SFR"/>
    <register name="CC2_M5" group="SFR"/>
    <register name="CC2_M6" group="SFR"/>
    <register name="CC2_M7" group="SFR"/>
    <register name="CC2_DRM" group="SFR"/>
    <register name="CC2_OUT" group="SFR"/>
    <register name="SFR_97" group="SFR_UNNAMED"/>
    <register name="SFR_98" group="SFR_UNNAMED"/>
    <register name="SFR_99" group="SFR_UNNAMED"/>
    <register name="SFR_9A" group="SFR_UNNAMED"/>
    <register name="SFR_9B" group="SFR_UNNAMED"/>
    <register name="SFR_9C" group="SFR_UNNAMED"/>
    <register name="SFR_9D" group="SFR_UNNAMED"/>
    <register name="SFR_9E" group="SFR_UNNAMED"/>
    <register name="SFR_9F" group="SFR_UNNAMED"/>
    <register name="T2CON" group="SFR"/>
    <register name="T3CON" group="SFR"/>
    <register name="T4CON" group="SFR"/>
    <register name="T5CON" group="SFR"/>
    <register name="T6CON" group="SFR"/>
    <register name="SFR_A5" group="SFR_UNNAMED"/>
    <register name="SFR_A6" group="SFR_UNNAMED"/>
    <register name="SFR_A7" group="SFR_UNNAMED"/>
    <register name="CC1_T01CON" group="SFR"/>
    <register name="CC1_M0" group="SFR"/>
    <register name="CC1_M1" group="SFR"/>
    <register name="CC1_M2" group="SFR"/>
    <register name="CC1_M3" group="SFR"/>
    <register name="CC1_DRM" group="SFR"/>
    <register name="CC1_OUT" group="SFR"/>
    <register name="SSC1_CON" group="SFR"/>
    <register name="T2IC" group="SFR"/>
    <register name="T3IC" group="SFR"/>
    <register name="T4IC" group="SFR"/>
    <register name="T5IC" group="SFR"/>
    <register name="T6IC" group="SFR"/>
    <register name="CRIC" group="SFR"/>
    <register name="ASC0_TIC" group="SFR"/>
    <register name="ASC0_RIC" group="SFR"/>
    <register name="ASC0_EIC" group="SFR"/>
    <register name="SSC0_TIC" group="SFR"/>
    <register name="SSC0_RIC" group="SFR"/>
    <register name="SSC0_EIC" group="SFR"/>
    <register name="CC1_CC0IC" group="SFR"/>
    <register name="CC1_CC1IC" group="SFR"/>
    <register name="CC1_CC2IC" group="SFR"/>
    <register name="CC1_CC3IC" group="SFR"/>
    <register name="CC1_CC4IC" group="SFR"/>
    <register name="CC1_CC5IC" group="SFR"/>
    <register name="CC1_CC6IC" group="SFR"/>
    <register name="CC1_CC7IC" group="SFR"/>
    <register name="CC1_CC8IC" group="SFR"/>
    <register name="CC1_CC9IC" group="SFR"/>
    <register name="CC1_CC10IC" group="SFR"/>
    <register name="CC1_CC11IC" group="SFR"/>
    <register name="CC1_CC12IC" group="SFR"/>
    <register name="CC1_CC13IC" group="SFR"/>
    <register name="CC1_CC14IC" group="SFR"/>
    <register name="CC1_CC15IC" group="SFR"/>
    <register name="ADC_CIC" group="SFR"/>
    <register name="ADC_EIC" group="SFR"/>
    <register name="CC1_T0IC" group="SFR"/>
    <register name="CC1_T1IC" group="SFR"/>
    <register name="ADC_CON" group="SFR"/>
    <register name="P5" group="SFR"/>
    <register name="P5DIDIS" group="SFR"/>
    <register name="ADC_CON1" group="SFR"/>
    <register name="PECISNC" group="SFR"/>
    <register name="SFR_D5" group="SFR_UNNAMED"/>
    <register name="TFR" group="SFR"/>
    <register name="WDTCON" group="SFR"/>
    <register name="ASC0_CON" group="SFR"/>
    <register name="SSC0_CON" group="SFR"/>
    <register name="P20" group="SFR"/>
    <register name="DP20" group="SFR"/>
    <register name="ASC1_CON" group="SFR"/>
    <register name="SFR_DD" group="SFR_UNNAMED"/>
    <register name="SFR_DE" group="SFR_UNNAMED"/>
    <register name="ADC_CTR0" group="SFR"/>
    <register name="P2" group="SFR"/>
    <register name="DP2" group="SFR"/>
    <register name="P3" group="SFR"/>
    <register name="DP3" group="SFR"/>
    <register name="P4" group="SFR"/>
    <register name="DP4" group="SFR"/>
    <register name="P6" group="SFR"/>
    <register name="DP6" group="SFR"/>
    <register name="P7" group="SFR"/>
    <register name="DP7" group="SFR"/>
    <register name="SFR_EA" group="SFR_UNNAMED"/>
    <register name="SFR_EB" group="SFR_UNNAMED"/>
    <register name="SFR_EC" group="SFR_UNNAMED"/>
    <register name="MRW" group="SFR"/>
    <register name="MCW" group="SFR"/>
    <register name="MSW" group="SFR"/>
    <register name="SFR_F0" group="SFR_UNNAMED"/>
    <register name="SFR_F1" group="SFR_UNNAMED"/>
    <register name="SFR_F2" group="SFR_UNNAMED"/>
    <register name="SFR_F3" group="SFR_UNNAMED"/>
    <register name="SFR_F4" group="SFR_UNNAMED"/>
    <register name="SFR_F5" group="SFR_UNNAMED"/>
    <register name="SFR_F6" group="SFR_UNNAMED"/>
    <register name="SFR_F7" group="SFR_UNNAMED"/>
    <register name="SFR_F8" group="SFR_UNNAMED"/>
    <register name="SFR_F9" group="SFR_UNNAMED"/>
    <register name="SFR_FA" group="SFR_UNNAMED"/>
    <register name="SFR_FB" group="SFR_UNNAMED"/>
    <register name="SFR_FC" group="SFR_UNNAMED"/>
    <register name="SFR_FD" group="SFR_UNNAMED"/>
    <register name="SFR_FE" group="SFR_UNNAMED"/>
    <register name="SFR_FF" group="SFR_UNNAMED"/>
    <register name="QX0" group="ESFR"/>
    <register name="QX1" group="ESFR"/>
    <register name="QR0" group="ESFR"/>
    <register name="QR1" group="ESFR"/>
    <register name="ESFR_04" group="ESFR_UNNAMED"/>
    <register name="ESFR_05" group="ESFR_UNNAMED"/>
    <register name="CPUID" group="ESFR"/>
    <register name="ESFR_07" group="ESFR_UNNAMED"/>
    <register name="ESFR_08" group="ESFR_UNNAMED"/>
    <register name="ESFR_09" group="ESFR_UNNAMED"/>
    <register name="ESFR_0A" group="ESFR_UNNAMED"/>
    <register name="ESFR_0B" group="ESFR_UNNAMED"/>
    <register name="ESFR_0C" group="ESFR_UNNAMED"/>
    <register name="ESFR_0D" group="ESFR_UNNAMED"/>
    <register name="ESFR_0E" group="ESFR_UNNAMED"/>
    <register name="ESFR_0F" group="ESFR_UNNAMED"/>
    <register name="ESFR_10" group="ESFR_UNNAMED"/>
    <register name="ESFR_11" group="ESFR_UNNAMED"/>
    <register name="ESFR_12" group="ESFR_UNNAMED"/>
    <register name="ESFR_13" group="ESFR_UNNAMED"/>
    <register name="ESFR_14" group="ESFR_UNNAMED"/>
    <register name="ESFR_15" group="ESFR_UNNAMED"/>
    <register name="ESFR_16" group="ESFR_UNNAMED"/>
    <register name="ESFR_17" group="ESFR_UNNAMED"/>
    <register name="ESFR_18" group="ESFR_UNNAMED"/>
    <register name="ESFR_19" group="ESFR_UNNAMED"/>
    <register name="ESFR_1A" group="ESFR_UNNAMED"/>
    <register name="ESFR_1B" group="ESFR_UNNAMED"/>
    <register name="ESFR_1C" group="ESFR_UNNAMED"/>
    <register name="ESFR_1D" group="ESFR_UNNAMED"/>
    <register name="ESFR_1E" group="ESFR_UNNAMED"/>
    <register name="ESFR_1F" group="ESFR_UNNAMED"/>
    <register name="ESFR_20" group="ESFR_UNNAMED"/>
    <register name="ESFR_21" group="ESFR_UNNAMED"/>
    <register name="ESFR_22" group="ESFR_UNNAMED"/>
    <register name="ESFR_23" group="ESFR_UNNAMED"/>
    <register name="ESFR_24" group="ESFR_UNNAMED"/>
    <register name="ESFR_25" group="ESFR_UNNAMED"/>
    <register name="ESFR_26" group="ESFR_UNNAMED"/>
    <register name="ESFR_27" group="ESFR_UNNAMED"/>
    <register name="CC2_T7" group="ESFR"/>
    <register name="CC2_T8" group="ESFR"/>
    <register name="CC2_T7REL" group="ESFR"/>
    <register name="CC2_T8REL" group="ESFR"/>
    <register name="ESFR_2C" group="ESFR_UNNAMED"/>
    <register name="SSC1_TB" group="ESFR"/>
    <register name="SSC1_RB" group="ESFR"/>
    <register name="SSC1_BR" group="ESFR"/>
    <register name="ESFR_30" group="ESFR_UNNAMED"/>
    <register name="CC1_IOC" group="ESFR"/>
    <register name="ESFR_32" group="ESFR_UNNAMED"/>
    <register name="CC2_IOC" group="ESFR"/>
    <register name="ESFR_34" group="ESFR_UNNAMED"/>
    <register name="ESFR_35" group="ESFR_UNNAMED"/>
    <register name="ESFR_36" group="ESFR_UNNAMED"/>
    <register name="ESFR_37" group="ESFR_UNNAMED"/>
    <register name="ESFR_38" group="ESFR_UNNAMED"/>
    <register name="ESFR_39" group="ESFR_UNNAMED"/>
    <register name="ESFR_3A" group="ESFR_UNNAMED"/>
    <register name="ESFR_3B" group="ESFR_UNNAMED"/>
    <register name="IDPROG" group="ESFR"/>
    <register name="IDMEM" group="ESFR"/>
    <register name="IDCHIP" group="ESFR"/>
    <register name="IDMANUF" group="ESFR"/>
    <register name="POCON0L" group="ESFR"/>
    <register name="POCON0H" group="ESFR"/>
    <register name="POCON1L" group="ESFR"/>
    <register name="POCON1H" group="ESFR"/>
    <register name="POCON2" group="ESFR"/>
    <register name="POCON3" group="ESFR"/>
    <register name="POCON4" group="ESFR"/>
    <register name="POCON6" group="ESFR"/>
    <register name="POCON7" group="ESFR"/>
    <register name="ESFR_49" group="ESFR_UNNAMED"/>
    <register name="POCON9" group="ESFR"/>
    <register name="ESFR_4B" group="ESFR_UNNAMED"/>
    <register name="ESFR_4C" group="ESFR_UNNAMED"/>
    <register name="ESFR_4D" group="ESFR_UNNAMED"/>
    <register name="ADC_CTR2" group="ESFR"/>
    <register name="ADC_CTR2IN" group="ESFR"/>
    <register name="ADC_DAT2" group="ESFR"/>
    <register name="ESFR_51" group="ESFR_UNNAMED"/>
    <register name="ASC1_TXFCON" group="ESFR"/>
    <register name="ASC1_RXFCON" group="ESFR"/>
    <register name="ESFR_54" group="ESFR_UNNAMED"/>
    <register name="POCON20" group="ESFR"/>
    <register name="ESFR_56" group="ESFR_UNNAMED"/>
    <register name="ESFR_57" group="ESFR_UNNAMED"/>
    <register name="SSC0_TB" group="ESFR"/>
    <register name="SSC0_RB" group="ESFR"/>
    <register name="SSC0_BR" group="ESFR"/>
    <register name="ESFR_5B" group="ESFR_UNNAMED"/>
    <register name="ASC0_ABSTAT" group="ESFR"/>
    <register name="ASC0_FSTAT" group="ESFR"/>
    <register name="ASC1_ABSTAT" group="ESFR"/>
    <register name="ASC1_FSTAT" group="ESFR"/>
    <register name="ESFR_60" group="ESFR_UNNAMED"/>
    <register name="ESFR_61" group="ESFR_UNNAMED"/>
    <register name="ASC0_TXFCON" group="ESFR"/>
    <register name="ASC0_RXFCON" group="ESFR"/>
    <register name="ESFR_64" group="ESFR_UNNAMED"/>
    <register name="ESFR_65" group="ESFR_UNNAMED"/>
    <register name="RTC_RELL" group="ESFR"/>
    <register name="RTC_RELH" group="ESFR"/>
    <register name="RTC_T14REL" group="ESFR"/>
    <register name="RTC_T14" group="ESFR"/>
    <register name="RTC_RTCL" group="ESFR"/>
    <register name="RTC_RTCH" group="ESFR"/>
    <register name="ESFR_6C" group="ESFR_UNNAMED"/>
    <register name="ESFR_6D" group="ESFR_UNNAMED"/>
    <register name="ESFR_6E" group="ESFR_UNNAMED"/>
    <register name="ESFR_6F" group="ESFR_UNNAMED"/>
    <register name="ESFR_70" group="ESFR_UNNAMED"/>
    <register name="ESFR_71" group="ESFR_UNNAMED"/>
    <register name="ESFR_72" group="ESFR_UNNAMED"/>
    <register name="ESFR_73" group="ESFR_UNNAMED"/>
    <register name="ESFR_74" group="ESFR_UNNAMED"/>
    <register name="ESFR_75" group="ESFR_UNNAMED"/>
    <register name="ESFR_76" group="ESFR_UNNAMED"/>
    <register name="ESFR_77" group="ESFR_UNNAMED"/>
    <register name="ESFR_78" group="ESFR_UNNAMED"/>
    <register name="ESFR_79" group="ESFR_UNNAMED"/>
    <register name="ESFR_7A" group="ESFR_UNNAMED"/>
    <register name="ESFR_7B" group="ESFR_UNNAMED"/>
    <register name="ESFR_7C" group="ESFR_UNNAMED"/>
    <register name="ESFR_7D" group="ESFR_UNNAMED"/>
    <register name="ESFR_7E" group="ESFR_UNNAMED"/>
    <register name="ESFR_7F" group="ESFR_UNNAMED"/>
    <register name="DP0L" group="ESFR"/>
    <register name="DP0H" group="ESFR"/>
    <register name="DP1L" group="ESFR"/>
    <register name="DP1H" group="ESFR"/>
    <register name="RP0H" group="ESFR"/>
    <register name="ESFR_85" group="ESFR_UNNAMED"/>
    <register name="RTC_ISNC" group="ESFR"/>
    <register name="ESFR_87" group="ESFR_UNNAMED"/>
    <register name="RTC_CON" group="ESFR"/>
    <register name="ESFR_89" group="ESFR_UNNAMED"/>
    <register name="ESFR_8A" group="ESFR_UNNAMED"/>
    <register name="ESFR_8B" group="ESFR_UNNAMED"/>
    <register name="ESFR_8C" group="ESFR_UNNAMED"/>
    <register name="ESFR_8D" group="ESFR_UNNAMED"/>
    <register name="ESFR_8E" group="ESFR_UNNAMED"/>
    <register name="ESFR_8F" group="ESFR_UNNAMED"/>
    <register name="ALTSEL0P1H" group="ESFR"/>
    <register name="ALTSEL0P2" group="ESFR"/>
    <register name="ESFR_92" group="ESFR_UNNAMED"/>
    <register name="ALTSEL0P3" group="ESFR"/>
    <register name="ALTSEL1P3" group="ESFR"/>
    <register name="ALTSEL0P4" group="ESFR"/>
    <register name="ALTSEL0P6" group="ESFR"/>
    <register name="ESFR_97" group="ESFR_UNNAMED"/>
    <register name="ALTSEL0P1L" group="ESFR"/>
    <register name="ESFR_99" group="ESFR_UNNAMED"/>
    <register name="ESFR_9A" group="ESFR_UNNAMED"/>
    <register name="ALTSEL1P4" group="ESFR"/>
    <register name="ALTSEL0P9" group="ESFR"/>
    <register name="ALTSEL1P9" group="ESFR"/>
    <register name="ALTSEL0P7" group="ESFR"/>
    <register name="ALTSEL1P7" group="ESFR"/>
    <register name="ESFR_A0" group="ESFR_UNNAMED"/>
    <register name="CAN_1IC" group="ESFR"/>
    <register name="CAN_2IC" group="ESFR"/>
    <register name="CAN_3IC" group="ESFR"/>
    <register name="CAN_4IC" group="ESFR"/>
    <register name="CAN_5IC" group="ESFR"/>
    <register name="CAN_6IC" group="ESFR"/>
    <register name="CAN_7IC" group="ESFR"/>
    <register name="ASC1_TBIC" group="ESFR"/>
    <register name="ESFR_A9" group="ESFR_UNNAMED"/>
    <register name="ESFR_AA" group="ESFR_UNNAMED"/>
    <register name="ESFR_AB" group="ESFR_UNNAMED"/>
    <register name="ESFR_AC" group="ESFR_UNNAMED"/>
    <register name="ESFR_AD" group="ESFR_UNNAMED"/>
    <register name="ASC0_ABIC" group="ESFR"/>
    <register name="ESFR_AF" group="ESFR_UNNAMED"/>
    <register name="CC2_CC16IC" group="ESFR"/>
    <register name="CC2_CC17IC" group="ESFR"/>
    <register name="CC2_CC18IC" group="ESFR"/>
    <register name="CC2_CC19IC" group="ESFR"/>
    <register name="CC2_CC20IC" group="ESFR"/>
    <register name="CC2_CC21IC" group="ESFR"/>
    <register name="CC2_CC22IC" group="ESFR"/>
    <register name="CC2_CC23IC" group="ESFR"/>
    <register name="CC2_CC24IC" group="ESFR"/>
    <register name="CC2_CC25IC" group="ESFR"/>
    <register name="CC2_CC26IC" group="ESFR"/>
    <register name="CC2_CC27IC" group="ESFR"/>
    <register name="CC2_CC28IC" group="ESFR"/>
    <register name="CC2_T7IC" group="ESFR"/>
    <register name="CC2_T8IC" group="ESFR"/>
    <register name="ESFR_BF" group="ESFR_UNNAMED"/>
    <register name="ESFR_C0" group="ESFR_UNNAMED"/>
    <register name="ASC1_TIC" group="ESFR"/>
    <register name="CC2_CC29IC" group="ESFR"/>
    <register name="IIC_DIC" group="ESFR"/>
    <register name="ESFR_C4" group="ESFR_UNNAMED"/>
    <register name="ASC1_RIC" group="ESFR"/>
    <register name="CC2_CC30IC" group="ESFR"/>
    <register name="IIC_PEIC" group="ESFR"/>
    <register name="ESFR_C8" group="ESFR_UNNAMED"/>
    <register name="ASC1_EIC" group="ESFR"/>
    <register name="CC2_CC31IC" group="ESFR"/>
    <register name="CAN_0IC" group="ESFR"/>
    <register name="ESFR_CC" group="ESFR_UNNAMED"/>
    <register name="SDLM_IC" group="ESFR"/>
    <register name="ASC0_TBIC" group="ESFR"/>
    <register name="PLL_IC" group="ESFR"/>
    <register name="RTC_IC" group="ESFR"/>
    <register name="ESFR_D1" group="ESFR_UNNAMED"/>
    <register name="ESFR_D2" group="ESFR_UNNAMED"/>
    <register name="ESFR_D3" group="ESFR_UNNAMED"/>
    <register name="ESFR_D4" group="ESFR_UNNAMED"/>
    <register name="SSC1_TIC" group="ESFR"/>
    <register name="SSC1_RIC" group="ESFR"/>
    <register name="SSC1_EIC" group="ESFR"/>
    <register name="ESFR_D8" group="ESFR_UNNAMED"/>
    <register name="ESFR_D9" group="ESFR_UNNAMED"/>
    <register name="ESFR_DA" group="ESFR_UNNAMED"/>
    <register name="ESFR_DB" group="ESFR_UNNAMED"/>
    <register name="ASC0_ABCON" group="ESFR"/>
    <register name="ASC1_ABIC" group="ESFR"/>
    <register name="ASC1_ABCON" group="ESFR"/>
    <register name="ESFR_DF" group="ESFR_UNNAMED"/>
    <register name="EXICON" group="ESFR"/>
    <register name="ODP2" group="ESFR"/>
    <register name="PICON" group="ESFR"/>
    <register name="ODP3" group="ESFR"/>
    <register name="ESFR_E4" group="ESFR_UNNAMED"/>
    <register name="ODP4" group="ESFR"/>
    <register name="ESFR_E6" group="ESFR_UNNAMED"/>
    <register name="ODP6" group="ESFR"/>
    <register name="SYSCON2" group="ESFR"/>
    <register name="ODP7" group="ESFR"/>
    <register name="SYSCON3" group="ESFR"/>
    <register name="ESFR_EB" group="ESFR_UNNAMED"/>
    <register name="ESFR_EC" group="ESFR_UNNAMED"/>
    <register name="ESFR_ED" group="ESFR_UNNAMED"/>
    <register name="ESFR_EE" group="ESFR_UNNAMED"/>
    <register name="ISNC" group="ESFR"/>
    <register name="ESFR_F0" group="ESFR_UNNAMED"/>
    <register name="ESFR_F1" group="ESFR_UNNAMED"/>
    <register name="ESFR_F2" group="ESFR_UNNAMED"/>
    <register name="ESFR_F3" group="ESFR_UNNAMED"/>
    <register name="ESFR_F4" group="ESFR_UNNAMED"/>
    <register name="ESFR_F5" group="ESFR_UNNAMED"/>
    <register name="ESFR_F6" group="ESFR_UNNAMED"/>
    <register name="ESFR_F7" group="ESFR_UNNAMED"/>
    <register name="ESFR_F8" group="ESFR_UNNAMED"/>
    <register name="ESFR_F9" group="ESFR_UNNAMED"/>
    <register name="ESFR_FA" group="ESFR_UNNAMED"/>
    <register name="ESFR_FB" group="ESFR_UNNAMED"/>
    <register name="ESFR_FC" group="ESFR_UNNAMED"/>
    <register name="ESFR_FD" group="ESFR_UNNAMED"/>
    <register name="ESFR_FE" group="ESFR_UNNAMED"/>
    <register name="ESFR_FF" group="ESFR_UNNAMED"/>
  </register_data>

This works for several commands like MOV.
But there are still errors in the slaspec file which result that the registers are not displayed correctly for BCLR.

For example:
e0000c e6 5a 14 00 mov ASC0_BG,#0x14
is correct, but
e00000 be 88 bclr DAT_00ff10.0xb
is wrong
It should be
e00000 be 88 bclr PSW.0xb

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@Elmue