You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
If I read or set the SENS_SAR_PERI_CLK_GATE_CONF_REG from ULP code, it seems not working (but I get no error message).
If I read or set it from the main CPU, it works.
I am using ULP FSM C macro in PlatformIO Arduino framework.
The framework is a custom built from esp-idf 4.4.4, with added support of ULP:
This code snippet in the sketch is only a small part of an older big project running on ESP32.
The remaining ULP-FSM code (not showed here) ported from the ESP32 is working without problem, only this new register manipulation don't work.
Starting ULP...
ULP finished: 1
PERI_REG before ULP setting: 0010000000000000000000000000000
PERI_REG after ULP setting: 0010000000000000000000000000000
PERI_REG before CPU setting: 0000000000000000000000000000000
PERI_REG after CPU setting: 1000000000000000000000000000000
Other Steps to Reproduce
No response
I have checked existing issues, online documentation and the Troubleshooting Guide
I confirm I have checked existing issues, online documentation and Troubleshooting guide.
The text was updated successfully, but these errors were encountered:
I can confirm this unexpected behaviour also on an ESP32-S2. Writing to SENS_SAR_PERI_CLK_GATE_CONF_REG from the ULP-FSM has no effect.
I wonder if this is expected behaviour on the S2/S3, but so far I cannot find anything in the Technical Reference Manual that would explain this behaviour as expected.
Actually correction: On the ESP32S2, the register is called SENS_SAR_IO_MUX_CONF_REG - and that's the one I cannot write to from the ULP. But looking at this example in the ESP-IDF it should work (I would assume they that code wouldn't be there, if it's not meant to work).
Yes, I encountered the same issue with ULP counting on ESP32S3 using Arduino. It was unable to count properly. However, when using examples on ESP-IDF, the ULP functionality worked correctly.
Board
Heltec ESP32 Lora (V3)
Device Description
ESP32-S3 with SX1262 Lora module
Hardware Configuration
nothing
Version
other
IDE Name
PlatformIO
Operating System
Windows 11 22H2
Flash frequency
40Mhz
PSRAM enabled
no
Upload speed
460800
Description
If I read or set the
SENS_SAR_PERI_CLK_GATE_CONF_REG
from ULP code, it seems not working (but I get no error message).If I read or set it from the main CPU, it works.
I am using ULP FSM C macro in PlatformIO Arduino framework.
The framework is a custom built from esp-idf 4.4.4, with added support of ULP:
This code snippet in the sketch is only a small part of an older big project running on ESP32.
The remaining ULP-FSM code (not showed here) ported from the ESP32 is working without problem, only this new register manipulation don't work.
Sketch
Debug Message
Other Steps to Reproduce
No response
I have checked existing issues, online documentation and the Troubleshooting Guide
The text was updated successfully, but these errors were encountered: