Allow the ESP32-C6 to read lp_timer values (IDFGH-12036)

[txf-]

Is your feature request related to a problem?

I need to measure time deltas on the lp_core.

Describe the solution you'd like.

I believe the lp_timer is accessible, and there are functions already written for the lp_core to access this value, but they're not currently exposed in the headers.

Describe alternatives you've considered.

something like this presumably works:

uint64_t ulp_lp_core_get_cycles_to_us()
{
    uint64_t cycles = RV_READ_CSR(mcycleh)<<32 +  RV_READ_CSR(mcycle);
    return cycles * (LP_CORE_CPU_FREQUENCY_HZ / 1000000);
}

But surely there is no reason why one couldn't use a proper timer, I don't know how inaccurate this method is. It would also be helpful to keep running between wakeup cycles.

Additional context.

I noticed that in ulp_lp_core_lp_timer_shared.c

there is this:

static uint64_t lp_timer_hal_get_cycle_count(void)
{
    lp_timer_ll_counter_snapshot(lp_timer_context.dev);

    uint32_t lo = lp_timer_ll_get_counter_value_low(lp_timer_context.dev, 0);
    uint32_t hi = lp_timer_ll_get_counter_value_high(lp_timer_context.dev, 0);


    lp_timer_counter_value_t result = {
        .lo = lo,
        .hi = hi
    };

    return result.val;
}

but it is currently static and is not found in the header file. Is there a reason this function is not exposed? It is being called any time one sets ulp_lp_core_lp_timer_set_wakeup_time()

[o-marshmallow]

Hello @txf- ,

Which target and version of IDF are you using?

[txf-]

Hello @txf- ,

Which target and version of IDF are you using?

Target?

I'm currently using v5.2-beta2-190-g4ecc978bd6, but it is also like that in master.

[o-marshmallow]

@txf- I mean which ESP32 SoC are you using? ESP32-S3, ESP32-C6, ...?

In fact, not all targets have the LP timer that you saw defined in the ulp_lp_core_lp_timer_shared.c file

[txf-]

@o-marshmallow I'm using the C6, sorry. I thought you were asking for something else given the title.

These functions and source files I mention only pertain to the lpcore on the C6.

I hope I'm being exact in terms of nomenclature. The FSM ulp is only found in ESP32-Sx, the RISCV ulp is found in other devices like the C3 or S3. Finally, the LP core which is currently only in the C6.

[o-marshmallow]

@txf- My bad, indeed the title contains it, how could I miss it 😄

I opened an internal MR to make this LP timer function public.

A bit more info about the low power cores:

• The FSM core can be found on the ESP32, ESP32-S2 and ESP32-S3
• The RISC-V ULP can be found on the ESP32-S2 and the ESP32-S3
• The LP Core is found on the ESP32-C6 and ESP32-P4
• The ESP32-C2, C3 and H2 don't have a low power core